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Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git

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This commit is contained in:
Jaroslav Kysela
2005-06-21 07:39:41 -07:00
parent bbc0274e9b 1d345dac1f
commit fae6ec69c8
1006 changed files with 41629 additions and 32351 deletions
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include/asm-alpha/agp.h
+10
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@@ -10,4 +10,14 @@
#define flush_agp_mappings()
#define flush_agp_cache() mb()
/* Convert a physical address to an address suitable for the GART. */
#define phys_to_gart(x) (x)
#define gart_to_phys(x) (x)
/* GATT allocation. Returns/accepts GATT kernel virtual address. */
#define alloc_gatt_pages(order) \
((char *)__get_free_pages(GFP_KERNEL, (order)))
#define free_gatt_pages(table, order) \
free_pages((unsigned long)(table), (order))
#endif
include/asm-arm/arch-aaec2000/aaec2000.h
+151
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@@ -0,0 +1,151 @@
/*
* linux/include/asm-arm/arch-aaec2000/aaec2000.h
*
* AAEC-2000 registers definition
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_AAEC2000_H
#define __ASM_ARCH_AAEC2000_H
#ifndef __ASM_ARCH_HARDWARE_H
#error You must include hardware.h not this file
#endif /* __ASM_ARCH_HARDWARE_H */
/* Interrupt controller */
#define IRQ_BASE __REG(0x80000500)
#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */
#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */
#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */
/* UART 1 */
#define UART1_BASE __REG(0x80000600)
#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */
#define UART1_LCR __REG(0x80000604) /* Link Control Register */
#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */
#define UART1_CR __REG(0x8000060c) /* Control Register */
#define UART1_SR __REG(0x80000610) /* Status Register */
#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */
#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */
#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */
/* UART 2 */
#define UART2_BASE __REG(0x80000700)
#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */
#define UART2_LCR __REG(0x80000704) /* Link Control Register */
#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */
#define UART2_CR __REG(0x8000070c) /* Control Register */
#define UART2_SR __REG(0x80000710) /* Status Register */
#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */
#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */
#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */
/* UART 3 */
#define UART3_BASE __REG(0x80000800)
#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */
#define UART3_LCR __REG(0x80000804) /* Link Control Register */
#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */
#define UART3_CR __REG(0x8000080c) /* Control Register */
#define UART3_SR __REG(0x80000810) /* Status Register */
#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */
#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */
#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */
/* These are used in some places */
#define _UART1_BASE __PREG(UART1_BASE)
#define _UART2_BASE __PREG(UART2_BASE)
#define _UART3_BASE __PREG(UART3_BASE)
/* UART Registers Offsets */
#define UART_DR 0x00
#define UART_LCR 0x04
#define UART_BRCR 0x08
#define UART_CR 0x0c
#define UART_SR 0x10
#define UART_INT 0x14
#define UART_INTM 0x18
#define UART_INTRES 0x1c
/* UART_LCR Bitmask */
#define UART_LCR_BRK (1 << 0) /* Send Break */
#define UART_LCR_PEN (1 << 1) /* Parity Enable */
#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */
#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */
#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */
#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */
#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */
#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */
#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */
/* UART_CR Bitmask */
#define UART_CR_EN (1 << 0) /* UART Enable */
#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */
#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */
#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */
#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */
#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */
#define UART_CR_LOOP (1 << 6) /* Loopback Mode */
/* UART_SR Bitmask */
#define UART_SR_CTS (1 << 0) /* Clear To Send Status */
#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */
#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */
#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */
#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */
#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */
#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */
#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */
/* UART_INT Bitmask */
#define UART_INT_RIS (1 << 0) /* Rx Interrupt */
#define UART_INT_TIS (1 << 1) /* Tx Interrupt */
#define UART_INT_MIS (1 << 2) /* Modem Interrupt */
#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */
/* Timer 1 */
#define TIMER1_BASE __REG(0x80000c00)
#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */
#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */
#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */
#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */
/* Timer 2 */
#define TIMER2_BASE __REG(0x80000d00)
#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */
#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */
#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */
#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */
/* Timer 3 */
#define TIMER3_BASE __REG(0x80000e00)
#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */
#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */
#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */
#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */
/* Timer Control register bits */
#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start° Timer */
#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */
#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */
#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */
#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2)*/
/* Power and State Control */
#define POWER_BASE __REG(0x80000400)
#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */
#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */
#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */
#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */
#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */
#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */
#define POWER_TEOI __REG(0x80000418) /* Tick EoI */
#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
#endif /* __ARM_ARCH_AAEC2000_H */
include/asm-arm/arch-aaec2000/debug-macro.S
+36
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@@ -0,0 +1,36 @@
/* linux/include/asm-arm/arch-aaec2000/debug-macro.S
*
* Debugging macro include header
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x80000000 @ physical
movne \rx, #io_p2v(0x80000000) @ virtual
orr \rx, \rx, #0x00000800
.endm
.macro senduart,rd,rx
str \rd, [\rx, #0]
.endm
.macro busyuart,rd,rx
1002: ldr \rd, [\rx, #0x10]
tst \rd, #(1 << 7)
beq 1002b
.endm
.macro waituart,rd,rx
#if 0
1001: ldr \rd, [\rx, #0x10]
tst \rd, #(1 << 5)
beq 1001b
#endif
.endm
include/asm-arm/arch-aaec2000/dma.h
+17
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@@ -0,0 +1,17 @@
/*
* linux/include/asm-arm/arch-aaec2000/dma.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H
#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
#endif
include/asm-arm/arch-aaec2000/entry-macro.S
+33
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@@ -0,0 +1,33 @@
/*
* linux/include/asm-arm/arch-aaec2000/entry-macro.S
*
* Low-level IRQ helper for aaec-2000 based platforms
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov r4, #0xf8000000
add r4, r4, #0x00000500
mov \base, r4
ldr \irqstat, [\base, #0]
cmp \irqstat, #0
bne 1001f
ldr \irqnr, =NR_IRQS+1
b 1003f
1001: mov \irqnr, #0
1002: ands \tmp, \irqstat, #1
mov \irqstat, \irqstat, LSR #1
add \irqnr, \irqnr, #1
beq 1002b
sub \irqnr, \irqnr, #1
1003:
.endm
include/asm-arm/arch-aaec2000/hardware.h
+49
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@@ -0,0 +1,49 @@
/*
* linux/include/asm-arm/arch-aaec2000/hardware.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <linux/config.h>
/* The kernel is loaded at physical address 0xf8000000.
* We map the IO space a bit after
*/
#define PIO_APB_BASE 0x80000000
#define VIO_APB_BASE 0xf8000000
#define IO_APB_LENGTH 0x2000
#define PIO_AHB_BASE 0x80002000
#define VIO_AHB_BASE 0xf8002000
#define IO_AHB_LENGTH 0x2000
#define VIO_BASE VIO_APB_BASE
#define PIO_BASE PIO_APB_BASE
#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE )
#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE )
#ifndef __ASSEMBLY__
#include <asm/types.h>
/* FIXME: Is it needed to optimize this a la pxa ?? */
#define __REG(x) (*((volatile u32 *)io_p2v(x)))
#define __PREG(x) (io_v2p((u32)&(x)))
#else /* __ASSEMBLY__ */
#define __REG(x) io_p2v(x)
#define __PREG(x) io_v2p(x)
#endif
#include "aaec2000.h"
#endif /* __ASM_ARCH_HARDWARE_H */
include/asm-arm/arch-aaec2000/io.h
+19
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@@ -0,0 +1,19 @@
/*
* linux/include/asm-arm/arch-aaec2000/io.h
*
* Copied from asm/arch/sa1100/io.h
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif
include/asm-arm/arch-aaec2000/irqs.h
+46
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@@ -0,0 +1,46 @@
/*
* linux/include/asm-arm/arch-aaec2000/irqs.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H
#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */
#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */
#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */
#define INT_MV_FIQ 3 /* Media Changed Interrupt */
#define INT_SC 4 /* Sound Codec Interrupt */
#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */
#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */
#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */
#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */
#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */
#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */
#define INT_TICK 11 /* 64Hz Tick Interrupt */
#define INT_UART1 12 /* UART1 Interrupt */
#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */
#define INT_LCD 14 /* LCD Interrupt */
#define INT_SSI 15 /* SSI End of Transfer Interrupt */
#define INT_UART3 16 /* UART3 Interrupt */
#define INT_SCI 17 /* SCI Interrupt */
#define INT_AAC 18 /* Advanced Audio Codec Interrupt */
#define INT_MMC 19 /* MMC Interrupt */
#define INT_USB 20 /* USB Interrupt */
#define INT_DMA 21 /* DMA Interrupt */
#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */
#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */
#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */
#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */
#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */
#define INT_BMI 27 /* BMI Interrupt */
#define NR_IRQS (INT_BMI + 1)
#endif /* __ASM_ARCH_IRQS_H */
include/asm-arm/arch-aaec2000/memory.h
+73
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@@ -0,0 +1,73 @@
/*
* linux/include/asm-arm/arch-aaec2000/memory.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#include <linux/config.h>
#define PHYS_OFFSET (0xf0000000UL)
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
#ifdef CONFIG_DISCONTIGMEM
/*
* The nodes are the followings:
*
* node 0: 0xf000.0000 - 0xf3ff.ffff
* node 1: 0xf400.0000 - 0xf7ff.ffff
* node 2: 0xf800.0000 - 0xfbff.ffff
* node 3: 0xfc00.0000 - 0xffff.ffff
*/
/*
* Given a kernel address, find the home node of the underlying memory.
*/
#define KVADDR_TO_NID(addr) \
(((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT)
/*
* Given a page frame number, convert it to a node id.
*/
#define PFN_TO_NID(pfn) \
(((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT))
/*
* Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
* and return the mem_map of that node.
*/
#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr))
/*
* Given a page frame number, find the owning node of the memory
* and return the mem_map of that node.
*/
#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
/*
* Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
* and returns the index corresponding to the appropriate page in the
* node's mem_map.
*/
#define LOCAL_MAP_NR(addr) \
(((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT)
#define NODE_MAX_MEM_SHIFT 26
#define NODE_MAX_MEM_SIZE (1 << NODE_MAX_MEM_SHIFT)
#else
#define PFN_TO_NID(addr) (0)
#endif /* CONFIG_DISCONTIGMEM */
#endif /* __ASM_ARCH_MEMORY_H */
include/asm-arm/arch-aaec2000/param.h
+15
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@@ -0,0 +1,15 @@
/*
* linux/include/asm-arm/arch-aaec2000/param.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_PARAM_H
#define __ASM_ARCH_PARAM_H
#endif /* __ASM_ARCH_PARAM_H */
include/asm-arm/arch-aaec2000/system.h
+24
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@@ -0,0 +1,24 @@
/*
* linux/include/asm-arm/arch-aaed2000/system.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode)
{
cpu_reset(0);
}
#endif /* __ASM_ARCH_SYSTEM_H */
include/asm-arm/arch-aaec2000/timex.h
+18
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@@ -0,0 +1,18 @@
/*
* linux/include/asm-arm/arch-aaec2000/timex.h
*
* AAEC-2000 Architecture timex specification
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
#define CLOCK_TICK_RATE 508000
#endif /* __ASM_ARCH_TIMEX_H */
include/asm-arm/arch-aaec2000/uncompress.h
+47
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@@ -0,0 +1,47 @@
/*
* linux/include/asm-arm/arch-aaec2000/uncompress.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
#include "hardware.h"
#define UART(x) (*(volatile unsigned long *)(serial_port + (x)))
static void putstr( const char *s )
{
unsigned long serial_port;
do {
serial_port = _UART3_BASE;
if (UART(UART_CR) & UART_CR_EN) break;
serial_port = _UART1_BASE;
if (UART(UART_CR) & UART_CR_EN) break;
serial_port = _UART2_BASE;
if (UART(UART_CR) & UART_CR_EN) break;
return;
} while (0);
for (; *s; s++) {
/* wait for space in the UART's transmitter */
while ((UART(UART_SR) & UART_SR_TxFF));
/* send the character out. */
UART(UART_DR) = *s;
/* if a LF, also do CR... */
if (*s == 10) {
while ((UART(UART_SR) & UART_SR_TxFF));
UART(UART_DR) = 13;
}
}
}
#define arch_decomp_setup()
#define arch_decomp_wdog()
#endif /* __ASM_ARCH_UNCOMPRESS_H */
include/asm-arm/arch-aaec2000/vmalloc.h
+16
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@@ -0,0 +1,16 @@
/*
* linux/include/asm-arm/arch-aaec2000/vmalloc.h
*
* Copyright (c) 2005 Nicolas Bellido Y Ortega
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_VMALLOC_H
#define __ASM_ARCH_VMALLOC_H
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
#endif /* __ASM_ARCH_VMALLOC_H */
include/asm-arm/arch-integrator/platform.h
+4
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@@ -293,7 +293,11 @@
#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET)
#if defined(CONFIG_ARCH_INTEGRATOR_AP)
#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */
#elif defined(CONFIG_ARCH_INTEGRATOR_CP)
#define INTEGRATOR_GPIO_BASE 0xC9000000 /* GPIO */
#endif
/* ------------------------------------------------------------------------
* KMI keyboard/mouse definitions
include/asm-arm/arch-integrator/smp.h
+19
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@@ -0,0 +1,19 @@
#ifndef ASMARM_ARCH_SMP_H
#define ASMARM_ARCH_SMP_H
#include <linux/config.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
#define hard_smp_processor_id() \
({ \
unsigned int cpunum; \
__asm__("mrc p15, 0, %0, c0, c0, 5" \
: "=r" (cpunum)); \
cpunum &= 0x0F; \
})
extern void secondary_scan_irqs(void);
#endif
include/asm-arm/arch-ixp2000/io.h
+8 -8
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@@ -75,8 +75,8 @@ static inline void insw(u32 ptr, void *buf, int length)
* Is this cycle meant for the CS8900?
*/
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
((port >= IXDP2X01_CS8900_VIRT_BASE) &&
(port <= IXDP2X01_CS8900_VIRT_END))) {
(((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
u8 *buf8 = (u8*)buf;
register u32 tmp32;
@@ -100,8 +100,8 @@ static inline void outsw(u32 ptr, void *buf, int length)
* Is this cycle meant for the CS8900?
*/
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
((port >= IXDP2X01_CS8900_VIRT_BASE) &&
(port <= IXDP2X01_CS8900_VIRT_END))) {
(((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
register u32 tmp32;
u8 *buf8 = (u8*)buf;
do {
@@ -124,8 +124,8 @@ static inline u16 inw(u32 ptr)
* Is this cycle meant for the CS8900?
*/
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
((port >= IXDP2X01_CS8900_VIRT_BASE) &&
(port <= IXDP2X01_CS8900_VIRT_END))) {
(((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
return (u16)(*port);
}
@@ -137,8 +137,8 @@ static inline void outw(u16 value, u32 ptr)
register volatile u32 *port = (volatile u32 *)ptr;
if ((machine_is_ixdp2401() || machine_is_ixdp2801()) &&
((port >= IXDP2X01_CS8900_VIRT_BASE) &&
(port <= IXDP2X01_CS8900_VIRT_END))) {
(((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
*port = value;
return;
}
include/asm-arm/arch-ixp2000/ixp2000-regs.h
+1
View File
@@ -363,6 +363,7 @@
#define IXP2000_MIN_REV_MASK 0x0000000F
#define IXP2000_PROD_ID_MASK 0xFFFFFFFF
#define IXP2000_PRODUCT_ID GLOBAL_REG(0x00)
#define IXP2000_MISC_CONTROL GLOBAL_REG(0x04)
#define IXP2000_MSF_CLK_CNTRL GLOBAL_REG(0x08)
#define IXP2000_RESET0 GLOBAL_REG(0x0c)
include/asm-arm/arch-pxa/pxa-regs.h
+2
View File
@@ -1296,6 +1296,7 @@
#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */
#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */
#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */
#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */
#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */
/* GPIO alternate function mode & direction */
@@ -1428,6 +1429,7 @@
#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT)
#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT)
#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT)
#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT)
#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT)
#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT)
#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN)
include/asm-arm/arch-versatile/hardware.h
+17 -10
View File
@@ -25,19 +25,26 @@
#include <asm/sizes.h>
#include <asm/arch/platform.h>
// FIXME = PCI settings need to be fixed!!!!!
/*
* Similar to above, but for PCI addresses (memory, IO, Config and the
* V3 chip itself). WARNING: this has to mirror definitions in platform.h
* PCI space virtual addresses
*/
#define PCI_MEMORY_VADDR 0xe8000000
#define PCI_CONFIG_VADDR 0xec000000
#define PCI_V3_VADDR 0xed000000
#define PCI_IO_VADDR 0xee000000
#define VERSATILE_PCI_VIRT_BASE 0xe8000000
#define VERSATILE_PCI_CFG_VIRT_BASE 0xe9000000
#define PCIO_BASE PCI_IO_VADDR
#define PCIMEM_BASE PCI_MEMORY_VADDR
#if 0
#define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000
#define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000
#define VERSATILE_PCI_VIRT_MEM_BASE2 0xf6000000
#define PCIO_BASE VERSATILE_PCI_VIRT_MEM_BASE0
#define PCIMEM_BASE VERSATILE_PCI_VIRT_MEM_BASE1
#endif
/* CIK guesswork */
#define PCIBIOS_MIN_IO 0x44000000
#define PCIBIOS_MIN_MEM 0x50000000
#define pcibios_assign_all_busses() 1
/* macro to get at IO space when running virtually */
#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
include/asm-arm/arch-versatile/io.h
+1 -1
View File
@@ -20,7 +20,7 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffff
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
include/asm-arm/arch-versatile/platform.h
+26 -7
View File
@@ -76,7 +76,7 @@
#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38
#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C
#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
#define VERSATILE_SYS_PICCTL_OFFSET 0x44
#define VERSATILE_SYS_PCICTL_OFFSET 0x44
#define VERSATILE_SYS_MCI_OFFSET 0x48
#define VERSATILE_SYS_FLASH_OFFSET 0x4C
#define VERSATILE_SYS_CLCD_OFFSET 0x50
@@ -114,7 +114,7 @@
#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET)
#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET)
#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET)
#define VERSATILE_SYS_PICCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PICCTL_OFFSET)
#define VERSATILE_SYS_PCICTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PCICTL_OFFSET)
#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET)
#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET)
@@ -225,7 +225,20 @@
#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */
#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */
#define VERSATILE_MBX_BASE 0x40000000 /* MBX */
/* PCI space */
#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */
#define VERSATILE_PCI_CFG_BASE 0x42000000
#define VERSATILE_PCI_MEM_BASE0 0x44000000
#define VERSATILE_PCI_MEM_BASE1 0x50000000
#define VERSATILE_PCI_MEM_BASE2 0x60000000
/* Sizes of above maps */
#define VERSATILE_PCI_BASE_SIZE 0x01000000
#define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000
#define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
#define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
#define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */
@@ -498,11 +511,17 @@
/*
* IB2 Versatile/AB expansion board definitions
*/
#define VERSATILE_IB2_CAMERA_BANK 0x24000000
#define VERSATILE_IB2_KBD_DATAREG 0x25000000
#define VERSATILE_IB2_IER 0x26000000 /* for VICINTSOURCE27 */
#define VERSATILE_IB2_CTRL 0x27000000
#define VERSATILE_IB2_STAT 0x27000004
#define VERSATILE_IB2_CAMERA_BANK VERSATILE_IB2_BASE
#define VERSATILE_IB2_KBD_DATAREG (VERSATILE_IB2_BASE + 0x01000000)
/* VICINTSOURCE27 */
#define VERSATILE_IB2_INT_BASE (VERSATILE_IB2_BASE + 0x02000000)
#define VERSATILE_IB2_IER (VERSATILE_IB2_INT_BASE + 0)
#define VERSATILE_IB2_ISR (VERSATILE_IB2_INT_BASE + 4)
#define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000)
#define VERSATILE_IB2_CTRL (VERSATILE_IB2_CTL_BASE + 0)
#define VERSATILE_IB2_STAT (VERSATILE_IB2_CTL_BASE + 4)
#endif
#endif
include/asm-arm/cacheflush.h
+3
View File
@@ -16,6 +16,9 @@
#include <asm/mman.h>
#include <asm/glue.h>
#include <asm/shmparam.h>
#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
/*
* Cache Model
include/asm-arm/elf.h
+2 -2
View File
@@ -38,9 +38,9 @@ typedef struct user_fp elf_fpregset_t;
*/
#define ELF_CLASS ELFCLASS32
#ifdef __ARMEB__
#define ELF_DATA ELFDATA2MSB;
#define ELF_DATA ELFDATA2MSB
#else
#define ELF_DATA ELFDATA2LSB;
#define ELF_DATA ELFDATA2LSB
#endif
#define ELF_ARCH EM_ARM
include/asm-arm/io.h
+27
View File
@@ -272,6 +272,33 @@ extern void __iounmap(void __iomem *addr);
#define iounmap(cookie) __arch_iounmap(cookie)
#endif
/*
* io{read,write}{8,16,32} macros
*/
#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
#define iowrite8(v,p) __raw_writeb(v, p)
#define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
#define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
extern void ioport_unmap(void __iomem *addr);
struct pci_dev;
extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
/*
* can the hardware map this into one segment or not, given no other
* constraints.
include/asm-arm/smp.h
+14
View File
@@ -55,4 +55,18 @@ extern void smp_cross_call(cpumask_t callmap);
*/
extern int boot_secondary(unsigned int cpu, struct task_struct *);
/*
* Perform platform specific initialisation of the specified CPU.
*/
extern void platform_secondary_init(unsigned int cpu);
/*
* Initial data for bringing up a secondary CPU.
*/
struct secondary_data {
unsigned long pgdir;
void *stack;
};
extern struct secondary_data secondary_data;
#endif /* ifndef __ASM_ARM_SMP_H */
include/asm-arm/system.h
+1
View File
@@ -104,6 +104,7 @@ extern void show_pte(struct mm_struct *mm, unsigned long addr);
extern void __show_regs(struct pt_regs *);
extern int cpu_architecture(void);
extern void cpu_init(void);
#define set_cr(x) \
__asm__ __volatile__( \
include/asm-arm26/elf.h
+1 -1
View File
@@ -36,7 +36,7 @@ typedef struct { void *null; } elf_fpregset_t;
* These are used to set parameters in the core dumps.
*/
#define ELF_CLASS ELFCLASS32
#define ELF_DATA ELFDATA2LSB;
#define ELF_DATA ELFDATA2LSB
#define ELF_ARCH EM_ARM
#define USE_ELF_CORE_DUMP
include/asm-arm26/signal.h
-3
View File
@@ -166,9 +166,6 @@ typedef struct sigaltstack {
#include <asm/sigcontext.h>
#define sigmask(sig) (1UL << ((sig) - 1))
//FIXME!!!
//#define HAVE_ARCH_GET_SIGNAL_TO_DELIVER
#endif
include/asm-h8300/kmap_types.h
+4 -2
View File
@@ -1,5 +1,5 @@
#ifndef _ASM_KMAP_TYPES_H
#define _ASM_KMAP_TYPES_H
#ifndef _ASM_H8300_KMAP_TYPES_H
#define _ASM_H8300_KMAP_TYPES_H
enum km_type {
KM_BOUNCE_READ,
@@ -13,6 +13,8 @@ enum km_type {
KM_PTE1,
KM_IRQ0,
KM_IRQ1,
KM_SOFTIRQ0,
KM_SOFTIRQ1,
KM_TYPE_NR
};
include/asm-h8300/mman.h
+3
View File
@@ -4,6 +4,7 @@
#define PROT_READ 0x1 /* page can be read */
#define PROT_WRITE 0x2 /* page can be written */
#define PROT_EXEC 0x4 /* page can be executed */
#define PROT_SEM 0x8 /* page may be used for atomic ops */
#define PROT_NONE 0x0 /* page can not be accessed */
#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
@@ -19,6 +20,8 @@
#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
#define MAP_LOCKED 0x2000 /* pages are locked */
#define MAP_NORESERVE 0x4000 /* don't check for reservations */
#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
#define MAP_NONBLOCK 0x10000 /* do not block on IO */
#define MS_ASYNC 1 /* sync memory asynchronously */
#define MS_INVALIDATE 2 /* invalidate the caches */
include/asm-i386/agp.h
+10
View File
@@ -21,4 +21,14 @@ int unmap_page_from_agp(struct page *page);
worth it. Would need a page for it. */
#define flush_agp_cache() asm volatile("wbinvd":::"memory")
/* Convert a physical address to an address suitable for the GART. */
#define phys_to_gart(x) (x)
#define gart_to_phys(x) (x)
/* GATT allocation. Returns/accepts GATT kernel virtual address. */
#define alloc_gatt_pages(order) \
((char *)__get_free_pages(GFP_KERNEL, (order)))
#define free_gatt_pages(table, order) \
free_pages((unsigned long)(table), (order))
#endif
include/asm-i386/mach-numaq/mach_ipi.h
+1 -1
View File
@@ -1,7 +1,7 @@
#ifndef __ASM_MACH_IPI_H
#define __ASM_MACH_IPI_H
inline void send_IPI_mask_sequence(cpumask_t, int vector);
void send_IPI_mask_sequence(cpumask_t, int vector);
static inline void send_IPI_mask(cpumask_t mask, int vector)
{
include/asm-i386/timer.h
+1
View File
@@ -53,6 +53,7 @@ extern struct init_timer_opts timer_cyclone_init;
extern unsigned long calibrate_tsc(void);
extern void init_cpu_khz(void);
extern int recalibrate_cpu_khz(void);
#ifdef CONFIG_HPET_TIMER
extern struct init_timer_opts timer_hpet_init;
extern unsigned long calibrate_tsc_hpet(unsigned long *tsc_hpet_quotient_ptr);
include/asm-ia64/agp.h
+10
View File
@@ -18,4 +18,14 @@
#define flush_agp_mappings() /* nothing */
#define flush_agp_cache() mb()
/* Convert a physical address to an address suitable for the GART. */
#define phys_to_gart(x) (x)
#define gart_to_phys(x) (x)
/* GATT allocation. Returns/accepts GATT kernel virtual address. */
#define alloc_gatt_pages(order) \
((char *)__get_free_pages(GFP_KERNEL, (order)))
#define free_gatt_pages(table, order) \
free_pages((unsigned long)(table), (order))
#endif /* _ASM_IA64_AGP_H */
include/asm-ia64/perfmon.h
+8
View File
@@ -177,6 +177,10 @@ typedef union {
extern long perfmonctl(int fd, int cmd, void *arg, int narg);
typedef struct {
void (*handler)(int irq, void *arg, struct pt_regs *regs);
} pfm_intr_handler_desc_t;
extern void pfm_save_regs (struct task_struct *);
extern void pfm_load_regs (struct task_struct *);
@@ -187,6 +191,10 @@ extern void pfm_syst_wide_update_task(struct task_struct *, unsigned long info,
extern void pfm_inherit(struct task_struct *task, struct pt_regs *regs);
extern void pfm_init_percpu(void);
extern void pfm_handle_work(void);
extern int pfm_install_alt_pmu_interrupt(pfm_intr_handler_desc_t *h);
extern int pfm_remove_alt_pmu_interrupt(pfm_intr_handler_desc_t *h);
/*
* Reset PMD register flags
include/asm-ia64/pgtable.h
+6 -2
View File
@@ -8,7 +8,7 @@
* This hopefully works with any (fixed) IA-64 page-size, as defined
* in <asm/page.h>.
*
* Copyright (C) 1998-2004 Hewlett-Packard Co
* Copyright (C) 1998-2005 Hewlett-Packard Co
* David Mosberger-Tang <davidm@hpl.hp.com>
*/
@@ -551,7 +551,11 @@ do { \
/* These tell get_user_pages() that the first gate page is accessible from user-level. */
#define FIXADDR_USER_START GATE_ADDR
#define FIXADDR_USER_END (GATE_ADDR + 2*PERCPU_PAGE_SIZE)
#ifdef HAVE_BUGGY_SEGREL
# define FIXADDR_USER_END (GATE_ADDR + 2*PAGE_SIZE)
#else
# define FIXADDR_USER_END (GATE_ADDR + 2*PERCPU_PAGE_SIZE)
#endif
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
include/asm-ia64/processor.h
+8 -2
View File
@@ -403,7 +403,10 @@ extern void ia64_setreg_unknown_kr (void);
* task_struct at this point.
*/
/* Return TRUE if task T owns the fph partition of the CPU we're running on. */
/*
* Return TRUE if task T owns the fph partition of the CPU we're running on.
* Must be called from code that has preemption disabled.
*/
#define ia64_is_local_fpu_owner(t) \
({ \
struct task_struct *__ia64_islfo_task = (t); \
@@ -411,7 +414,10 @@ extern void ia64_setreg_unknown_kr (void);
&& __ia64_islfo_task == (struct task_struct *) ia64_get_kr(IA64_KR_FPU_OWNER)); \
})
/* Mark task T as owning the fph partition of the CPU we're running on. */
/*
* Mark task T as owning the fph partition of the CPU we're running on.
* Must be called from code that has preemption disabled.
*/
#define ia64_set_local_fpu_owner(t) do { \
struct task_struct *__ia64_slfo_task = (t); \
__ia64_slfo_task->thread.last_fph_cpu = smp_processor_id(); \
include/asm-ia64/sn/sn_sal.h
+27 -1
View File
@@ -115,6 +115,13 @@
#define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
#define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
/*
* Error Handling Features
*/
#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1
#define SAL_ERR_FEAT_LOG_SBES 0x2
#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
/*
* SAL Error Codes
@@ -341,6 +348,25 @@ ia64_sn_plat_cpei_handler(void)
return ret_stuff.status;
}
/*
* Set Error Handling Features
*/
static inline u64
ia64_sn_plat_set_error_handling_features(void)
{
struct ia64_sal_retval ret_stuff;
ret_stuff.status = 0;
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
(SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV | SAL_ERR_FEAT_LOG_SBES),
0, 0, 0, 0, 0, 0);
return ret_stuff.status;
}
/*
* Checks for console input.
*/
@@ -472,7 +498,7 @@ static inline u64
ia64_sn_pod_mode(void)
{
struct ia64_sal_retval isrv;
SAL_CALL(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
if (isrv.status)
return 0;
return isrv.v0;
include/asm-ppc/agp.h
+10
View File
@@ -10,4 +10,14 @@
#define flush_agp_mappings()
#define flush_agp_cache() mb()
/* Convert a physical address to an address suitable for the GART. */
#define phys_to_gart(x) (x)
#define gart_to_phys(x) (x)
/* GATT allocation. Returns/accepts GATT kernel virtual address. */
#define alloc_gatt_pages(order) \
((char *)__get_free_pages(GFP_KERNEL, (order)))
#define free_gatt_pages(table, order) \
free_pages((unsigned long)(table), (order))
#endif
include/asm-ppc/cpm2.h
+46
View File
@@ -1039,6 +1039,52 @@ typedef struct im_idma {
#define CMXSCR_TS4CS_CLK7 0x00000006 /* SCC4 Tx Clock Source is CLK7 */
#define CMXSCR_TS4CS_CLK8 0x00000007 /* SCC4 Tx Clock Source is CLK8 */
/*-----------------------------------------------------------------------
* SIUMCR - SIU Module Configuration Register 4-31
*/
#define SIUMCR_BBD 0x80000000 /* Bus Busy Disable */
#define SIUMCR_ESE 0x40000000 /* External Snoop Enable */
#define SIUMCR_PBSE 0x20000000 /* Parity Byte Select Enable */
#define SIUMCR_CDIS 0x10000000 /* Core Disable */
#define SIUMCR_DPPC00 0x00000000 /* Data Parity Pins Configuration*/
#define SIUMCR_DPPC01 0x04000000 /* - " - */
#define SIUMCR_DPPC10 0x08000000 /* - " - */
#define SIUMCR_DPPC11 0x0c000000 /* - " - */
#define SIUMCR_L2CPC00 0x00000000 /* L2 Cache Pins Configuration */
#define SIUMCR_L2CPC01 0x01000000 /* - " - */
#define SIUMCR_L2CPC10 0x02000000 /* - " - */
#define SIUMCR_L2CPC11 0x03000000 /* - " - */
#define SIUMCR_LBPC00 0x00000000 /* Local Bus Pins Configuration */
#define SIUMCR_LBPC01 0x00400000 /* - " - */
#define SIUMCR_LBPC10 0x00800000 /* - " - */
#define SIUMCR_LBPC11 0x00c00000 /* - " - */
#define SIUMCR_APPC00 0x00000000 /* Address Parity Pins Configuration*/
#define SIUMCR_APPC01 0x00100000 /* - " - */
#define SIUMCR_APPC10 0x00200000 /* - " - */
#define SIUMCR_APPC11 0x00300000 /* - " - */
#define SIUMCR_CS10PC00 0x00000000 /* CS10 Pin Configuration */
#define SIUMCR_CS10PC01 0x00040000 /* - " - */
#define SIUMCR_CS10PC10 0x00080000 /* - " - */
#define SIUMCR_CS10PC11 0x000c0000 /* - " - */
#define SIUMCR_BCTLC00 0x00000000 /* Buffer Control Configuration */
#define SIUMCR_BCTLC01 0x00010000 /* - " - */
#define SIUMCR_BCTLC10 0x00020000 /* - " - */
#define SIUMCR_BCTLC11 0x00030000 /* - " - */
#define SIUMCR_MMR00 0x00000000 /* Mask Masters Requests */
#define SIUMCR_MMR01 0x00004000 /* - " - */
#define SIUMCR_MMR10 0x00008000 /* - " - */
#define SIUMCR_MMR11 0x0000c000 /* - " - */
#define SIUMCR_LPBSE 0x00002000 /* LocalBus Parity Byte Select Enable*/
/*-----------------------------------------------------------------------
* SCCR - System Clock Control Register 9-8
*/
#define SCCR_PCI_MODE 0x00000100 /* PCI Mode */
#define SCCR_PCI_MODCK 0x00000080 /* Value of PCI_MODCK pin */
#define SCCR_PCIDF_MSK 0x00000078 /* PCI division factor */
#define SCCR_PCIDF_SHIFT 3
#endif /* __CPM2__ */
#endif /* __KERNEL__ */
include/asm-ppc/m8260_pci.h
+1
View File
@@ -19,6 +19,7 @@
* Define the vendor/device ID for the MPC8265.
*/
#define PCI_DEVICE_ID_MPC8265 ((0x18C0 << 16) | PCI_VENDOR_ID_MOTOROLA)
#define PCI_DEVICE_ID_MPC8272 ((0x18C1 << 16) | PCI_VENDOR_ID_MOTOROLA)
#define M8265_PCIBR0 0x101ac
#define M8265_PCIBR1 0x101b0
include/asm-ppc/mpc8260.h
+1 -1
View File
@@ -41,7 +41,7 @@
#endif
#ifdef CONFIG_PCI_8260
#include <syslib/m8260_pci.h>
#include <syslib/m82xx_pci.h>
#endif
/* Make sure the memory translation stuff is there if PCI not used.
include/asm-ppc/ocp.h
+1 -1
View File
@@ -189,7 +189,7 @@ extern void ocp_for_each_device(void(*callback)(struct ocp_device *, void *arg),
/* Sysfs support */
#define OCP_SYSFS_ADDTL(type, format, name, field) \
static ssize_t \
show_##name##_##field(struct device *dev, char *buf) \
show_##name##_##field(struct device *dev, struct device_attribute *attr, char *buf) \
{ \
struct ocp_device *odev = to_ocp_dev(dev); \
type *add = odev->def->additions; \
include/asm-ppc/seccomp.h
+10
View File
@@ -0,0 +1,10 @@
#ifndef _ASM_SECCOMP_H
#include <linux/unistd.h>
#define __NR_seccomp_read __NR_read
#define __NR_seccomp_write __NR_write
#define __NR_seccomp_exit __NR_exit
#define __NR_seccomp_sigreturn __NR_rt_sigreturn
#endif /* _ASM_SECCOMP_H */
include/asm-ppc/sigcontext.h
+1 -1
View File
@@ -2,7 +2,7 @@
#define _ASM_PPC_SIGCONTEXT_H
#include <asm/ptrace.h>
#include <linux/compiler.h>
struct sigcontext {
unsigned long _unused[4];
include/asm-ppc/thread_info.h
+7
View File
@@ -77,12 +77,19 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
TIF_NEED_RESCHED */
#define TIF_MEMDIE 5
#define TIF_SYSCALL_AUDIT 6 /* syscall auditing active */
#define TIF_SECCOMP 7 /* secure computing */
/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
#define _TIF_SECCOMP (1<<TIF_SECCOMP)
#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
/*
* Non racy (local) flags bit numbers
include/asm-ppc64/agp.h
+10
View File
@@ -10,4 +10,14 @@
#define flush_agp_mappings()
#define flush_agp_cache() mb()
/* Convert a physical address to an address suitable for the GART. */
#define phys_to_gart(x) (x)
#define gart_to_phys(x) (x)
/* GATT allocation. Returns/accepts GATT kernel virtual address. */
#define alloc_gatt_pages(order) \
((char *)__get_free_pages(GFP_KERNEL, (order)))
#define free_gatt_pages(table, order) \
free_pages((unsigned long)(table), (order))
#endif
include/asm-ppc64/elf.h
+1 -3
View File
@@ -221,9 +221,7 @@ do { \
set_thread_flag(TIF_ABI_PENDING); \
else \
clear_thread_flag(TIF_ABI_PENDING); \
if (ibcs2) \
set_personality(PER_SVR4); \
else if (current->personality != PER_LINUX32) \
if (personality(current->personality) != PER_LINUX32) \
set_personality(PER_LINUX); \
} while (0)
include/asm-ppc64/processor.h
+22 -164
View File
@@ -120,103 +120,18 @@
/* Special Purpose Registers (SPRNs)*/
#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */
#define SPRN_CTR 0x009 /* Count Register */
#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */
#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */
#define DABR_TRANSLATION (1UL << 2)
#define SPRN_DAR 0x013 /* Data Address Register */
#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */
#define DBCR_EDM 0x80000000
#define DBCR_IDM 0x40000000
#define DBCR_RST(x) (((x) & 0x3) << 28)
#define DBCR_RST_NONE 0
#define DBCR_RST_CORE 1
#define DBCR_RST_CHIP 2
#define DBCR_RST_SYSTEM 3
#define DBCR_IC 0x08000000 /* Instruction Completion Debug Evnt */
#define DBCR_BT 0x04000000 /* Branch Taken Debug Event */
#define DBCR_EDE 0x02000000 /* Exception Debug Event */
#define DBCR_TDE 0x01000000 /* TRAP Debug Event */
#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */
#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */
#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */
#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */
#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */
#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */
#define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */
#define DAC_BYTE 0
#define DAC_HALF 1
#define DAC_WORD 2
#define DAC_QUAD 3
#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */
#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */
#define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */
#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */
#define DBCR_SED 0x00000020 /* Second Exception Debug Event */
#define DBCR_STD 0x00000010 /* Second Trap Debug Event */
#define DBCR_SIA 0x00000008 /* Second IAC Enable */
#define DBCR_SDA 0x00000004 /* Second DAC Enable */
#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */
#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */
#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */
#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
#define SPRN_DBSR 0x3F0 /* Debug Status Register */
#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
#define DCCR_NOCACHE 0 /* Noncacheable */
#define DCCR_CACHE 1 /* Cacheable */
#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */
#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */
#define DCWR_COPY 0 /* Copy-back */
#define DCWR_WRITE 1 /* Write-through */
#define SPRN_DEAR 0x3D5 /* Data Error Address Register */
#define SPRN_DEC 0x016 /* Decrement Register */
#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */
#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
#define DSISR_NOHPTE 0x40000000 /* no translation found */
#define DSISR_PROTFAULT 0x08000000 /* protection fault */
#define DSISR_ISSTORE 0x02000000 /* access was a store */
#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */
#define SPRN_EAR 0x11A /* External Address Register */
#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */
#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */
#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */
#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */
#define ESR_PIL 0x08000000 /* Program Exception - Illegal */
#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */
#define ESR_PTR 0x02000000 /* Program Exception - Trap */
#define ESR_DST 0x00800000 /* Storage Exception - Data miss */
#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */
#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */
#define HID0_EMCP (1<<31) /* Enable Machine Check pin */
#define HID0_EBA (1<<29) /* Enable Bus Address Parity */
#define HID0_EBD (1<<28) /* Enable Bus Data Parity */
#define HID0_SBCLK (1<<27)
#define HID0_EICE (1<<26)
#define HID0_ECLK (1<<25)
#define HID0_PAR (1<<24)
#define HID0_DOZE (1<<23)
#define HID0_NAP (1<<22)
#define HID0_SLEEP (1<<21)
#define HID0_DPM (1<<20)
#define HID0_ICE (1<<15) /* Instruction Cache Enable */
#define HID0_DCE (1<<14) /* Data Cache Enable */
#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */
#define HID0_DLOCK (1<<12) /* Data Cache Lock */
#define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */
#define HID0_DCI (1<<10) /* Data Cache Invalidate */
#define HID0_SPD (1<<9) /* Speculative disable */
#define HID0_SGE (1<<7) /* Store Gathering Enable */
#define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */
#define HID0_BTIC (1<<5) /* Branch Target Instruction Cache Enable */
#define HID0_ABE (1<<3) /* Address Broadcast Enable */
#define HID0_BHTE (1<<2) /* Branch History Table Enable */
#define HID0_BTCD (1<<1) /* Branch target cache disable */
#define SPRN_MSRDORM 0x3F1 /* Hardware Implementation Register 1 */
#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
@@ -225,23 +140,8 @@
#define SPRN_HID5 0x3F6 /* 970 HID5 */
#define SPRN_TSC 0x3FD /* Thread switch control */
#define SPRN_TST 0x3FC /* Thread switch timeout */
#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */
#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */
#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
#define ICCR_NOCACHE 0 /* Noncacheable */
#define ICCR_CACHE 1 /* Cacheable */
#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */
#define SPRN_ICMP 0x3D5 /* Instruction TLB Compare Register */
#define SPRN_ICTC 0x3FB /* Instruction Cache Throttling Control Reg */
#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */
#define SPRN_IMMR 0x27E /* Internal Memory Map Register */
#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
#define SPRN_LR 0x008 /* Link Register */
#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */
#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */
#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */
#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */
#define SPRN_PID 0x3B1 /* Process ID */
#define SPRN_PIR 0x3FF /* Processor Identification Register */
#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
#define SPRN_PURR 0x135 /* Processor Utilization of Resources Register */
@@ -249,9 +149,6 @@
#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
#define SPRN_SDR1 0x019 /* MMU Hash Base Register */
#define SPRN_SGR 0x3B9 /* Storage Guarded Register */
#define SGR_NORMAL 0
#define SGR_GUARDED 1
#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */
#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */
#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */
@@ -264,50 +161,12 @@
#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, W/O) */
#define SPRN_TBWU 0x11D /* Time Base Write Upper Register (super, W/O) */
#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */
#define SPRN_TCR 0x3DA /* Timer Control Register */
#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
#define WP_2_17 0 /* 2^17 clocks */
#define WP_2_21 1 /* 2^21 clocks */
#define WP_2_25 2 /* 2^25 clocks */
#define WP_2_29 3 /* 2^29 clocks */
#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */
#define WRC_NONE 0 /* No reset will occur */
#define WRC_CORE 1 /* Core reset will occur */
#define WRC_CHIP 2 /* Chip reset will occur */
#define WRC_SYSTEM 3 /* System reset will occur */
#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */
#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */
#define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */
#define FP_2_9 0 /* 2^9 clocks */
#define FP_2_13 1 /* 2^13 clocks */
#define FP_2_17 2 /* 2^17 clocks */
#define FP_2_21 3 /* 2^21 clocks */
#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */
#define TCR_ARE 0x00400000 /* Auto Reload Enable */
#define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */
#define THRM1_TIN (1<<0)
#define THRM1_TIV (1<<1)
#define THRM1_THRES (0x7f<<2)
#define THRM1_TID (1<<29)
#define THRM1_TIE (1<<30)
#define THRM1_V (1<<31)
#define SPRN_THRM2 0x3FD /* Thermal Management Register 2 */
#define SPRN_THRM3 0x3FE /* Thermal Management Register 3 */
#define THRM3_E (1<<31)
#define SPRN_TSR 0x3D8 /* Timer Status Register */
#define TSR_ENW 0x80000000 /* Enable Next Watchdog */
#define TSR_WIS 0x40000000 /* WDT Interrupt Status */
#define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */
#define WRS_NONE 0 /* No WDT reset occurred */
#define WRS_CORE 1 /* WDT forced core reset */
#define WRS_CHIP 2 /* WDT forced chip reset */
#define WRS_SYSTEM 3 /* WDT forced system reset */
#define TSR_PIS 0x08000000 /* PIT Interrupt Status */
#define TSR_FIS 0x04000000 /* FIT Interrupt Status */
#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */
#define SPRN_XER 0x001 /* Fixed Point Exception Register */
#define SPRN_ZPR 0x3B0 /* Zone Protection Register */
#define SPRN_VRSAVE 0x100 /* Vector save */
#define SPRN_CTRLF 0x088
#define SPRN_CTRLT 0x098
#define CTRL_RUNLATCH 0x1
/* Performance monitor SPRs */
#define SPRN_SIAR 780
@@ -352,28 +211,19 @@
#define CTR SPRN_CTR /* Counter Register */
#define DAR SPRN_DAR /* Data Address Register */
#define DABR SPRN_DABR /* Data Address Breakpoint Register */
#define DCMP SPRN_DCMP /* Data TLB Compare Register */
#define DEC SPRN_DEC /* Decrement Register */
#define DMISS SPRN_DMISS /* Data TLB Miss Register */
#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */
#define EAR SPRN_EAR /* External Address Register */
#define HASH1 SPRN_HASH1 /* Primary Hash Address Register */
#define HASH2 SPRN_HASH2 /* Secondary Hash Address Register */
#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */
#define MSRDORM SPRN_MSRDORM /* MSR Dormant Register */
#define NIADORM SPRN_NIADORM /* NIA Dormant Register */
#define TSC SPRN_TSC /* Thread switch control */
#define TST SPRN_TST /* Thread switch timeout */
#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */
#define ICMP SPRN_ICMP /* Instruction TLB Compare Register */
#define IMISS SPRN_IMISS /* Instruction TLB Miss Register */
#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */
#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
#define __LR SPRN_LR
#define PVR SPRN_PVR /* Processor Version */
#define PIR SPRN_PIR /* Processor ID */
#define PURR SPRN_PURR /* Processor Utilization of Resource Register */
//#define RPA SPRN_RPA /* Required Physical Address Register */
#define SDR1 SPRN_SDR1 /* MMU hash base register */
#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */
#define SPR1 SPRN_SPRG1
@@ -389,10 +239,6 @@
#define TBRU SPRN_TBRU /* Time Base Read Upper Register */
#define TBWL SPRN_TBWL /* Time Base Write Lower Register */
#define TBWU SPRN_TBWU /* Time Base Write Upper Register */
#define ICTC 1019
#define THRM1 SPRN_THRM1 /* Thermal Management Register 1 */
#define THRM2 SPRN_THRM2 /* Thermal Management Register 2 */
#define THRM3 SPRN_THRM3 /* Thermal Management Register 3 */
#define XER SPRN_XER
/* Processor Version Register (PVR) field extraction */
@@ -436,12 +282,6 @@
#define XGLUE(a,b) a##b
#define GLUE(a,b) XGLUE(a,b)
/* iSeries CTRL register (for runlatch) */
#define CTRLT 0x098
#define CTRLF 0x088
#define RUNLATCH 0x0001
#ifdef __ASSEMBLY__
#define _GLOBAL(name) \
@@ -656,6 +496,24 @@ static inline void prefetchw(const void *x)
#define HAVE_ARCH_PICK_MMAP_LAYOUT
static inline void ppc64_runlatch_on(void)
{
unsigned long ctrl;
ctrl = mfspr(SPRN_CTRLF);
ctrl |= CTRL_RUNLATCH;
mtspr(SPRN_CTRLT, ctrl);
}
static inline void ppc64_runlatch_off(void)
{
unsigned long ctrl;
ctrl = mfspr(SPRN_CTRLF);
ctrl &= ~CTRL_RUNLATCH;
mtspr(SPRN_CTRLT, ctrl);
}
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
include/asm-ppc64/prom.h
+1 -12
View File
@@ -147,9 +147,7 @@ struct device_node {
struct device_node *sibling;
struct device_node *next; /* next device of same type */
struct device_node *allnext; /* next in list of all nodes */
struct proc_dir_entry *pde; /* this node's proc directory */
struct proc_dir_entry *name_link; /* name symlink */
struct proc_dir_entry *addr_link; /* addr symlink */
struct proc_dir_entry *pde; /* this node's proc directory */
struct kref kref;
unsigned long _flags;
};
@@ -174,15 +172,6 @@ static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_e
dn->pde = de;
}
static void inline set_node_name_link(struct device_node *dn, struct proc_dir_entry *de)
{
dn->name_link = de;
}
static void inline set_node_addr_link(struct device_node *dn, struct proc_dir_entry *de)
{
dn->addr_link = de;
}
/* OBSOLETE: Old stlye node lookup */
extern struct device_node *find_devices(const char *name);
include/asm-ppc64/thread_info.h
+2 -2
View File
@@ -96,7 +96,7 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
TIF_NEED_RESCHED */
#define TIF_32BIT 5 /* 32 bit binary */
#define TIF_RUN_LIGHT 6 /* iSeries run light */
/* #define SPARE 6 */
#define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */
#define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */
#define TIF_SINGLESTEP 9 /* singlestepping active */
@@ -110,7 +110,7 @@ static inline struct thread_info *current_thread_info(void)
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
#define _TIF_32BIT (1<<TIF_32BIT)
#define _TIF_RUN_LIGHT (1<<TIF_RUN_LIGHT)
/* #define _SPARE (1<<SPARE) */
#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
include/asm-s390/user.h
+1 -1
View File
@@ -10,7 +10,7 @@
#define _S390_USER_H
#include <asm/page.h>
#include <linux/ptrace.h>
#include <asm/ptrace.h>
/* Core file format: The core file is written in such a way that gdb
can understand it and provide useful information to the user (under
linux we use the 'trad-core' bfd). There are quite a number of
include/asm-sh/thread_info.h
+1 -1
View File
@@ -27,7 +27,7 @@ struct thread_info {
#endif
#define PREEMPT_ACTIVE 0x4000000
#define PREEMPT_ACTIVE 0x10000000
/*
* macros/functions for gaining access to the thread information structure
include/asm-sh64/thread_info.h
+1 -1
View File
@@ -73,7 +73,7 @@ static inline struct thread_info *current_thread_info(void)
#define THREAD_SIZE 8192
#define PREEMPT_ACTIVE 0x4000000
#define PREEMPT_ACTIVE 0x10000000
/* thread information flags */
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
include/asm-sparc/uaccess.h
+3 -2
View File
@@ -41,10 +41,11 @@
* No one can read/write anything from userland in the kernel space by setting
* large size and address near to PAGE_OFFSET - a fault will break his intentions.
*/
#define __user_ok(addr,size) ((addr) < STACK_TOP)
#define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; })
#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
#define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size)))
#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
#define access_ok(type, addr, size) \
({ (void)(type); __access_ok((unsigned long)(addr), size); })
/* this function will go away soon - use access_ok() instead */
static inline int __deprecated verify_area(int type, const void __user * addr, unsigned long size)
include/asm-sparc64/agp.h
+10
View File
@@ -8,4 +8,14 @@
#define flush_agp_mappings()
#define flush_agp_cache() mb()
/* Convert a physical address to an address suitable for the GART. */
#define phys_to_gart(x) (x)
#define gart_to_phys(x) (x)
/* GATT allocation. Returns/accepts GATT kernel virtual address. */
#define alloc_gatt_pages(order) \
((char *)__get_free_pages(GFP_KERNEL, (order)))
#define free_gatt_pages(table, order) \
free_pages((unsigned long)(table), (order))
#endif
include/asm-sparc64/iommu.h
+2
View File
@@ -16,4 +16,6 @@
#define IOPTE_CACHE 0x0000000000000010UL /* Cached (in UPA E-cache) */
#define IOPTE_WRITE 0x0000000000000002UL /* Writeable */
#define IOMMU_NUM_CTXS 4096
#endif /* !(_SPARC_IOMMU_H) */
include/asm-sparc64/pbm.h
+5 -3
View File
@@ -15,6 +15,7 @@
#include <asm/io.h>
#include <asm/page.h>
#include <asm/oplib.h>
#include <asm/iommu.h>
/* The abstraction used here is that there are PCI controllers,
* each with one (Sabre) or two (PSYCHO/SCHIZO) PCI bus modules
@@ -40,9 +41,6 @@ struct pci_iommu {
*/
spinlock_t lock;
/* Context allocator. */
unsigned int iommu_cur_ctx;
/* IOMMU page table, a linear array of ioptes. */
iopte_t *page_table; /* The page table itself. */
int page_table_sz_bits; /* log2 of ow many pages does it map? */
@@ -87,6 +85,10 @@ struct pci_iommu {
u16 flush;
} alloc_info[PBM_NCLUSTERS];
/* CTX allocation. */
unsigned long ctx_lowest_free;
unsigned long ctx_bitmap[IOMMU_NUM_CTXS / (sizeof(unsigned long) * 8)];
/* Here a PCI controller driver describes the areas of
* PCI memory space where DMA to/from physical memory
* are addressed. Drivers interrogate the PCI layer
include/asm-um/page.h
+7 -1
View File
@@ -98,7 +98,13 @@ extern unsigned long uml_physmem;
extern unsigned long to_phys(void *virt);
extern void *to_virt(unsigned long phys);
#define __pa(virt) to_phys((void *) virt)
/* Cast to unsigned long before casting to void * to avoid a warning from
* mmap_kmem about cutting a long long down to a void *. Not sure that
* casting is the right thing, but 32-bit UML can't have 64-bit virtual
* addresses
*/
#define __pa(virt) to_phys((void *) (unsigned long) virt)
#define __va(phys) to_virt((unsigned long) phys)
#define page_to_pfn(page) ((page) - mem_map)
include/asm-um/pgtable.h
-8
View File
@@ -114,17 +114,9 @@ extern unsigned long end_iomem;
extern unsigned long pg0[1024];
/*
* BAD_PAGETABLE is used when we need a bogus page-table, while
* BAD_PAGE is used for a bogus page.
*
* ZERO_PAGE is a global shared page that is always zero: used
* for zero-mapped memory areas etc..
*/
extern pte_t __bad_page(void);
extern pte_t * __bad_pagetable(void);
#define BAD_PAGETABLE __bad_pagetable()
#define BAD_PAGE __bad_page()
#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
include/asm-um/thread_info.h
+4 -5
View File
@@ -41,18 +41,17 @@ struct thread_info {
#define init_thread_info (init_thread_union.thread_info)
#define init_stack (init_thread_union.stack)
#define THREAD_SIZE ((1 << CONFIG_KERNEL_STACK_ORDER) * PAGE_SIZE)
/* how to get the thread information struct from C */
static inline struct thread_info *current_thread_info(void)
{
struct thread_info *ti;
unsigned long mask = PAGE_SIZE *
(1 << CONFIG_KERNEL_STACK_ORDER) - 1;
ti = (struct thread_info *) (((unsigned long) &ti) & ~mask);
unsigned long mask = THREAD_SIZE - 1;
ti = (struct thread_info *) (((unsigned long) &ti) & ~mask);
return ti;
}
/* thread information allocation */
#define THREAD_SIZE ((1 << CONFIG_KERNEL_STACK_ORDER) * PAGE_SIZE)
#define alloc_thread_info(tsk) \
((struct thread_info *) kmalloc(THREAD_SIZE, GFP_KERNEL))
#define free_thread_info(ti) kfree(ti)
@@ -62,7 +61,7 @@ static inline struct thread_info *current_thread_info(void)
#endif
#define PREEMPT_ACTIVE 0x4000000
#define PREEMPT_ACTIVE 0x10000000
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
#define TIF_SIGPENDING 1 /* signal pending */
include/asm-x86_64/agp.h
+10
View File
@@ -19,4 +19,14 @@ int unmap_page_from_agp(struct page *page);
worth it. Would need a page for it. */
#define flush_agp_cache() asm volatile("wbinvd":::"memory")
/* Convert a physical address to an address suitable for the GART. */
#define phys_to_gart(x) (x)
#define gart_to_phys(x) (x)
/* GATT allocation. Returns/accepts GATT kernel virtual address. */
#define alloc_gatt_pages(order) \
((char *)__get_free_pages(GFP_KERNEL, (order)))
#define free_gatt_pages(table, order) \
free_pages((unsigned long)(table), (order))
#endif
include/linux/acpi.h
+2
View File
@@ -25,6 +25,8 @@
#ifndef _LINUX_ACPI_H
#define _LINUX_ACPI_H
#include <linux/config.h>
#ifdef CONFIG_ACPI
#ifndef _LINUX
include/linux/ata.h
+1
View File
@@ -224,6 +224,7 @@ struct ata_taskfile {
};
#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
#define ata_id_is_sata(id) ((id)[93] == 0)
#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
include/linux/atalk.h
+13 -13
View File
@@ -20,7 +20,7 @@
#define SIOCATALKDIFADDR (SIOCPROTOPRIVATE + 0)
struct atalk_addr {
__u16 s_net;
__be16 s_net;
__u8 s_node;
};
@@ -33,8 +33,8 @@ struct sockaddr_at {
struct atalk_netrange {
__u8 nr_phase;
__u16 nr_firstnet;
__u16 nr_lastnet;
__be16 nr_firstnet;
__be16 nr_lastnet;
};
#ifdef __KERNEL__
@@ -70,8 +70,8 @@ struct atalk_iface {
struct atalk_sock {
/* struct sock has to be the first member of atalk_sock */
struct sock sk;
unsigned short dest_net;
unsigned short src_net;
__be16 dest_net;
__be16 src_net;
unsigned char dest_node;
unsigned char src_node;
unsigned char dest_port;
@@ -95,9 +95,9 @@ struct ddpehdr {
deh_hops:4,
deh_len:10;
#endif
__u16 deh_sum;
__u16 deh_dnet;
__u16 deh_snet;
__be16 deh_sum;
__be16 deh_dnet;
__be16 deh_snet;
__u8 deh_dnode;
__u8 deh_snode;
__u8 deh_dport;
@@ -142,24 +142,24 @@ struct ddpshdr {
/* AppleTalk AARP headers */
struct elapaarp {
__u16 hw_type;
__be16 hw_type;
#define AARP_HW_TYPE_ETHERNET 1
#define AARP_HW_TYPE_TOKENRING 2
__u16 pa_type;
__be16 pa_type;
__u8 hw_len;
__u8 pa_len;
#define AARP_PA_ALEN 4
__u16 function;
__be16 function;
#define AARP_REQUEST 1
#define AARP_REPLY 2
#define AARP_PROBE 3
__u8 hw_src[ETH_ALEN] __attribute__ ((packed));
__u8 pa_src_zero __attribute__ ((packed));
__u16 pa_src_net __attribute__ ((packed));
__be16 pa_src_net __attribute__ ((packed));
__u8 pa_src_node __attribute__ ((packed));
__u8 hw_dst[ETH_ALEN] __attribute__ ((packed));
__u8 pa_dst_zero __attribute__ ((packed));
__u16 pa_dst_net __attribute__ ((packed));
__be16 pa_dst_net __attribute__ ((packed));
__u8 pa_dst_node __attribute__ ((packed));
};
include/linux/audit.h
+70 -24
View File
@@ -27,15 +27,52 @@
#include <linux/sched.h>
#include <linux/elf.h>
/* Request and reply types */
#define AUDIT_GET 1000 /* Get status */
#define AUDIT_SET 1001 /* Set status (enable/disable/auditd) */
#define AUDIT_LIST 1002 /* List filtering rules */
#define AUDIT_ADD 1003 /* Add filtering rule */
#define AUDIT_DEL 1004 /* Delete filtering rule */
#define AUDIT_USER 1005 /* Send a message from user-space */
#define AUDIT_LOGIN 1006 /* Define the login id and informaiton */
#define AUDIT_KERNEL 2000 /* Asynchronous audit record. NOT A REQUEST. */
/* The netlink messages for the audit system is divided into blocks:
* 1000 - 1099 are for commanding the audit system
* 1100 - 1199 user space trusted application messages
* 1200 - 1299 messages internal to the audit daemon
* 1300 - 1399 audit event messages
* 1400 - 1499 SE Linux use
* 1500 - 1999 future use
* 2000 is for otherwise unclassified kernel audit messages
*
* Messages from 1000-1199 are bi-directional. 1200-1299 are exclusively user
* space. Anything over that is kernel --> user space communication.
*/
#define AUDIT_GET 1000 /* Get status */
#define AUDIT_SET 1001 /* Set status (enable/disable/auditd) */
#define AUDIT_LIST 1002 /* List syscall filtering rules */
#define AUDIT_ADD 1003 /* Add syscall filtering rule */
#define AUDIT_DEL 1004 /* Delete syscall filtering rule */
#define AUDIT_USER 1005 /* Message from userspace -- deprecated */
#define AUDIT_LOGIN 1006 /* Define the login id and information */
#define AUDIT_WATCH_INS 1007 /* Insert file/dir watch entry */
#define AUDIT_WATCH_REM 1008 /* Remove file/dir watch entry */
#define AUDIT_WATCH_LIST 1009 /* List all file/dir watches */
#define AUDIT_SIGNAL_INFO 1010 /* Get info about sender of signal to auditd */
#define AUDIT_FIRST_USER_MSG 1100 /* Userspace messages uninteresting to kernel */
#define AUDIT_LAST_USER_MSG 1199
#define AUDIT_DAEMON_START 1200 /* Daemon startup record */
#define AUDIT_DAEMON_END 1201 /* Daemon normal stop record */
#define AUDIT_DAEMON_ABORT 1202 /* Daemon error stop record */
#define AUDIT_DAEMON_CONFIG 1203 /* Daemon config change */
#define AUDIT_SYSCALL 1300 /* Syscall event */
#define AUDIT_FS_WATCH 1301 /* Filesystem watch event */
#define AUDIT_PATH 1302 /* Filename path information */
#define AUDIT_IPC 1303 /* IPC record */
#define AUDIT_SOCKETCALL 1304 /* sys_socketcall arguments */
#define AUDIT_CONFIG_CHANGE 1305 /* Audit system configuration change */
#define AUDIT_SOCKADDR 1306 /* sockaddr copied as syscall arg */
#define AUDIT_CWD 1307 /* Current working directory */
#define AUDIT_AVC 1400 /* SE Linux avc denial or grant */
#define AUDIT_SELINUX_ERR 1401 /* Internal SE Linux Errors */
#define AUDIT_AVC_PATH 1402 /* dentry, vfsmount pair from avc */
#define AUDIT_KERNEL 2000 /* Asynchronous audit record. NOT A REQUEST. */
/* Rule flags */
#define AUDIT_PER_TASK 0x01 /* Apply rule at task creation (not syscall) */
@@ -132,16 +169,9 @@
#define AUDIT_ARCH_V850 (EM_V850|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#ifndef __KERNEL__
struct audit_message {
struct nlmsghdr nlh;
char data[1200];
};
#endif
struct audit_status {
__u32 mask; /* Bit mask for valid entries */
__u32 enabled; /* 1 = enabled, 0 = disbaled */
__u32 enabled; /* 1 = enabled, 0 = disabled */
__u32 failure; /* Failure-to-log action */
__u32 pid; /* pid of auditd process */
__u32 rate_limit; /* messages rate limit (per second) */
@@ -161,6 +191,11 @@ struct audit_rule { /* for AUDIT_LIST, AUDIT_ADD, and AUDIT_DEL */
#ifdef __KERNEL__
struct audit_sig_info {
uid_t uid;
pid_t pid;
};
struct audit_buffer;
struct audit_context;
struct inode;
@@ -185,11 +220,16 @@ extern void audit_inode(const char *name, const struct inode *inode);
/* Private API (for audit.c only) */
extern int audit_receive_filter(int type, int pid, int uid, int seq,
void *data, uid_t loginuid);
extern void audit_get_stamp(struct audit_context *ctx,
struct timespec *t, unsigned int *serial);
extern unsigned int audit_serial(void);
extern void auditsc_get_stamp(struct audit_context *ctx,
struct timespec *t, unsigned int *serial);
extern int audit_set_loginuid(struct task_struct *task, uid_t loginuid);
extern uid_t audit_get_loginuid(struct audit_context *ctx);
extern int audit_ipc_perms(unsigned long qbytes, uid_t uid, gid_t gid, mode_t mode);
extern int audit_socketcall(int nargs, unsigned long *args);
extern int audit_sockaddr(int len, void *addr);
extern int audit_avc_path(struct dentry *dentry, struct vfsmount *mnt);
extern void audit_signal_info(int sig, struct task_struct *t);
#else
#define audit_alloc(t) ({ 0; })
#define audit_free(t) do { ; } while (0)
@@ -198,18 +238,24 @@ extern int audit_ipc_perms(unsigned long qbytes, uid_t uid, gid_t gid, mode_t mo
#define audit_getname(n) do { ; } while (0)
#define audit_putname(n) do { ; } while (0)
#define audit_inode(n,i) do { ; } while (0)
#define audit_receive_filter(t,p,u,s,d,l) ({ -EOPNOTSUPP; })
#define auditsc_get_stamp(c,t,s) do { BUG(); } while (0)
#define audit_get_loginuid(c) ({ -1; })
#define audit_ipc_perms(q,u,g,m) ({ 0; })
#define audit_socketcall(n,a) ({ 0; })
#define audit_sockaddr(len, addr) ({ 0; })
#define audit_avc_path(dentry, mnt) ({ 0; })
#define audit_signal_info(s,t) do { ; } while (0)
#endif
#ifdef CONFIG_AUDIT
/* These are defined in audit.c */
/* Public API */
extern void audit_log(struct audit_context *ctx,
extern void audit_log(struct audit_context *ctx, int type,
const char *fmt, ...)
__attribute__((format(printf,2,3)));
__attribute__((format(printf,3,4)));
extern struct audit_buffer *audit_log_start(struct audit_context *ctx);
extern struct audit_buffer *audit_log_start(struct audit_context *ctx,int type);
extern void audit_log_format(struct audit_buffer *ab,
const char *fmt, ...)
__attribute__((format(printf,2,3)));
@@ -229,8 +275,8 @@ extern void audit_send_reply(int pid, int seq, int type,
void *payload, int size);
extern void audit_log_lost(const char *message);
#else
#define audit_log(t,f,...) do { ; } while (0)
#define audit_log_start(t) ({ NULL; })
#define audit_log(c,t,f,...) do { ; } while (0)
#define audit_log_start(c,t) ({ NULL; })
#define audit_log_vformat(b,f,a) do { ; } while (0)
#define audit_log_format(b,f,...) do { ; } while (0)
#define audit_log_end(b) do { ; } while (0)
include/linux/blkdev.h
+1 -1
View File
@@ -544,7 +544,7 @@ extern void blk_end_sync_rq(struct request *rq);
extern void blk_attempt_remerge(request_queue_t *, struct request *);
extern void __blk_attempt_remerge(request_queue_t *, struct request *);
extern struct request *blk_get_request(request_queue_t *, int, int);
extern void blk_insert_request(request_queue_t *, struct request *, int, void *, int);
extern void blk_insert_request(request_queue_t *, struct request *, int, void *);
extern void blk_requeue_request(request_queue_t *, struct request *);
extern void blk_plug_device(request_queue_t *);
extern int blk_remove_plug(request_queue_t *);
include/linux/chio.h
+168
View File
@@ -0,0 +1,168 @@
/*
* ioctl interface for the scsi media changer driver
*/
/* changer element types */
#define CHET_MT 0 /* media transport element (robot) */
#define CHET_ST 1 /* storage element (media slots) */
#define CHET_IE 2 /* import/export element */
#define CHET_DT 3 /* data transfer element (tape/cdrom/whatever) */
#define CHET_V1 4 /* vendor specific #1 */
#define CHET_V2 5 /* vendor specific #2 */
#define CHET_V3 6 /* vendor specific #3 */
#define CHET_V4 7 /* vendor specific #4 */
/*
* CHIOGPARAMS
* query changer properties
*
* CHIOVGPARAMS
* query vendor-specific element types
*
* accessing elements works by specifing type and unit of the element.
* for eample, storage elements are addressed with type = CHET_ST and
* unit = 0 .. cp_nslots-1
*
*/
struct changer_params {
int cp_curpicker; /* current transport element */
int cp_npickers; /* number of transport elements (CHET_MT) */
int cp_nslots; /* number of storage elements (CHET_ST) */
int cp_nportals; /* number of import/export elements (CHET_IE) */
int cp_ndrives; /* number of data transfer elements (CHET_DT) */
};
struct changer_vendor_params {
int cvp_n1; /* number of vendor specific elems (CHET_V1) */
char cvp_label1[16];
int cvp_n2; /* number of vendor specific elems (CHET_V2) */
char cvp_label2[16];
int cvp_n3; /* number of vendor specific elems (CHET_V3) */
char cvp_label3[16];
int cvp_n4; /* number of vendor specific elems (CHET_V4) */
char cvp_label4[16];
int reserved[8];
};
/*
* CHIOMOVE
* move a medium from one element to another
*/
struct changer_move {
int cm_fromtype; /* type/unit of source element */
int cm_fromunit;
int cm_totype; /* type/unit of destination element */
int cm_tounit;
int cm_flags;
};
#define CM_INVERT 1 /* flag: rotate media (for double-sided like MOD) */
/*
* CHIOEXCHANGE
* move one medium from element #1 to element #2,
* and another one from element #2 to element #3.
* element #1 and #3 are allowed to be identical.
*/
struct changer_exchange {
int ce_srctype; /* type/unit of element #1 */
int ce_srcunit;
int ce_fdsttype; /* type/unit of element #2 */
int ce_fdstunit;
int ce_sdsttype; /* type/unit of element #3 */
int ce_sdstunit;
int ce_flags;
};
#define CE_INVERT1 1
#define CE_INVERT2 2
/*
* CHIOPOSITION
* move the transport element (robot arm) to a specific element.
*/
struct changer_position {
int cp_type;
int cp_unit;
int cp_flags;
};
#define CP_INVERT 1
/*
* CHIOGSTATUS
* get element status for all elements of a specific type
*/
struct changer_element_status {
int ces_type;
unsigned char *ces_data;
};
#define CESTATUS_FULL 0x01 /* full */
#define CESTATUS_IMPEXP 0x02 /* media was imported (inserted by sysop) */
#define CESTATUS_EXCEPT 0x04 /* error condition */
#define CESTATUS_ACCESS 0x08 /* access allowed */
#define CESTATUS_EXENAB 0x10 /* element can export media */
#define CESTATUS_INENAB 0x20 /* element can import media */
/*
* CHIOGELEM
* get more detailed status informtion for a single element
*/
struct changer_get_element {
int cge_type; /* type/unit */
int cge_unit;
int cge_status; /* status */
int cge_errno; /* errno */
int cge_srctype; /* source element of the last move/exchange */
int cge_srcunit;
int cge_id; /* scsi id (for data transfer elements) */
int cge_lun; /* scsi lun (for data transfer elements) */
char cge_pvoltag[36]; /* primary volume tag */
char cge_avoltag[36]; /* alternate volume tag */
int cge_flags;
};
/* flags */
#define CGE_ERRNO 0x01 /* errno available */
#define CGE_INVERT 0x02 /* media inverted */
#define CGE_SRC 0x04 /* media src available */
#define CGE_IDLUN 0x08 /* ID+LUN available */
#define CGE_PVOLTAG 0x10 /* primary volume tag available */
#define CGE_AVOLTAG 0x20 /* alternate volume tag available */
/*
* CHIOSVOLTAG
* set volume tag
*/
struct changer_set_voltag {
int csv_type; /* type/unit */
int csv_unit;
char csv_voltag[36]; /* volume tag */
int csv_flags;
};
#define CSV_PVOLTAG 0x01 /* primary volume tag */
#define CSV_AVOLTAG 0x02 /* alternate volume tag */
#define CSV_CLEARTAG 0x04 /* clear volume tag */
/* ioctls */
#define CHIOMOVE _IOW('c', 1,struct changer_move)
#define CHIOEXCHANGE _IOW('c', 2,struct changer_exchange)
#define CHIOPOSITION _IOW('c', 3,struct changer_position)
#define CHIOGPICKER _IOR('c', 4,int) /* not impl. */
#define CHIOSPICKER _IOW('c', 5,int) /* not impl. */
#define CHIOGPARAMS _IOR('c', 6,struct changer_params)
#define CHIOGSTATUS _IOW('c', 8,struct changer_element_status)
#define CHIOGELEM _IOW('c',16,struct changer_get_element)
#define CHIOINITELEM _IO('c',17)
#define CHIOSVOLTAG _IOW('c',18,struct changer_set_voltag)
#define CHIOGVPARAMS _IOR('c',19,struct changer_vendor_params)
/* ---------------------------------------------------------------------- */
/*
* Local variables:
* c-basic-offset: 8
* End:
*/
include/linux/cpufreq.h
+1 -1
View File
@@ -49,7 +49,7 @@ int cpufreq_unregister_notifier(struct notifier_block *nb, unsigned int list);
/* Frequency values here are CPU kHz so that hardware which doesn't run
* with some frequencies can complain without having to guess what per
* cent / per mille means.
* Maximum transition latency is in microseconds - if it's unknown,
* Maximum transition latency is in nanoseconds - if it's unknown,
* CPUFREQ_ETERNAL shall be used.
*/
include/linux/device.h
+34 -30
View File
@@ -14,6 +14,7 @@
#include <linux/config.h>
#include <linux/ioport.h>
#include <linux/kobject.h>
#include <linux/klist.h>
#include <linux/list.h>
#include <linux/types.h>
#include <linux/module.h>
@@ -44,14 +45,15 @@ struct device;
struct device_driver;
struct class;
struct class_device;
struct class_simple;
struct bus_type {
char * name;
const char * name;
struct subsystem subsys;
struct kset drivers;
struct kset devices;
struct klist klist_devices;
struct klist klist_drivers;
struct bus_attribute * bus_attrs;
struct device_attribute * dev_attrs;
@@ -98,17 +100,18 @@ extern int bus_create_file(struct bus_type *, struct bus_attribute *);
extern void bus_remove_file(struct bus_type *, struct bus_attribute *);
struct device_driver {
char * name;
const char * name;
struct bus_type * bus;
struct completion unloaded;
struct kobject kobj;
struct list_head devices;
struct klist klist_devices;
struct klist_node knode_bus;
struct module * owner;
struct module * owner;
int (*probe) (struct device * dev);
int (*remove) (struct device * dev);
int (*remove) (struct device * dev);
void (*shutdown) (struct device * dev);
int (*suspend) (struct device * dev, pm_message_t state, u32 level);
int (*resume) (struct device * dev, u32 level);
@@ -137,12 +140,16 @@ struct driver_attribute driver_attr_##_name = __ATTR(_name,_mode,_show,_store)
extern int driver_create_file(struct device_driver *, struct driver_attribute *);
extern void driver_remove_file(struct device_driver *, struct driver_attribute *);
extern int driver_for_each_device(struct device_driver * drv, struct device * start,
void * data, int (*fn)(struct device *, void *));
/*
* device classes
*/
struct class {
char * name;
const char * name;
struct module * owner;
struct subsystem subsys;
struct list_head children;
@@ -185,6 +192,7 @@ struct class_device {
struct kobject kobj;
struct class * class; /* required */
dev_t devt; /* dev_t, creates the sysfs "dev" */
struct class_device_attribute *devt_attr;
struct device * dev; /* not necessary, but nice to have */
void * class_data; /* class-specific data */
@@ -245,26 +253,28 @@ struct class_interface {
extern int class_interface_register(struct class_interface *);
extern void class_interface_unregister(struct class_interface *);
/* interface for class simple stuff */
extern struct class_simple *class_simple_create(struct module *owner, char *name);
extern void class_simple_destroy(struct class_simple *cs);
extern struct class_device *class_simple_device_add(struct class_simple *cs, dev_t dev, struct device *device, const char *fmt, ...)
__attribute__((format(printf,4,5)));
extern int class_simple_set_hotplug(struct class_simple *,
int (*hotplug)(struct class_device *dev, char **envp, int num_envp, char *buffer, int buffer_size));
extern void class_simple_device_remove(dev_t dev);
extern struct class *class_create(struct module *owner, char *name);
extern void class_destroy(struct class *cls);
extern struct class_device *class_device_create(struct class *cls, dev_t devt,
struct device *device, char *fmt, ...)
__attribute__((format(printf,4,5)));
extern void class_device_destroy(struct class *cls, dev_t devt);
struct device {
struct list_head node; /* node in sibling list */
struct list_head bus_list; /* node in bus's list */
struct list_head driver_list;
struct list_head children;
struct klist klist_children;
struct klist_node knode_parent; /* node in sibling list */
struct klist_node knode_driver;
struct klist_node knode_bus;
struct device * parent;
struct kobject kobj;
char bus_id[BUS_ID_SIZE]; /* position on parent bus */
struct semaphore sem; /* semaphore to synchronize calls to
* its driver.
*/
struct bus_type * bus; /* type of bus device is on */
struct device_driver *driver; /* which driver has allocated this
device */
@@ -288,12 +298,6 @@ struct device {
void (*release)(struct device * dev);
};
static inline struct device *
list_to_dev(struct list_head *node)
{
return list_entry(node, struct device, node);
}
static inline void *
dev_get_drvdata (struct device *dev)
{
@@ -321,7 +325,6 @@ extern int device_for_each_child(struct device *, void *,
* Manual binding of a device to driver. See drivers/base/bus.c
* for information on use.
*/
extern int driver_probe_device(struct device_driver * drv, struct device * dev);
extern void device_bind_driver(struct device * dev);
extern void device_release_driver(struct device * dev);
extern int device_attach(struct device * dev);
@@ -332,8 +335,10 @@ extern void driver_attach(struct device_driver * drv);
struct device_attribute {
struct attribute attr;
ssize_t (*show)(struct device * dev, char * buf);
ssize_t (*store)(struct device * dev, const char * buf, size_t count);
ssize_t (*show)(struct device *dev, struct device_attribute *attr,
char *buf);
ssize_t (*store)(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count);
};
#define DEVICE_ATTR(_name,_mode,_show,_store) \
@@ -360,13 +365,12 @@ extern int (*platform_notify_remove)(struct device * dev);
*/
extern struct device * get_device(struct device * dev);
extern void put_device(struct device * dev);
extern struct device *device_find(const char *name, struct bus_type *bus);
/* drivers/base/platform.c */
struct platform_device {
char * name;
const char * name;
u32 id;
struct device dev;
u32 num_resources;
include/linux/dm9000.h
+36
View File
@@ -0,0 +1,36 @@
/* include/linux/dm9000.h
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Header file for dm9000 platform data
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef __DM9000_PLATFORM_DATA
#define __DM9000_PLATFORM_DATA __FILE__
/* IO control flags */
#define DM9000_PLATF_8BITONLY (0x0001)
#define DM9000_PLATF_16BITONLY (0x0002)
#define DM9000_PLATF_32BITONLY (0x0004)
/* platfrom data for platfrom device structure's platfrom_data field */
struct dm9000_plat_data {
unsigned int flags;
/* allow replacement IO routines */
void (*inblk)(void __iomem *reg, void *data, int len);
void (*outblk)(void __iomem *reg, void *data, int len);
void (*dumpblk)(void __iomem *reg, int len);
};
#endif /* __DM9000_PLATFORM_DATA */
include/linux/dma-mapping.h
+5
View File
@@ -14,7 +14,12 @@ enum dma_data_direction {
};
#define DMA_64BIT_MASK 0xffffffffffffffffULL
#define DMA_40BIT_MASK 0x000000ffffffffffULL
#define DMA_39BIT_MASK 0x0000007fffffffffULL
#define DMA_32BIT_MASK 0x00000000ffffffffULL
#define DMA_31BIT_MASK 0x000000007fffffffULL
#define DMA_30BIT_MASK 0x000000003fffffffULL
#define DMA_29BIT_MASK 0x000000001fffffffULL
#include <asm/dma-mapping.h>
include/linux/etherdevice.h
+18 -4
View File
@@ -55,19 +55,33 @@ static inline int is_zero_ether_addr(const u8 *addr)
return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
}
/**
* is_multicast_ether_addr - Determine if the given Ethernet address is a
* multicast address.
*
* @addr: Pointer to a six-byte array containing the Ethernet address
*
* Return true if the address is a multicast address.
*/
static inline int is_multicast_ether_addr(const u8 *addr)
{
return addr[0] & 0x01;
}
/**
* is_valid_ether_addr - Determine if the given Ethernet address is valid
* @addr: Pointer to a six-byte array containing the Ethernet address
*
* Check that the Ethernet address (MAC) is not 00:00:00:00:00:00, is not
* a multicast address, and is not FF:FF:FF:FF:FF:FF. The multicast
* and FF:FF:... tests are combined into the single test "!(addr[0]&1)".
* a multicast address, and is not FF:FF:FF:FF:FF:FF.
*
* Return true if the address is valid.
*/
static inline int is_valid_ether_addr(const u8 *addr)
{
return !(addr[0]&1) && !is_zero_ether_addr(addr);
/* FF:FF:FF:FF:FF:FF is a multicast address so we don't need to
* explicitly check for it here. */
return !is_multicast_ether_addr(addr) && !is_zero_ether_addr(addr);
}
/**
@@ -83,6 +97,6 @@ static inline void random_ether_addr(u8 *addr)
addr [0] &= 0xfe; /* clear multicast bit */
addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
}
#endif
#endif /* __KERNEL__ */
#endif /* _LINUX_ETHERDEVICE_H */
include/linux/ethtool.h
+1
View File
@@ -256,6 +256,7 @@ struct net_device;
u32 ethtool_op_get_link(struct net_device *dev);
u32 ethtool_op_get_tx_csum(struct net_device *dev);
int ethtool_op_set_tx_csum(struct net_device *dev, u32 data);
int ethtool_op_set_tx_hw_csum(struct net_device *dev, u32 data);
u32 ethtool_op_get_sg(struct net_device *dev);
int ethtool_op_set_sg(struct net_device *dev, u32 data);
u32 ethtool_op_get_tso(struct net_device *dev);
include/linux/fs.h
+46
View File
@@ -1657,6 +1657,52 @@ static inline void simple_transaction_set(struct file *file, size_t n)
ar->size = n;
}
/*
* simple attribute files
*
* These attributes behave similar to those in sysfs:
*
* Writing to an attribute immediately sets a value, an open file can be
* written to multiple times.
*
* Reading from an attribute creates a buffer from the value that might get
* read with multiple read calls. When the attribute has been read
* completely, no further read calls are possible until the file is opened
* again.
*
* All attributes contain a text representation of a numeric value
* that are accessed with the get() and set() functions.
*/
#define DEFINE_SIMPLE_ATTRIBUTE(__fops, __get, __set, __fmt) \
static int __fops ## _open(struct inode *inode, struct file *file) \
{ \
__simple_attr_check_format(__fmt, 0ull); \
return simple_attr_open(inode, file, __get, __set, __fmt); \
} \
static struct file_operations __fops = { \
.owner = THIS_MODULE, \
.open = __fops ## _open, \
.release = simple_attr_close, \
.read = simple_attr_read, \
.write = simple_attr_write, \
};
static inline void __attribute__((format(printf, 1, 2)))
__simple_attr_check_format(const char *fmt, ...)
{
/* don't do anything, just let the compiler check the arguments; */
}
int simple_attr_open(struct inode *inode, struct file *file,
u64 (*get)(void *), void (*set)(void *, u64),
const char *fmt);
int simple_attr_close(struct inode *inode, struct file *file);
ssize_t simple_attr_read(struct file *file, char __user *buf,
size_t len, loff_t *ppos);
ssize_t simple_attr_write(struct file *file, const char __user *buf,
size_t len, loff_t *ppos);
#ifdef CONFIG_SECURITY
static inline char *alloc_secdata(void)
{
include/linux/gameport.h
+25 -3
View File
@@ -67,6 +67,8 @@ int gameport_open(struct gameport *gameport, struct gameport_driver *drv, int mo
void gameport_close(struct gameport *gameport);
void gameport_rescan(struct gameport *gameport);
#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
void __gameport_register_port(struct gameport *gameport, struct module *owner);
static inline void gameport_register_port(struct gameport *gameport)
{
@@ -75,6 +77,29 @@ static inline void gameport_register_port(struct gameport *gameport)
void gameport_unregister_port(struct gameport *gameport);
void gameport_set_phys(struct gameport *gameport, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
#else
static inline void gameport_register_port(struct gameport *gameport)
{
return;
}
static inline void gameport_unregister_port(struct gameport *gameport)
{
return;
}
static inline void gameport_set_phys(struct gameport *gameport,
const char *fmt, ...)
{
return;
}
#endif
static inline struct gameport *gameport_allocate_port(void)
{
struct gameport *gameport = kcalloc(1, sizeof(struct gameport), GFP_KERNEL);
@@ -92,9 +117,6 @@ static inline void gameport_set_name(struct gameport *gameport, const char *name
strlcpy(gameport->name, name, sizeof(gameport->name));
}
void gameport_set_phys(struct gameport *gameport, const char *fmt, ...)
__attribute__ ((format (printf, 2, 3)));
/*
* Use the following fucntions to manipulate gameport's per-port
* driver-specific data.
include/linux/hardirq.h
+5 -1
View File
@@ -43,13 +43,17 @@
#define __IRQ_MASK(x) ((1UL << (x))-1)
#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
#if PREEMPT_ACTIVE < (1 << (HARDIRQ_SHIFT + HARDIRQ_BITS))
#error PREEMPT_ACTIVE is too low!
#endif
#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK))
include/linux/hdlc.h
+3 -1
View File
@@ -1,7 +1,7 @@
/*
* Generic HDLC support routines for Linux
*
* Copyright (C) 1999-2003 Krzysztof Halasa <khc@pm.waw.pl>
* Copyright (C) 1999-2005 Krzysztof Halasa <khc@pm.waw.pl>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License
@@ -41,6 +41,7 @@
#define LMI_NONE 1 /* No LMI, all PVCs are static */
#define LMI_ANSI 2 /* ANSI Annex D */
#define LMI_CCITT 3 /* ITU-T Annex A */
#define LMI_CISCO 4 /* The "original" LMI, aka Gang of Four */
#define HDLC_MAX_MTU 1500 /* Ethernet 1500 bytes */
#define HDLC_MAX_MRU (HDLC_MAX_MTU + 10 + 14 + 4) /* for ETH+VLAN over FR */
@@ -89,6 +90,7 @@ typedef struct pvc_device_struct {
unsigned int deleted: 1;
unsigned int fecn: 1;
unsigned int becn: 1;
unsigned int bandwidth; /* Cisco LMI reporting only */
}state;
}pvc_device;
include/linux/i2c-sysfs.h
+36
View File
@@ -0,0 +1,36 @@
/*
* i2c-sysfs.h - i2c chip driver sysfs defines
*
* Copyright (C) 2005 Yani Ioannou <yani.ioannou@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _LINUX_I2C_SYSFS_H
#define _LINUX_I2C_SYSFS_H
struct sensor_device_attribute{
struct device_attribute dev_attr;
int index;
};
#define to_sensor_dev_attr(_dev_attr) \
container_of(_dev_attr, struct sensor_device_attribute, dev_attr)
#define SENSOR_DEVICE_ATTR(_name,_mode,_show,_store,_index) \
struct sensor_device_attribute sensor_dev_attr_##_name = { \
.dev_attr = __ATTR(_name,_mode,_show,_store), \
.index = _index, \
}
#endif /* _LINUX_I2C_SYSFS_H */
include/linux/if.h
+1 -1
View File
@@ -33,7 +33,7 @@
#define IFF_LOOPBACK 0x8 /* is a loopback net */
#define IFF_POINTOPOINT 0x10 /* interface is has p-p link */
#define IFF_NOTRAILERS 0x20 /* avoid use of trailers */
#define IFF_RUNNING 0x40 /* resources allocated */
#define IFF_RUNNING 0x40 /* interface running and carrier ok */
#define IFF_NOARP 0x80 /* no ARP protocol */
#define IFF_PROMISC 0x100 /* receive all packets */
#define IFF_ALLMULTI 0x200 /* receive all multicast packets*/
include/linux/if_shaper.h
+1 -2
View File
@@ -23,7 +23,7 @@ struct shaper
__u32 shapeclock;
unsigned long recovery; /* Time we can next clock a packet out on
an empty queue */
unsigned long locked;
struct semaphore sem;
struct net_device_stats stats;
struct net_device *dev;
int (*hard_start_xmit) (struct sk_buff *skb,
@@ -38,7 +38,6 @@ struct shaper
int (*hard_header_cache)(struct neighbour *neigh, struct hh_cache *hh);
void (*header_cache_update)(struct hh_cache *hh, struct net_device *dev, unsigned char * haddr);
struct net_device_stats* (*get_stats)(struct net_device *dev);
wait_queue_head_t wait_queue;
struct timer_list timer;
};
include/linux/if_tr.h
+2
View File
@@ -19,6 +19,8 @@
#ifndef _LINUX_IF_TR_H
#define _LINUX_IF_TR_H
#include <asm/byteorder.h> /* For __be16 */
/* IEEE 802.5 Token-Ring magic constants. The frame sizes omit the preamble
and FCS/CRC (frame check sequence). */
#define TR_ALEN 6 /* Octets in one token-ring addr */
include/linux/inetdevice.h
+2
View File
@@ -29,6 +29,7 @@ struct ipv4_devconf
int no_xfrm;
int no_policy;
int force_igmp_version;
int promote_secondaries;
void *sysctl;
};
@@ -71,6 +72,7 @@ struct in_device
#define IN_DEV_SEC_REDIRECTS(in_dev) (ipv4_devconf.secure_redirects || (in_dev)->cnf.secure_redirects)
#define IN_DEV_IDTAG(in_dev) ((in_dev)->cnf.tag)
#define IN_DEV_MEDIUM_ID(in_dev) ((in_dev)->cnf.medium_id)
#define IN_DEV_PROMOTE_SECONDARIES(in_dev) (ipv4_devconf.promote_secondaries || (in_dev)->cnf.promote_secondaries)
#define IN_DEV_RX_REDIRECTS(in_dev) \
((IN_DEV_FORWARD(in_dev) && \
include/linux/input.h
+1 -1
View File
@@ -1015,7 +1015,7 @@ static inline void input_set_abs_params(struct input_dev *dev, int axis, int min
dev->absbit[LONG(axis)] |= BIT(axis);
}
extern struct class_simple *input_class;
extern struct class *input_class;
#endif
#endif
include/linux/ip.h
+21
View File
@@ -81,6 +81,7 @@
#ifdef __KERNEL__
#include <linux/config.h>
#include <linux/types.h>
#include <net/request_sock.h>
#include <net/sock.h>
#include <linux/igmp.h>
#include <net/flow.h>
@@ -107,6 +108,26 @@ struct ip_options {
#define optlength(opt) (sizeof(struct ip_options) + opt->optlen)
struct inet_request_sock {
struct request_sock req;
u32 loc_addr;
u32 rmt_addr;
u16 rmt_port;
u16 snd_wscale : 4,
rcv_wscale : 4,
tstamp_ok : 1,
sack_ok : 1,
wscale_ok : 1,
ecn_ok : 1,
acked : 1;
struct ip_options *opt;
};
static inline struct inet_request_sock *inet_rsk(const struct request_sock *sk)
{
return (struct inet_request_sock *)sk;
}
struct ipv6_pinfo;
struct inet_sock {
include/linux/ipv6.h
+13
View File
@@ -193,6 +193,19 @@ struct inet6_skb_parm {
#define IP6CB(skb) ((struct inet6_skb_parm*)((skb)->cb))
struct tcp6_request_sock {
struct tcp_request_sock req;
struct in6_addr loc_addr;
struct in6_addr rmt_addr;
struct sk_buff *pktopts;
int iif;
};
static inline struct tcp6_request_sock *tcp6_rsk(const struct request_sock *sk)
{
return (struct tcp6_request_sock *)sk;
}
/**
* struct ipv6_pinfo - ipv6 private area
*
include/linux/klist.h
+55
View File
@@ -0,0 +1,55 @@
/*
* klist.h - Some generic list helpers, extending struct list_head a bit.
*
* Implementations are found in lib/klist.c
*
*
* Copyright (C) 2005 Patrick Mochel
*
* This file is rleased under the GPL v2.
*/
#include <linux/spinlock.h>
#include <linux/completion.h>
#include <linux/kref.h>
#include <linux/list.h>
struct klist {
spinlock_t k_lock;
struct list_head k_list;
};
extern void klist_init(struct klist * k);
struct klist_node {
struct klist * n_klist;
struct list_head n_node;
struct kref n_ref;
struct completion n_removed;
};
extern void klist_add_tail(struct klist * k, struct klist_node * n);
extern void klist_add_head(struct klist * k, struct klist_node * n);
extern void klist_del(struct klist_node * n);
extern void klist_remove(struct klist_node * n);
extern int klist_node_attached(struct klist_node * n);
struct klist_iter {
struct klist * i_klist;
struct list_head * i_head;
struct klist_node * i_cur;
};
extern void klist_iter_init(struct klist * k, struct klist_iter * i);
extern void klist_iter_init_node(struct klist * k, struct klist_iter * i,
struct klist_node * n);
extern void klist_iter_exit(struct klist_iter * i);
extern struct klist_node * klist_next(struct klist_iter * i);
include/linux/kobject.h
+4 -4
View File
@@ -33,7 +33,7 @@
extern u64 hotplug_seqnum;
struct kobject {
char * k_name;
const char * k_name;
char name[KOBJ_NAME_LEN];
struct kref kref;
struct list_head entry;
@@ -46,7 +46,7 @@ struct kobject {
extern int kobject_set_name(struct kobject *, const char *, ...)
__attribute__((format(printf,2,3)));
static inline char * kobject_name(struct kobject * kobj)
static inline const char * kobject_name(const struct kobject * kobj)
{
return kobj->k_name;
}
@@ -57,7 +57,7 @@ extern void kobject_cleanup(struct kobject *);
extern int kobject_add(struct kobject *);
extern void kobject_del(struct kobject *);
extern int kobject_rename(struct kobject *, char *new_name);
extern int kobject_rename(struct kobject *, const char *new_name);
extern int kobject_register(struct kobject *);
extern void kobject_unregister(struct kobject *);
@@ -94,7 +94,7 @@ struct kobj_type {
*/
struct kset_hotplug_ops {
int (*filter)(struct kset *kset, struct kobject *kobj);
char *(*name)(struct kset *kset, struct kobject *kobj);
const char *(*name)(struct kset *kset, struct kobject *kobj);
int (*hotplug)(struct kset *kset, struct kobject *kobj, char **envp,
int num_envp, char *buffer, int buffer_size);
};
include/linux/libata.h
+60
View File
@@ -410,6 +410,7 @@ extern u8 ata_chk_err(struct ata_port *ap);
extern void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf);
extern int ata_port_start (struct ata_port *ap);
extern void ata_port_stop (struct ata_port *ap);
extern void ata_host_stop (struct ata_host_set *host_set);
extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
extern void ata_qc_prep(struct ata_queued_cmd *qc);
extern int ata_qc_issue_prot(struct ata_queued_cmd *qc);
@@ -420,6 +421,7 @@ extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
extern unsigned int ata_dev_classify(struct ata_taskfile *tf);
extern void ata_dev_id_string(u16 *id, unsigned char *s,
unsigned int ofs, unsigned int len);
extern void ata_dev_config(struct ata_port *ap, unsigned int i);
extern void ata_bmdma_setup (struct ata_queued_cmd *qc);
extern void ata_bmdma_start (struct ata_queued_cmd *qc);
extern void ata_bmdma_stop(struct ata_port *ap);
@@ -466,12 +468,34 @@ static inline u8 ata_chk_status(struct ata_port *ap)
return ap->ops->check_status(ap);
}
/**
* ata_pause - Flush writes and pause 400 nanoseconds.
* @ap: Port to wait for.
*
* LOCKING:
* Inherited from caller.
*/
static inline void ata_pause(struct ata_port *ap)
{
ata_altstatus(ap);
ndelay(400);
}
/**
* ata_busy_wait - Wait for a port status register
* @ap: Port to wait for.
*
* Waits up to max*10 microseconds for the selected bits in the port's
* status register to be cleared.
* Returns final value of status register.
*
* LOCKING:
* Inherited from caller.
*/
static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
unsigned int max)
{
@@ -486,6 +510,18 @@ static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits,
return status;
}
/**
* ata_wait_idle - Wait for a port to be idle.
* @ap: Port to wait for.
*
* Waits up to 10ms for port's BUSY and DRQ signals to clear.
* Returns final value of status register.
*
* LOCKING:
* Inherited from caller.
*/
static inline u8 ata_wait_idle(struct ata_port *ap)
{
u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
@@ -524,6 +560,18 @@ static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, uns
tf->device = ATA_DEVICE_OBS | ATA_DEV1;
}
/**
* ata_irq_on - Enable interrupts on a port.
* @ap: Port on which interrupts are enabled.
*
* Enable interrupts on a legacy IDE device using MMIO or PIO,
* wait for idle, clear any pending interrupts.
*
* LOCKING:
* Inherited from caller.
*/
static inline u8 ata_irq_on(struct ata_port *ap)
{
struct ata_ioports *ioaddr = &ap->ioaddr;
@@ -543,6 +591,18 @@ static inline u8 ata_irq_on(struct ata_port *ap)
return tmp;
}
/**
* ata_irq_ack - Acknowledge a device interrupt.
* @ap: Port on which interrupts are enabled.
*
* Wait up to 10 ms for legacy IDE device to become idle (BUSY
* or BUSY+DRQ clear). Obtain dma status and port status from
* device. Clear the interrupt. Return port status.
*
* LOCKING:
*/
static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq)
{
unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY;
include/linux/major.h
+1
View File
@@ -100,6 +100,7 @@
#define I2O_MAJOR 80 /* 80->87 */
#define SHMIQ_MAJOR 85 /* Linux/mips, SGI /dev/shmiq */
#define SCSI_CHANGER_MAJOR 86
#define IDE6_MAJOR 88
#define IDE7_MAJOR 89
include/linux/netdevice.h
+3 -2
View File
@@ -204,7 +204,7 @@ struct hh_cache
/* cached hardware header; allow for machine alignment needs. */
#define HH_DATA_MOD 16
#define HH_DATA_OFF(__len) \
(HH_DATA_MOD - ((__len) & (HH_DATA_MOD - 1)))
(HH_DATA_MOD - (((__len - 1) & (HH_DATA_MOD - 1)) + 1))
#define HH_DATA_ALIGN(__len) \
(((__len)+(HH_DATA_MOD-1))&~(HH_DATA_MOD - 1))
unsigned long hh_data[HH_DATA_ALIGN(LL_MAX_HEADER) / sizeof(long)];
@@ -401,7 +401,7 @@ struct net_device
} reg_state;
/* Net device features */
int features;
unsigned long features;
#define NETIF_F_SG 1 /* Scatter/gather IO. */
#define NETIF_F_IP_CSUM 2 /* Can checksum only TCP/UDP over IPv4. */
#define NETIF_F_NO_CSUM 4 /* Does not require checksum. F.e. loopack. */
@@ -913,6 +913,7 @@ extern void dev_mc_discard(struct net_device *dev);
extern void dev_set_promiscuity(struct net_device *dev, int inc);
extern void dev_set_allmulti(struct net_device *dev, int inc);
extern void netdev_state_change(struct net_device *dev);
extern void netdev_features_change(struct net_device *dev);
/* Load a device via the kmod */
extern void dev_load(const char *name);
extern void dev_mcast_init(void);
include/linux/netlink.h
+21 -4
View File
@@ -14,6 +14,7 @@
#define NETLINK_SELINUX 7 /* SELinux event notifications */
#define NETLINK_ARPD 8
#define NETLINK_AUDIT 9 /* auditing */
#define NETLINK_FIB_LOOKUP 10
#define NETLINK_ROUTE6 11 /* af_inet6 route comm channel */
#define NETLINK_IP6_FW 13
#define NETLINK_DNRTMSG 14 /* DECnet routing messages */
@@ -156,7 +157,7 @@ struct netlink_notify
};
static __inline__ struct nlmsghdr *
__nlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, int type, int len)
__nlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, int type, int len, int flags)
{
struct nlmsghdr *nlh;
int size = NLMSG_LENGTH(len);
@@ -164,15 +165,31 @@ __nlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, int type, int len)
nlh = (struct nlmsghdr*)skb_put(skb, NLMSG_ALIGN(size));
nlh->nlmsg_type = type;
nlh->nlmsg_len = size;
nlh->nlmsg_flags = 0;
nlh->nlmsg_flags = flags;
nlh->nlmsg_pid = pid;
nlh->nlmsg_seq = seq;
return nlh;
}
#define NLMSG_NEW(skb, pid, seq, type, len, flags) \
({ if (skb_tailroom(skb) < (int)NLMSG_SPACE(len)) \
goto nlmsg_failure; \
__nlmsg_put(skb, pid, seq, type, len, flags); })
#define NLMSG_PUT(skb, pid, seq, type, len) \
({ if (skb_tailroom(skb) < (int)NLMSG_SPACE(len)) goto nlmsg_failure; \
__nlmsg_put(skb, pid, seq, type, len); })
NLMSG_NEW(skb, pid, seq, type, len, 0)
#define NLMSG_NEW_ANSWER(skb, cb, type, len, flags) \
NLMSG_NEW(skb, NETLINK_CB((cb)->skb).pid, \
(cb)->nlh->nlmsg_seq, type, len, flags)
#define NLMSG_END(skb, nlh) \
({ (nlh)->nlmsg_len = (skb)->tail - (unsigned char *) (nlh); \
(skb)->len; })
#define NLMSG_CANCEL(skb, nlh) \
({ skb_trim(skb, (unsigned char *) (nlh) - (skb)->data); \
-1; })
extern int netlink_dump_start(struct sock *ssk, struct sk_buff *skb,
struct nlmsghdr *nlh,
include/linux/node.h
+1
View File
@@ -27,6 +27,7 @@ struct node {
};
extern int register_node(struct node *, int, struct node *);
extern void unregister_node(struct node *node);
#define to_node(sys_device) container_of(sys_device, struct node, sysdev)
include/linux/notifier.h
+1
View File
@@ -56,6 +56,7 @@ extern int notifier_call_chain(struct notifier_block **n, unsigned long val, voi
#define NETDEV_CHANGEADDR 0x0008
#define NETDEV_GOING_DOWN 0x0009
#define NETDEV_CHANGENAME 0x000A
#define NETDEV_FEAT_CHANGE 0x000B
#define SYS_DOWN 0x0001 /* Notify of system down */
#define SYS_RESTART SYS_DOWN
include/linux/pci_ids.h
+9
View File
@@ -874,6 +874,7 @@
#define PCI_DEVICE_ID_APPLE_KL_USB_P 0x0026
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d
#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e
#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032
#define PCI_DEVIEC_ID_APPLE_UNI_N_ATA 0x0033
@@ -1230,6 +1231,12 @@
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259
#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267
#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268
#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269
#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282
@@ -2376,6 +2383,8 @@
#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582
#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590
#define PCI_DEVICE_ID_INTEL_82915GM_IG 0x2592
#define PCI_DEVICE_ID_INTEL_82945G_HB 0x2770
#define PCI_DEVICE_ID_INTEL_82945G_IG 0x2772
#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640
#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641
#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642
include/linux/pfkeyv2.h
+1
View File
@@ -245,6 +245,7 @@ struct sadb_x_nat_t_port {
/* Security Association flags */
#define SADB_SAFLAGS_PFS 1
#define SADB_SAFLAGS_NOPMTUDISC 0x20000000
#define SADB_SAFLAGS_DECAP_DSCP 0x40000000
#define SADB_SAFLAGS_NOECN 0x80000000
include/linux/rtnetlink.h
+176
View File
@@ -89,6 +89,13 @@ enum {
RTM_GETANYCAST = 62,
#define RTM_GETANYCAST RTM_GETANYCAST
RTM_NEWNEIGHTBL = 64,
#define RTM_NEWNEIGHTBL RTM_NEWNEIGHTBL
RTM_GETNEIGHTBL = 66,
#define RTM_GETNEIGHTBL RTM_GETNEIGHTBL
RTM_SETNEIGHTBL,
#define RTM_SETNEIGHTBL RTM_SETNEIGHTBL
__RTM_MAX,
#define RTM_MAX (((__RTM_MAX + 3) & ~3) - 1)
};
@@ -493,6 +500,106 @@ struct nda_cacheinfo
__u32 ndm_refcnt;
};
/*****************************************************************
* Neighbour tables specific messages.
*
* To retrieve the neighbour tables send RTM_GETNEIGHTBL with the
* NLM_F_DUMP flag set. Every neighbour table configuration is
* spread over multiple messages to avoid running into message
* size limits on systems with many interfaces. The first message
* in the sequence transports all not device specific data such as
* statistics, configuration, and the default parameter set.
* This message is followed by 0..n messages carrying device
* specific parameter sets.
* Although the ordering should be sufficient, NDTA_NAME can be
* used to identify sequences. The initial message can be identified
* by checking for NDTA_CONFIG. The device specific messages do
* not contain this TLV but have NDTPA_IFINDEX set to the
* corresponding interface index.
*
* To change neighbour table attributes, send RTM_SETNEIGHTBL
* with NDTA_NAME set. Changeable attribute include NDTA_THRESH[1-3],
* NDTA_GC_INTERVAL, and all TLVs in NDTA_PARMS unless marked
* otherwise. Device specific parameter sets can be changed by
* setting NDTPA_IFINDEX to the interface index of the corresponding
* device.
****/
struct ndt_stats
{
__u64 ndts_allocs;
__u64 ndts_destroys;
__u64 ndts_hash_grows;
__u64 ndts_res_failed;
__u64 ndts_lookups;
__u64 ndts_hits;
__u64 ndts_rcv_probes_mcast;
__u64 ndts_rcv_probes_ucast;
__u64 ndts_periodic_gc_runs;
__u64 ndts_forced_gc_runs;
};
enum {
NDTPA_UNSPEC,
NDTPA_IFINDEX, /* u32, unchangeable */
NDTPA_REFCNT, /* u32, read-only */
NDTPA_REACHABLE_TIME, /* u64, read-only, msecs */
NDTPA_BASE_REACHABLE_TIME, /* u64, msecs */
NDTPA_RETRANS_TIME, /* u64, msecs */
NDTPA_GC_STALETIME, /* u64, msecs */
NDTPA_DELAY_PROBE_TIME, /* u64, msecs */
NDTPA_QUEUE_LEN, /* u32 */
NDTPA_APP_PROBES, /* u32 */
NDTPA_UCAST_PROBES, /* u32 */
NDTPA_MCAST_PROBES, /* u32 */
NDTPA_ANYCAST_DELAY, /* u64, msecs */
NDTPA_PROXY_DELAY, /* u64, msecs */
NDTPA_PROXY_QLEN, /* u32 */
NDTPA_LOCKTIME, /* u64, msecs */
__NDTPA_MAX
};
#define NDTPA_MAX (__NDTPA_MAX - 1)
struct ndtmsg
{
__u8 ndtm_family;
__u8 ndtm_pad1;
__u16 ndtm_pad2;
};
struct ndt_config
{
__u16 ndtc_key_len;
__u16 ndtc_entry_size;
__u32 ndtc_entries;
__u32 ndtc_last_flush; /* delta to now in msecs */
__u32 ndtc_last_rand; /* delta to now in msecs */
__u32 ndtc_hash_rnd;
__u32 ndtc_hash_mask;
__u32 ndtc_hash_chain_gc;
__u32 ndtc_proxy_qlen;
};
enum {
NDTA_UNSPEC,
NDTA_NAME, /* char *, unchangeable */
NDTA_THRESH1, /* u32 */
NDTA_THRESH2, /* u32 */
NDTA_THRESH3, /* u32 */
NDTA_CONFIG, /* struct ndt_config, read-only */
NDTA_PARMS, /* nested TLV NDTPA_* */
NDTA_STATS, /* struct ndt_stats, read-only */
NDTA_GC_INTERVAL, /* u64, msecs */
__NDTA_MAX
};
#define NDTA_MAX (__NDTA_MAX - 1)
#define NDTA_RTA(r) ((struct rtattr*)(((char*)(r)) + \
NLMSG_ALIGN(sizeof(struct ndtmsg))))
#define NDTA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct ndtmsg))
/****
* General form of address family dependent message.
****/
@@ -789,6 +896,75 @@ extern void __rta_fill(struct sk_buff *skb, int attrtype, int attrlen, const voi
({ if (unlikely(skb_tailroom(skb) < (int)(attrlen))) \
goto rtattr_failure; \
memcpy(skb_put(skb, RTA_ALIGN(attrlen)), data, attrlen); })
#define RTA_PUT_U8(skb, attrtype, value) \
({ u8 _tmp = (value); \
RTA_PUT(skb, attrtype, sizeof(u8), &_tmp); })
#define RTA_PUT_U16(skb, attrtype, value) \
({ u16 _tmp = (value); \
RTA_PUT(skb, attrtype, sizeof(u16), &_tmp); })
#define RTA_PUT_U32(skb, attrtype, value) \
({ u32 _tmp = (value); \
RTA_PUT(skb, attrtype, sizeof(u32), &_tmp); })
#define RTA_PUT_U64(skb, attrtype, value) \
({ u64 _tmp = (value); \
RTA_PUT(skb, attrtype, sizeof(u64), &_tmp); })
#define RTA_PUT_SECS(skb, attrtype, value) \
RTA_PUT_U64(skb, attrtype, (value) / HZ)
#define RTA_PUT_MSECS(skb, attrtype, value) \
RTA_PUT_U64(skb, attrtype, jiffies_to_msecs(value))
#define RTA_PUT_STRING(skb, attrtype, value) \
RTA_PUT(skb, attrtype, strlen(value) + 1, value)
#define RTA_PUT_FLAG(skb, attrtype) \
RTA_PUT(skb, attrtype, 0, NULL);
#define RTA_NEST(skb, type) \
({ struct rtattr *__start = (struct rtattr *) (skb)->tail; \
RTA_PUT(skb, type, 0, NULL); \
__start; })
#define RTA_NEST_END(skb, start) \
({ (start)->rta_len = ((skb)->tail - (unsigned char *) (start)); \
(skb)->len; })
#define RTA_NEST_CANCEL(skb, start) \
({ if (start) \
skb_trim(skb, (unsigned char *) (start) - (skb)->data); \
-1; })
#define RTA_GET_U8(rta) \
({ if (!rta || RTA_PAYLOAD(rta) < sizeof(u8)) \
goto rtattr_failure; \
*(u8 *) RTA_DATA(rta); })
#define RTA_GET_U16(rta) \
({ if (!rta || RTA_PAYLOAD(rta) < sizeof(u16)) \
goto rtattr_failure; \
*(u16 *) RTA_DATA(rta); })
#define RTA_GET_U32(rta) \
({ if (!rta || RTA_PAYLOAD(rta) < sizeof(u32)) \
goto rtattr_failure; \
*(u32 *) RTA_DATA(rta); })
#define RTA_GET_U64(rta) \
({ u64 _tmp; \
if (!rta || RTA_PAYLOAD(rta) < sizeof(u64)) \
goto rtattr_failure; \
memcpy(&_tmp, RTA_DATA(rta), sizeof(_tmp)); \
_tmp; })
#define RTA_GET_FLAG(rta) (!!(rta))
#define RTA_GET_SECS(rta) ((unsigned long) RTA_GET_U64(rta) * HZ)
#define RTA_GET_MSECS(rta) (msecs_to_jiffies((unsigned long) RTA_GET_U64(rta)))
static inline struct rtattr *
__rta_reserve(struct sk_buff *skb, int attrtype, int attrlen)
include/linux/signal.h
-2
View File
@@ -231,10 +231,8 @@ extern int __group_send_sig_info(int, struct siginfo *, struct task_struct *);
extern long do_sigpending(void __user *, unsigned long);
extern int sigprocmask(int, sigset_t *, sigset_t *);
#ifndef HAVE_ARCH_GET_SIGNAL_TO_DELIVER
struct pt_regs;
extern int get_signal_to_deliver(siginfo_t *info, struct k_sigaction *return_ka, struct pt_regs *regs, void *cookie);
#endif
#endif /* __KERNEL__ */
include/linux/slab.h
+1
View File
@@ -64,6 +64,7 @@ extern int kmem_cache_shrink(kmem_cache_t *);
extern void *kmem_cache_alloc(kmem_cache_t *, unsigned int __nocast);
extern void kmem_cache_free(kmem_cache_t *, void *);
extern unsigned int kmem_cache_size(kmem_cache_t *);
extern const char *kmem_cache_name(kmem_cache_t *);
extern kmem_cache_t *kmem_find_general_cachep(size_t size, int gfpflags);
/* Size description struct for general caches. */

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