Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (143 commits) USB: xhci depends on PCI. USB: xhci: Add Makefile, MAINTAINERS, and Kconfig entries. USB: xhci: Respect critical sections. USB: xHCI: Fix interrupt moderation. USB: xhci: Remove packed attribute from structures. usb; xhci: Fix TRB offset calculations. USB: xhci: replace if-elseif-else with switch-case USB: xhci: Make xhci-mem.c include linux/dmapool.h USB: xhci: drop spinlock in xhci_urb_enqueue() error path. USB: Change names of SuperSpeed ep companion descriptor structs. USB: xhci: Avoid compiler reordering in Link TRB giveback. USB: xhci: Clean up xhci_irq() function. USB: xhci: Avoid global namespace pollution. USB: xhci: Fix Link TRB handoff bit twiddling. USB: xhci: Fix register write order. USB: xhci: fix some compiler warnings in xhci.h USB: xhci: fix lots of compiler warnings. USB: xhci: use xhci_handle_event instead of handle_event USB: xhci: URB cancellation support. USB: xhci: Scatter gather list support for bulk transfers. ...
This commit is contained in:
Linus Torvalds
+29
-6
@@ -3,8 +3,23 @@
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
/* unicode character */
|
||||
typedef __u16 wchar_t;
|
||||
/* Unicode has changed over the years. Unicode code points no longer
|
||||
* fit into 16 bits; as of Unicode 5 valid code points range from 0
|
||||
* to 0x10ffff (17 planes, where each plane holds 65536 code points).
|
||||
*
|
||||
* The original decision to represent Unicode characters as 16-bit
|
||||
* wchar_t values is now outdated. But plane 0 still includes the
|
||||
* most commonly used characters, so we will retain it. The newer
|
||||
* 32-bit unicode_t type can be used when it is necessary to
|
||||
* represent the full Unicode character set.
|
||||
*/
|
||||
|
||||
/* Plane-0 Unicode character */
|
||||
typedef u16 wchar_t;
|
||||
#define MAX_WCHAR_T 0xffff
|
||||
|
||||
/* Arbitrary Unicode character */
|
||||
typedef u32 unicode_t;
|
||||
|
||||
struct nls_table {
|
||||
const char *charset;
|
||||
@@ -21,6 +36,13 @@ struct nls_table {
|
||||
/* this value hold the maximum octet of charset */
|
||||
#define NLS_MAX_CHARSET_SIZE 6 /* for UTF-8 */
|
||||
|
||||
/* Byte order for UTF-16 strings */
|
||||
enum utf16_endian {
|
||||
UTF16_HOST_ENDIAN,
|
||||
UTF16_LITTLE_ENDIAN,
|
||||
UTF16_BIG_ENDIAN
|
||||
};
|
||||
|
||||
/* nls.c */
|
||||
extern int register_nls(struct nls_table *);
|
||||
extern int unregister_nls(struct nls_table *);
|
||||
@@ -28,10 +50,11 @@ extern struct nls_table *load_nls(char *);
|
||||
extern void unload_nls(struct nls_table *);
|
||||
extern struct nls_table *load_nls_default(void);
|
||||
|
||||
extern int utf8_mbtowc(wchar_t *, const __u8 *, int);
|
||||
extern int utf8_mbstowcs(wchar_t *, const __u8 *, int);
|
||||
extern int utf8_wctomb(__u8 *, wchar_t, int);
|
||||
extern int utf8_wcstombs(__u8 *, const wchar_t *, int);
|
||||
extern int utf8_to_utf32(const u8 *s, int len, unicode_t *pu);
|
||||
extern int utf32_to_utf8(unicode_t u, u8 *s, int maxlen);
|
||||
extern int utf8s_to_utf16s(const u8 *s, int len, wchar_t *pwcs);
|
||||
extern int utf16s_to_utf8s(const wchar_t *pwcs, int len,
|
||||
enum utf16_endian endian, u8 *s, int maxlen);
|
||||
|
||||
static inline unsigned char nls_tolower(struct nls_table *t, unsigned char c)
|
||||
{
|
||||
|
||||
@@ -124,6 +124,14 @@ typedef int __bitwise pci_power_t;
|
||||
#define PCI_UNKNOWN ((pci_power_t __force) 5)
|
||||
#define PCI_POWER_ERROR ((pci_power_t __force) -1)
|
||||
|
||||
/* Remember to update this when the list above changes! */
|
||||
extern const char *pci_power_names[];
|
||||
|
||||
static inline const char *pci_power_name(pci_power_t state)
|
||||
{
|
||||
return pci_power_names[1 + (int) state];
|
||||
}
|
||||
|
||||
#define PCI_PM_D2_DELAY 200
|
||||
#define PCI_PM_D3_WAIT 10
|
||||
#define PCI_PM_BUS_WAIT 50
|
||||
|
||||
@@ -104,6 +104,7 @@
|
||||
#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300
|
||||
#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310
|
||||
#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320
|
||||
#define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330
|
||||
#define PCI_CLASS_SERIAL_FIBER 0x0c04
|
||||
#define PCI_CLASS_SERIAL_SMBUS 0x0c05
|
||||
|
||||
|
||||
+30
-4
@@ -36,6 +36,7 @@ struct wusb_dev;
|
||||
* - configs have one (often) or more interfaces;
|
||||
* - interfaces have one (usually) or more settings;
|
||||
* - each interface setting has zero or (usually) more endpoints.
|
||||
* - a SuperSpeed endpoint has a companion descriptor
|
||||
*
|
||||
* And there might be other descriptors mixed in with those.
|
||||
*
|
||||
@@ -44,6 +45,19 @@ struct wusb_dev;
|
||||
|
||||
struct ep_device;
|
||||
|
||||
/* For SS devices */
|
||||
/**
|
||||
* struct usb_host_ss_ep_comp - Valid for SuperSpeed devices only
|
||||
* @desc: endpoint companion descriptor, wMaxPacketSize in native byteorder
|
||||
* @extra: descriptors following this endpoint companion descriptor
|
||||
* @extralen: how many bytes of "extra" are valid
|
||||
*/
|
||||
struct usb_host_ss_ep_comp {
|
||||
struct usb_ss_ep_comp_descriptor desc;
|
||||
unsigned char *extra; /* Extra descriptors */
|
||||
int extralen;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct usb_host_endpoint - host-side endpoint descriptor and queue
|
||||
* @desc: descriptor for this endpoint, wMaxPacketSize in native byteorder
|
||||
@@ -51,6 +65,7 @@ struct ep_device;
|
||||
* @hcpriv: for use by HCD; typically holds hardware dma queue head (QH)
|
||||
* with one or more transfer descriptors (TDs) per urb
|
||||
* @ep_dev: ep_device for sysfs info
|
||||
* @ss_ep_comp: companion descriptor information for this endpoint
|
||||
* @extra: descriptors following this endpoint in the configuration
|
||||
* @extralen: how many bytes of "extra" are valid
|
||||
* @enabled: URBs may be submitted to this endpoint
|
||||
@@ -63,6 +78,7 @@ struct usb_host_endpoint {
|
||||
struct list_head urb_list;
|
||||
void *hcpriv;
|
||||
struct ep_device *ep_dev; /* For sysfs info */
|
||||
struct usb_host_ss_ep_comp *ss_ep_comp; /* For SS devices */
|
||||
|
||||
unsigned char *extra; /* Extra descriptors */
|
||||
int extralen;
|
||||
@@ -336,7 +352,6 @@ struct usb_bus {
|
||||
#ifdef CONFIG_USB_DEVICEFS
|
||||
struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */
|
||||
#endif
|
||||
struct device *dev; /* device for this bus */
|
||||
|
||||
#if defined(CONFIG_USB_MON) || defined(CONFIG_USB_MON_MODULE)
|
||||
struct mon_bus *mon_bus; /* non-null when associated */
|
||||
@@ -363,6 +378,7 @@ struct usb_tt;
|
||||
* struct usb_device - kernel's representation of a USB device
|
||||
* @devnum: device number; address on a USB bus
|
||||
* @devpath: device ID string for use in messages (e.g., /port/...)
|
||||
* @route: tree topology hex string for use with xHCI
|
||||
* @state: device state: configured, not attached, etc.
|
||||
* @speed: device speed: high/full/low (or error)
|
||||
* @tt: Transaction Translator info; used with low/full speed dev, highspeed hub
|
||||
@@ -420,6 +436,7 @@ struct usb_tt;
|
||||
* @skip_sys_resume: skip the next system resume
|
||||
* @wusb_dev: if this is a Wireless USB device, link to the WUSB
|
||||
* specific data for the device.
|
||||
* @slot_id: Slot ID assigned by xHCI
|
||||
*
|
||||
* Notes:
|
||||
* Usbcore drivers should not set usbdev->state directly. Instead use
|
||||
@@ -428,6 +445,7 @@ struct usb_tt;
|
||||
struct usb_device {
|
||||
int devnum;
|
||||
char devpath [16];
|
||||
u32 route;
|
||||
enum usb_device_state state;
|
||||
enum usb_device_speed speed;
|
||||
|
||||
@@ -503,6 +521,7 @@ struct usb_device {
|
||||
unsigned skip_sys_resume:1;
|
||||
#endif
|
||||
struct wusb_dev *wusb_dev;
|
||||
int slot_id;
|
||||
};
|
||||
#define to_usb_device(d) container_of(d, struct usb_device, dev)
|
||||
|
||||
@@ -1044,7 +1063,9 @@ typedef void (*usb_complete_t)(struct urb *);
|
||||
* @setup_dma: For control transfers with URB_NO_SETUP_DMA_MAP set, the
|
||||
* device driver has provided this DMA address for the setup packet.
|
||||
* The host controller driver should use this in preference to
|
||||
* setup_packet.
|
||||
* setup_packet, but the HCD may chose to ignore the address if it must
|
||||
* copy the setup packet into internal structures. Therefore, setup_packet
|
||||
* must always point to a valid buffer.
|
||||
* @start_frame: Returns the initial frame for isochronous transfers.
|
||||
* @number_of_packets: Lists the number of ISO transfer buffers.
|
||||
* @interval: Specifies the polling interval for interrupt or isochronous
|
||||
@@ -1180,6 +1201,8 @@ struct urb {
|
||||
unsigned int transfer_flags; /* (in) URB_SHORT_NOT_OK | ...*/
|
||||
void *transfer_buffer; /* (in) associated data buffer */
|
||||
dma_addr_t transfer_dma; /* (in) dma addr for transfer_buffer */
|
||||
struct usb_sg_request *sg; /* (in) scatter gather buffer list */
|
||||
int num_sgs; /* (in) number of entries in the sg list */
|
||||
u32 transfer_buffer_length; /* (in) data buffer length */
|
||||
u32 actual_length; /* (return) actual transfer length */
|
||||
unsigned char *setup_packet; /* (in) setup packet (control only) */
|
||||
@@ -1425,8 +1448,8 @@ struct usb_sg_request {
|
||||
int status;
|
||||
size_t bytes;
|
||||
|
||||
/*
|
||||
* members below are private: to usbcore,
|
||||
/* private:
|
||||
* members below are private to usbcore,
|
||||
* and are not provided for driver access!
|
||||
*/
|
||||
spinlock_t lock;
|
||||
@@ -1561,6 +1584,9 @@ extern void usb_unregister_notify(struct notifier_block *nb);
|
||||
#define err(format, arg...) printk(KERN_ERR KBUILD_MODNAME ": " \
|
||||
format "\n" , ## arg)
|
||||
|
||||
/* debugfs stuff */
|
||||
extern struct dentry *usb_debug_root;
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif
|
||||
|
||||
+263
-2
@@ -24,10 +24,75 @@
|
||||
#define USB_SUBCLASS_AUDIOCONTROL 0x01
|
||||
#define USB_SUBCLASS_AUDIOSTREAMING 0x02
|
||||
#define USB_SUBCLASS_MIDISTREAMING 0x03
|
||||
#define USB_SUBCLASS_VENDOR_SPEC 0xff
|
||||
|
||||
/* A.5 Audio Class-Specific AC interface Descriptor Subtypes*/
|
||||
#define HEADER 0x01
|
||||
#define INPUT_TERMINAL 0x02
|
||||
#define OUTPUT_TERMINAL 0x03
|
||||
#define MIXER_UNIT 0x04
|
||||
#define SELECTOR_UNIT 0x05
|
||||
#define FEATURE_UNIT 0x06
|
||||
#define PROCESSING_UNIT 0x07
|
||||
#define EXTENSION_UNIT 0x08
|
||||
|
||||
#define AS_GENERAL 0x01
|
||||
#define FORMAT_TYPE 0x02
|
||||
#define FORMAT_SPECIFIC 0x03
|
||||
|
||||
#define EP_GENERAL 0x01
|
||||
|
||||
#define MS_GENERAL 0x01
|
||||
#define MIDI_IN_JACK 0x02
|
||||
#define MIDI_OUT_JACK 0x03
|
||||
|
||||
/* endpoint attributes */
|
||||
#define EP_ATTR_MASK 0x0c
|
||||
#define EP_ATTR_ASYNC 0x04
|
||||
#define EP_ATTR_ADAPTIVE 0x08
|
||||
#define EP_ATTR_SYNC 0x0c
|
||||
|
||||
/* cs endpoint attributes */
|
||||
#define EP_CS_ATTR_SAMPLE_RATE 0x01
|
||||
#define EP_CS_ATTR_PITCH_CONTROL 0x02
|
||||
#define EP_CS_ATTR_FILL_MAX 0x80
|
||||
|
||||
/* Audio Class specific Request Codes */
|
||||
#define USB_AUDIO_SET_INTF 0x21
|
||||
#define USB_AUDIO_SET_ENDPOINT 0x22
|
||||
#define USB_AUDIO_GET_INTF 0xa1
|
||||
#define USB_AUDIO_GET_ENDPOINT 0xa2
|
||||
|
||||
#define SET_ 0x00
|
||||
#define GET_ 0x80
|
||||
|
||||
#define _CUR 0x1
|
||||
#define _MIN 0x2
|
||||
#define _MAX 0x3
|
||||
#define _RES 0x4
|
||||
#define _MEM 0x5
|
||||
|
||||
#define SET_CUR (SET_ | _CUR)
|
||||
#define GET_CUR (GET_ | _CUR)
|
||||
#define SET_MIN (SET_ | _MIN)
|
||||
#define GET_MIN (GET_ | _MIN)
|
||||
#define SET_MAX (SET_ | _MAX)
|
||||
#define GET_MAX (GET_ | _MAX)
|
||||
#define SET_RES (SET_ | _RES)
|
||||
#define GET_RES (GET_ | _RES)
|
||||
#define SET_MEM (SET_ | _MEM)
|
||||
#define GET_MEM (GET_ | _MEM)
|
||||
|
||||
#define GET_STAT 0xff
|
||||
|
||||
#define USB_AC_TERMINAL_UNDEFINED 0x100
|
||||
#define USB_AC_TERMINAL_STREAMING 0x101
|
||||
#define USB_AC_TERMINAL_VENDOR_SPEC 0x1FF
|
||||
|
||||
/* Terminal Control Selectors */
|
||||
/* 4.3.2 Class-Specific AC Interface Descriptor */
|
||||
struct usb_ac_header_descriptor {
|
||||
__u8 bLength; /* 8+n */
|
||||
__u8 bLength; /* 8 + n */
|
||||
__u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
|
||||
__u8 bDescriptorSubtype; /* USB_MS_HEADER */
|
||||
__le16 bcdADC; /* 0x0100 */
|
||||
@@ -36,7 +101,7 @@ struct usb_ac_header_descriptor {
|
||||
__u8 baInterfaceNr[]; /* [n] */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USB_DT_AC_HEADER_SIZE(n) (8+(n))
|
||||
#define USB_DT_AC_HEADER_SIZE(n) (8 + (n))
|
||||
|
||||
/* As above, but more useful for defining your own descriptors: */
|
||||
#define DECLARE_USB_AC_HEADER_DESCRIPTOR(n) \
|
||||
@@ -50,4 +115,200 @@ struct usb_ac_header_descriptor_##n { \
|
||||
__u8 baInterfaceNr[n]; \
|
||||
} __attribute__ ((packed))
|
||||
|
||||
/* 4.3.2.1 Input Terminal Descriptor */
|
||||
struct usb_input_terminal_descriptor {
|
||||
__u8 bLength; /* in bytes: 12 */
|
||||
__u8 bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
__u8 bDescriptorSubtype; /* INPUT_TERMINAL descriptor subtype */
|
||||
__u8 bTerminalID; /* Constant uniquely terminal ID */
|
||||
__le16 wTerminalType; /* USB Audio Terminal Types */
|
||||
__u8 bAssocTerminal; /* ID of the Output Terminal associated */
|
||||
__u8 bNrChannels; /* Number of logical output channels */
|
||||
__le16 wChannelConfig;
|
||||
__u8 iChannelNames;
|
||||
__u8 iTerminal;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USB_DT_AC_INPUT_TERMINAL_SIZE 12
|
||||
|
||||
#define USB_AC_INPUT_TERMINAL_UNDEFINED 0x200
|
||||
#define USB_AC_INPUT_TERMINAL_MICROPHONE 0x201
|
||||
#define USB_AC_INPUT_TERMINAL_DESKTOP_MICROPHONE 0x202
|
||||
#define USB_AC_INPUT_TERMINAL_PERSONAL_MICROPHONE 0x203
|
||||
#define USB_AC_INPUT_TERMINAL_OMNI_DIR_MICROPHONE 0x204
|
||||
#define USB_AC_INPUT_TERMINAL_MICROPHONE_ARRAY 0x205
|
||||
#define USB_AC_INPUT_TERMINAL_PROC_MICROPHONE_ARRAY 0x206
|
||||
|
||||
/* 4.3.2.2 Output Terminal Descriptor */
|
||||
struct usb_output_terminal_descriptor {
|
||||
__u8 bLength; /* in bytes: 9 */
|
||||
__u8 bDescriptorType; /* CS_INTERFACE descriptor type */
|
||||
__u8 bDescriptorSubtype; /* OUTPUT_TERMINAL descriptor subtype */
|
||||
__u8 bTerminalID; /* Constant uniquely terminal ID */
|
||||
__le16 wTerminalType; /* USB Audio Terminal Types */
|
||||
__u8 bAssocTerminal; /* ID of the Input Terminal associated */
|
||||
__u8 bSourceID; /* ID of the connected Unit or Terminal*/
|
||||
__u8 iTerminal;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USB_DT_AC_OUTPUT_TERMINAL_SIZE 9
|
||||
|
||||
#define USB_AC_OUTPUT_TERMINAL_UNDEFINED 0x300
|
||||
#define USB_AC_OUTPUT_TERMINAL_SPEAKER 0x301
|
||||
#define USB_AC_OUTPUT_TERMINAL_HEADPHONES 0x302
|
||||
#define USB_AC_OUTPUT_TERMINAL_HEAD_MOUNTED_DISPLAY_AUDIO 0x303
|
||||
#define USB_AC_OUTPUT_TERMINAL_DESKTOP_SPEAKER 0x304
|
||||
#define USB_AC_OUTPUT_TERMINAL_ROOM_SPEAKER 0x305
|
||||
#define USB_AC_OUTPUT_TERMINAL_COMMUNICATION_SPEAKER 0x306
|
||||
#define USB_AC_OUTPUT_TERMINAL_LOW_FREQ_EFFECTS_SPEAKER 0x307
|
||||
|
||||
/* Set bControlSize = 2 as default setting */
|
||||
#define USB_DT_AC_FEATURE_UNIT_SIZE(ch) (7 + ((ch) + 1) * 2)
|
||||
|
||||
/* As above, but more useful for defining your own descriptors: */
|
||||
#define DECLARE_USB_AC_FEATURE_UNIT_DESCRIPTOR(ch) \
|
||||
struct usb_ac_feature_unit_descriptor_##ch { \
|
||||
__u8 bLength; \
|
||||
__u8 bDescriptorType; \
|
||||
__u8 bDescriptorSubtype; \
|
||||
__u8 bUnitID; \
|
||||
__u8 bSourceID; \
|
||||
__u8 bControlSize; \
|
||||
__le16 bmaControls[ch + 1]; \
|
||||
__u8 iFeature; \
|
||||
} __attribute__ ((packed))
|
||||
|
||||
/* 4.5.2 Class-Specific AS Interface Descriptor */
|
||||
struct usb_as_header_descriptor {
|
||||
__u8 bLength; /* in bytes: 7 */
|
||||
__u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
|
||||
__u8 bDescriptorSubtype; /* AS_GENERAL */
|
||||
__u8 bTerminalLink; /* Terminal ID of connected Terminal */
|
||||
__u8 bDelay; /* Delay introduced by the data path */
|
||||
__le16 wFormatTag; /* The Audio Data Format */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USB_DT_AS_HEADER_SIZE 7
|
||||
|
||||
#define USB_AS_AUDIO_FORMAT_TYPE_I_UNDEFINED 0x0
|
||||
#define USB_AS_AUDIO_FORMAT_TYPE_I_PCM 0x1
|
||||
#define USB_AS_AUDIO_FORMAT_TYPE_I_PCM8 0x2
|
||||
#define USB_AS_AUDIO_FORMAT_TYPE_I_IEEE_FLOAT 0x3
|
||||
#define USB_AS_AUDIO_FORMAT_TYPE_I_ALAW 0x4
|
||||
#define USB_AS_AUDIO_FORMAT_TYPE_I_MULAW 0x5
|
||||
|
||||
struct usb_as_format_type_i_continuous_descriptor {
|
||||
__u8 bLength; /* in bytes: 8 + (ns * 3) */
|
||||
__u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
|
||||
__u8 bDescriptorSubtype; /* FORMAT_TYPE */
|
||||
__u8 bFormatType; /* FORMAT_TYPE_1 */
|
||||
__u8 bNrChannels; /* physical channels in the stream */
|
||||
__u8 bSubframeSize; /* */
|
||||
__u8 bBitResolution;
|
||||
__u8 bSamFreqType;
|
||||
__u8 tLowerSamFreq[3];
|
||||
__u8 tUpperSamFreq[3];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USB_AS_FORMAT_TYPE_I_CONTINUOUS_DESC_SIZE 14
|
||||
|
||||
struct usb_as_formate_type_i_discrete_descriptor {
|
||||
__u8 bLength; /* in bytes: 8 + (ns * 3) */
|
||||
__u8 bDescriptorType; /* USB_DT_CS_INTERFACE */
|
||||
__u8 bDescriptorSubtype; /* FORMAT_TYPE */
|
||||
__u8 bFormatType; /* FORMAT_TYPE_1 */
|
||||
__u8 bNrChannels; /* physical channels in the stream */
|
||||
__u8 bSubframeSize; /* */
|
||||
__u8 bBitResolution;
|
||||
__u8 bSamFreqType;
|
||||
__u8 tSamFreq[][3];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define DECLARE_USB_AS_FORMAT_TYPE_I_DISCRETE_DESC(n) \
|
||||
struct usb_as_formate_type_i_discrete_descriptor_##n { \
|
||||
__u8 bLength; \
|
||||
__u8 bDescriptorType; \
|
||||
__u8 bDescriptorSubtype; \
|
||||
__u8 bFormatType; \
|
||||
__u8 bNrChannels; \
|
||||
__u8 bSubframeSize; \
|
||||
__u8 bBitResolution; \
|
||||
__u8 bSamFreqType; \
|
||||
__u8 tSamFreq[n][3]; \
|
||||
} __attribute__ ((packed))
|
||||
|
||||
#define USB_AS_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(n) (8 + (n * 3))
|
||||
|
||||
#define USB_AS_FORMAT_TYPE_UNDEFINED 0x0
|
||||
#define USB_AS_FORMAT_TYPE_I 0x1
|
||||
#define USB_AS_FORMAT_TYPE_II 0x2
|
||||
#define USB_AS_FORMAT_TYPE_III 0x3
|
||||
|
||||
#define USB_AS_ENDPOINT_ASYNC (1 << 2)
|
||||
#define USB_AS_ENDPOINT_ADAPTIVE (2 << 2)
|
||||
#define USB_AS_ENDPOINT_SYNC (3 << 2)
|
||||
|
||||
struct usb_as_iso_endpoint_descriptor {
|
||||
__u8 bLength; /* in bytes: 7 */
|
||||
__u8 bDescriptorType; /* USB_DT_CS_ENDPOINT */
|
||||
__u8 bDescriptorSubtype; /* EP_GENERAL */
|
||||
__u8 bmAttributes;
|
||||
__u8 bLockDelayUnits;
|
||||
__le16 wLockDelay;
|
||||
};
|
||||
#define USB_AS_ISO_ENDPOINT_DESC_SIZE 7
|
||||
|
||||
#define FU_CONTROL_UNDEFINED 0x00
|
||||
#define MUTE_CONTROL 0x01
|
||||
#define VOLUME_CONTROL 0x02
|
||||
#define BASS_CONTROL 0x03
|
||||
#define MID_CONTROL 0x04
|
||||
#define TREBLE_CONTROL 0x05
|
||||
#define GRAPHIC_EQUALIZER_CONTROL 0x06
|
||||
#define AUTOMATIC_GAIN_CONTROL 0x07
|
||||
#define DELAY_CONTROL 0x08
|
||||
#define BASS_BOOST_CONTROL 0x09
|
||||
#define LOUDNESS_CONTROL 0x0a
|
||||
|
||||
#define FU_MUTE (1 << (MUTE_CONTROL - 1))
|
||||
#define FU_VOLUME (1 << (VOLUME_CONTROL - 1))
|
||||
#define FU_BASS (1 << (BASS_CONTROL - 1))
|
||||
#define FU_MID (1 << (MID_CONTROL - 1))
|
||||
#define FU_TREBLE (1 << (TREBLE_CONTROL - 1))
|
||||
#define FU_GRAPHIC_EQ (1 << (GRAPHIC_EQUALIZER_CONTROL - 1))
|
||||
#define FU_AUTO_GAIN (1 << (AUTOMATIC_GAIN_CONTROL - 1))
|
||||
#define FU_DELAY (1 << (DELAY_CONTROL - 1))
|
||||
#define FU_BASS_BOOST (1 << (BASS_BOOST_CONTROL - 1))
|
||||
#define FU_LOUDNESS (1 << (LOUDNESS_CONTROL - 1))
|
||||
|
||||
struct usb_audio_control {
|
||||
struct list_head list;
|
||||
const char *name;
|
||||
u8 type;
|
||||
int data[5];
|
||||
int (*set)(struct usb_audio_control *con, u8 cmd, int value);
|
||||
int (*get)(struct usb_audio_control *con, u8 cmd);
|
||||
};
|
||||
|
||||
static inline int generic_set_cmd(struct usb_audio_control *con, u8 cmd, int value)
|
||||
{
|
||||
con->data[cmd] = value;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int generic_get_cmd(struct usb_audio_control *con, u8 cmd)
|
||||
{
|
||||
return con->data[cmd];
|
||||
}
|
||||
|
||||
struct usb_audio_control_selector {
|
||||
struct list_head list;
|
||||
struct list_head control;
|
||||
u8 id;
|
||||
const char *name;
|
||||
u8 type;
|
||||
struct usb_descriptor_header *desc;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_USB_AUDIO_H */
|
||||
|
||||
@@ -191,6 +191,8 @@ struct usb_ctrlrequest {
|
||||
#define USB_DT_WIRE_ADAPTER 0x21
|
||||
#define USB_DT_RPIPE 0x22
|
||||
#define USB_DT_CS_RADIO_CONTROL 0x23
|
||||
/* From the USB 3.0 spec */
|
||||
#define USB_DT_SS_ENDPOINT_COMP 0x30
|
||||
|
||||
/* Conventional codes for class-specific descriptors. The convention is
|
||||
* defined in the USB "Common Class" Spec (3.11). Individual class specs
|
||||
@@ -535,6 +537,20 @@ static inline int usb_endpoint_is_isoc_out(
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* USB_DT_SS_ENDPOINT_COMP: SuperSpeed Endpoint Companion descriptor */
|
||||
struct usb_ss_ep_comp_descriptor {
|
||||
__u8 bLength;
|
||||
__u8 bDescriptorType;
|
||||
|
||||
__u8 bMaxBurst;
|
||||
__u8 bmAttributes;
|
||||
__u16 wBytesPerInterval;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#define USB_DT_SS_EP_COMP_SIZE 6
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* USB_DT_DEVICE_QUALIFIER: Device Qualifier descriptor */
|
||||
struct usb_qualifier_descriptor {
|
||||
__u8 bLength;
|
||||
@@ -752,6 +768,7 @@ enum usb_device_speed {
|
||||
USB_SPEED_LOW, USB_SPEED_FULL, /* usb 1.1 */
|
||||
USB_SPEED_HIGH, /* usb 2.0 */
|
||||
USB_SPEED_VARIABLE, /* wireless (usb 2.5) */
|
||||
USB_SPEED_SUPER, /* usb 3.0 */
|
||||
};
|
||||
|
||||
enum usb_device_state {
|
||||
|
||||
@@ -124,6 +124,7 @@ struct usb_function {
|
||||
void (*suspend)(struct usb_function *);
|
||||
void (*resume)(struct usb_function *);
|
||||
|
||||
/* private: */
|
||||
/* internals */
|
||||
struct list_head list;
|
||||
};
|
||||
@@ -219,6 +220,7 @@ struct usb_configuration {
|
||||
|
||||
struct usb_composite_dev *cdev;
|
||||
|
||||
/* private: */
|
||||
/* internals */
|
||||
struct list_head list;
|
||||
struct list_head functions;
|
||||
@@ -321,6 +323,7 @@ struct usb_composite_dev {
|
||||
|
||||
struct usb_configuration *config;
|
||||
|
||||
/* private: */
|
||||
/* internals */
|
||||
struct usb_device_descriptor desc;
|
||||
struct list_head configs;
|
||||
|
||||
@@ -0,0 +1,177 @@
|
||||
/*
|
||||
* Intel Langwell USB OTG transceiver driver
|
||||
* Copyright (C) 2008, Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __LANGWELL_OTG_H__
|
||||
#define __LANGWELL_OTG_H__
|
||||
|
||||
/* notify transceiver driver about OTG events */
|
||||
extern void langwell_update_transceiver(void);
|
||||
/* HCD register bus driver */
|
||||
extern int langwell_register_host(struct pci_driver *host_driver);
|
||||
/* HCD unregister bus driver */
|
||||
extern void langwell_unregister_host(struct pci_driver *host_driver);
|
||||
/* DCD register bus driver */
|
||||
extern int langwell_register_peripheral(struct pci_driver *client_driver);
|
||||
/* DCD unregister bus driver */
|
||||
extern void langwell_unregister_peripheral(struct pci_driver *client_driver);
|
||||
/* No silent failure, output warning message */
|
||||
extern void langwell_otg_nsf_msg(unsigned long message);
|
||||
|
||||
#define CI_USBCMD 0x30
|
||||
# define USBCMD_RST BIT(1)
|
||||
# define USBCMD_RS BIT(0)
|
||||
#define CI_USBSTS 0x34
|
||||
# define USBSTS_SLI BIT(8)
|
||||
# define USBSTS_URI BIT(6)
|
||||
# define USBSTS_PCI BIT(2)
|
||||
#define CI_PORTSC1 0x74
|
||||
# define PORTSC_PP BIT(12)
|
||||
# define PORTSC_LS (BIT(11) | BIT(10))
|
||||
# define PORTSC_SUSP BIT(7)
|
||||
# define PORTSC_CCS BIT(0)
|
||||
#define CI_HOSTPC1 0xb4
|
||||
# define HOSTPC1_PHCD BIT(22)
|
||||
#define CI_OTGSC 0xf4
|
||||
# define OTGSC_DPIE BIT(30)
|
||||
# define OTGSC_1MSE BIT(29)
|
||||
# define OTGSC_BSEIE BIT(28)
|
||||
# define OTGSC_BSVIE BIT(27)
|
||||
# define OTGSC_ASVIE BIT(26)
|
||||
# define OTGSC_AVVIE BIT(25)
|
||||
# define OTGSC_IDIE BIT(24)
|
||||
# define OTGSC_DPIS BIT(22)
|
||||
# define OTGSC_1MSS BIT(21)
|
||||
# define OTGSC_BSEIS BIT(20)
|
||||
# define OTGSC_BSVIS BIT(19)
|
||||
# define OTGSC_ASVIS BIT(18)
|
||||
# define OTGSC_AVVIS BIT(17)
|
||||
# define OTGSC_IDIS BIT(16)
|
||||
# define OTGSC_DPS BIT(14)
|
||||
# define OTGSC_1MST BIT(13)
|
||||
# define OTGSC_BSE BIT(12)
|
||||
# define OTGSC_BSV BIT(11)
|
||||
# define OTGSC_ASV BIT(10)
|
||||
# define OTGSC_AVV BIT(9)
|
||||
# define OTGSC_ID BIT(8)
|
||||
# define OTGSC_HABA BIT(7)
|
||||
# define OTGSC_HADP BIT(6)
|
||||
# define OTGSC_IDPU BIT(5)
|
||||
# define OTGSC_DP BIT(4)
|
||||
# define OTGSC_OT BIT(3)
|
||||
# define OTGSC_HAAR BIT(2)
|
||||
# define OTGSC_VC BIT(1)
|
||||
# define OTGSC_VD BIT(0)
|
||||
# define OTGSC_INTEN_MASK (0x7f << 24)
|
||||
# define OTGSC_INTSTS_MASK (0x7f << 16)
|
||||
#define CI_USBMODE 0xf8
|
||||
# define USBMODE_CM (BIT(1) | BIT(0))
|
||||
# define USBMODE_IDLE 0
|
||||
# define USBMODE_DEVICE 0x2
|
||||
# define USBMODE_HOST 0x3
|
||||
|
||||
#define INTR_DUMMY_MASK (USBSTS_SLI | USBSTS_URI | USBSTS_PCI)
|
||||
|
||||
struct otg_hsm {
|
||||
/* Input */
|
||||
int a_bus_resume;
|
||||
int a_bus_suspend;
|
||||
int a_conn;
|
||||
int a_sess_vld;
|
||||
int a_srp_det;
|
||||
int a_vbus_vld;
|
||||
int b_bus_resume;
|
||||
int b_bus_suspend;
|
||||
int b_conn;
|
||||
int b_se0_srp;
|
||||
int b_sess_end;
|
||||
int b_sess_vld;
|
||||
int id;
|
||||
|
||||
/* Internal variables */
|
||||
int a_set_b_hnp_en;
|
||||
int b_srp_done;
|
||||
int b_hnp_enable;
|
||||
|
||||
/* Timeout indicator for timers */
|
||||
int a_wait_vrise_tmout;
|
||||
int a_wait_bcon_tmout;
|
||||
int a_aidl_bdis_tmout;
|
||||
int b_ase0_brst_tmout;
|
||||
int b_bus_suspend_tmout;
|
||||
int b_srp_res_tmout;
|
||||
|
||||
/* Informative variables */
|
||||
int a_bus_drop;
|
||||
int a_bus_req;
|
||||
int a_clr_err;
|
||||
int a_suspend_req;
|
||||
int b_bus_req;
|
||||
|
||||
/* Output */
|
||||
int drv_vbus;
|
||||
int loc_conn;
|
||||
int loc_sof;
|
||||
|
||||
/* Others */
|
||||
int b_bus_suspend_vld;
|
||||
};
|
||||
|
||||
#define TA_WAIT_VRISE 100
|
||||
#define TA_WAIT_BCON 30000
|
||||
#define TA_AIDL_BDIS 15000
|
||||
#define TB_ASE0_BRST 5000
|
||||
#define TB_SE0_SRP 2
|
||||
#define TB_SRP_RES 100
|
||||
#define TB_BUS_SUSPEND 500
|
||||
|
||||
struct langwell_otg_timer {
|
||||
unsigned long expires; /* Number of count increase to timeout */
|
||||
unsigned long count; /* Tick counter */
|
||||
void (*function)(unsigned long); /* Timeout function */
|
||||
unsigned long data; /* Data passed to function */
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
struct langwell_otg {
|
||||
struct otg_transceiver otg;
|
||||
struct otg_hsm hsm;
|
||||
void __iomem *regs;
|
||||
unsigned region;
|
||||
struct pci_driver *host_ops;
|
||||
struct pci_driver *client_ops;
|
||||
struct pci_dev *pdev;
|
||||
struct work_struct work;
|
||||
struct workqueue_struct *qwork;
|
||||
spinlock_t lock;
|
||||
spinlock_t wq_lock;
|
||||
};
|
||||
|
||||
static inline struct langwell_otg *otg_to_langwell(struct otg_transceiver *otg)
|
||||
{
|
||||
return container_of(otg, struct langwell_otg, otg);
|
||||
}
|
||||
|
||||
#ifdef DEBUG
|
||||
#define otg_dbg(fmt, args...) \
|
||||
printk(KERN_DEBUG fmt , ## args)
|
||||
#else
|
||||
#define otg_dbg(fmt, args...) \
|
||||
do { } while (0)
|
||||
#endif /* DEBUG */
|
||||
#endif /* __LANGWELL_OTG_H__ */
|
||||
@@ -0,0 +1,310 @@
|
||||
/*
|
||||
* Intel Langwell USB Device Controller driver
|
||||
* Copyright (C) 2008-2009, Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __LANGWELL_UDC_H
|
||||
#define __LANGWELL_UDC_H
|
||||
|
||||
|
||||
/* MACRO defines */
|
||||
#define CAP_REG_OFFSET 0x0
|
||||
#define OP_REG_OFFSET 0x28
|
||||
|
||||
#define DMA_ADDR_INVALID (~(dma_addr_t)0)
|
||||
|
||||
#define DQH_ALIGNMENT 2048
|
||||
#define DTD_ALIGNMENT 64
|
||||
#define DMA_BOUNDARY 4096
|
||||
|
||||
#define EP0_MAX_PKT_SIZE 64
|
||||
#define EP_DIR_IN 1
|
||||
#define EP_DIR_OUT 0
|
||||
|
||||
#define FLUSH_TIMEOUT 1000
|
||||
#define RESET_TIMEOUT 1000
|
||||
#define SETUPSTAT_TIMEOUT 100
|
||||
#define PRIME_TIMEOUT 100
|
||||
|
||||
|
||||
/* device memory space registers */
|
||||
|
||||
/* Capability Registers, BAR0 + CAP_REG_OFFSET */
|
||||
struct langwell_cap_regs {
|
||||
/* offset: 0x0 */
|
||||
u8 caplength; /* offset of Operational Register */
|
||||
u8 _reserved3;
|
||||
u16 hciversion; /* H: BCD encoding of host version */
|
||||
u32 hcsparams; /* H: host port steering logic capability */
|
||||
u32 hccparams; /* H: host multiple mode control capability */
|
||||
#define HCC_LEN BIT(17) /* Link power management (LPM) capability */
|
||||
u8 _reserved4[0x20-0xc];
|
||||
/* offset: 0x20 */
|
||||
u16 dciversion; /* BCD encoding of device version */
|
||||
u8 _reserved5[0x24-0x22];
|
||||
u32 dccparams; /* overall device controller capability */
|
||||
#define HOSTCAP BIT(8) /* host capable */
|
||||
#define DEVCAP BIT(7) /* device capable */
|
||||
#define DEN(d) \
|
||||
(((d)>>0)&0x1f) /* bits 4:0, device endpoint number */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
|
||||
/* Operational Registers, BAR0 + OP_REG_OFFSET */
|
||||
struct langwell_op_regs {
|
||||
/* offset: 0x28 */
|
||||
u32 extsts;
|
||||
#define EXTS_TI1 BIT(4) /* general purpose timer interrupt 1 */
|
||||
#define EXTS_TI1TI0 BIT(3) /* general purpose timer interrupt 0 */
|
||||
#define EXTS_TI1UPI BIT(2) /* USB host periodic interrupt */
|
||||
#define EXTS_TI1UAI BIT(1) /* USB host asynchronous interrupt */
|
||||
#define EXTS_TI1NAKI BIT(0) /* NAK interrupt */
|
||||
u32 extintr;
|
||||
#define EXTI_TIE1 BIT(4) /* general purpose timer interrupt enable 1 */
|
||||
#define EXTI_TIE0 BIT(3) /* general purpose timer interrupt enable 0 */
|
||||
#define EXTI_UPIE BIT(2) /* USB host periodic interrupt enable */
|
||||
#define EXTI_UAIE BIT(1) /* USB host asynchronous interrupt enable */
|
||||
#define EXTI_NAKE BIT(0) /* NAK interrupt enable */
|
||||
/* offset: 0x30 */
|
||||
u32 usbcmd;
|
||||
#define CMD_HIRD(u) \
|
||||
(((u)>>24)&0xf) /* bits 27:24, host init resume duration */
|
||||
#define CMD_ITC(u) \
|
||||
(((u)>>16)&0xff) /* bits 23:16, interrupt threshold control */
|
||||
#define CMD_PPE BIT(15) /* per-port change events enable */
|
||||
#define CMD_ATDTW BIT(14) /* add dTD tripwire */
|
||||
#define CMD_SUTW BIT(13) /* setup tripwire */
|
||||
#define CMD_ASPE BIT(11) /* asynchronous schedule park mode enable */
|
||||
#define CMD_FS2 BIT(10) /* frame list size */
|
||||
#define CMD_ASP1 BIT(9) /* asynchronous schedule park mode count */
|
||||
#define CMD_ASP0 BIT(8)
|
||||
#define CMD_LR BIT(7) /* light host/device controller reset */
|
||||
#define CMD_IAA BIT(6) /* interrupt on async advance doorbell */
|
||||
#define CMD_ASE BIT(5) /* asynchronous schedule enable */
|
||||
#define CMD_PSE BIT(4) /* periodic schedule enable */
|
||||
#define CMD_FS1 BIT(3)
|
||||
#define CMD_FS0 BIT(2)
|
||||
#define CMD_RST BIT(1) /* controller reset */
|
||||
#define CMD_RUNSTOP BIT(0) /* run/stop */
|
||||
u32 usbsts;
|
||||
#define STS_PPCI(u) \
|
||||
(((u)>>16)&0xffff) /* bits 31:16, port-n change detect */
|
||||
#define STS_AS BIT(15) /* asynchronous schedule status */
|
||||
#define STS_PS BIT(14) /* periodic schedule status */
|
||||
#define STS_RCL BIT(13) /* reclamation */
|
||||
#define STS_HCH BIT(12) /* HC halted */
|
||||
#define STS_ULPII BIT(10) /* ULPI interrupt */
|
||||
#define STS_SLI BIT(8) /* DC suspend */
|
||||
#define STS_SRI BIT(7) /* SOF received */
|
||||
#define STS_URI BIT(6) /* USB reset received */
|
||||
#define STS_AAI BIT(5) /* interrupt on async advance */
|
||||
#define STS_SEI BIT(4) /* system error */
|
||||
#define STS_FRI BIT(3) /* frame list rollover */
|
||||
#define STS_PCI BIT(2) /* port change detect */
|
||||
#define STS_UEI BIT(1) /* USB error interrupt */
|
||||
#define STS_UI BIT(0) /* USB interrupt */
|
||||
u32 usbintr;
|
||||
/* bits 31:16, per-port interrupt enable */
|
||||
#define INTR_PPCE(u) (((u)>>16)&0xffff)
|
||||
#define INTR_ULPIE BIT(10) /* ULPI enable */
|
||||
#define INTR_SLE BIT(8) /* DC sleep/suspend enable */
|
||||
#define INTR_SRE BIT(7) /* SOF received enable */
|
||||
#define INTR_URE BIT(6) /* USB reset enable */
|
||||
#define INTR_AAE BIT(5) /* interrupt on async advance enable */
|
||||
#define INTR_SEE BIT(4) /* system error enable */
|
||||
#define INTR_FRE BIT(3) /* frame list rollover enable */
|
||||
#define INTR_PCE BIT(2) /* port change detect enable */
|
||||
#define INTR_UEE BIT(1) /* USB error interrupt enable */
|
||||
#define INTR_UE BIT(0) /* USB interrupt enable */
|
||||
u32 frindex; /* frame index */
|
||||
#define FRINDEX_MASK (0x3fff << 0)
|
||||
u32 ctrldssegment; /* not used */
|
||||
u32 deviceaddr;
|
||||
#define USBADR_SHIFT 25
|
||||
#define USBADR(d) \
|
||||
(((d)>>25)&0x7f) /* bits 31:25, device address */
|
||||
#define USBADR_MASK (0x7f << 25)
|
||||
#define USBADRA BIT(24) /* device address advance */
|
||||
u32 endpointlistaddr;/* endpoint list top memory address */
|
||||
/* bits 31:11, endpoint list pointer */
|
||||
#define EPBASE(d) (((d)>>11)&0x1fffff)
|
||||
#define ENDPOINTLISTADDR_MASK (0x1fffff << 11)
|
||||
u32 ttctrl; /* H: TT operatin, not used */
|
||||
/* offset: 0x50 */
|
||||
u32 burstsize; /* burst size of data movement */
|
||||
#define TXPBURST(b) \
|
||||
(((b)>>8)&0xff) /* bits 15:8, TX burst length */
|
||||
#define RXPBURST(b) \
|
||||
(((b)>>0)&0xff) /* bits 7:0, RX burst length */
|
||||
u32 txfilltuning; /* TX tuning */
|
||||
u32 txttfilltuning; /* H: TX TT tuning */
|
||||
u32 ic_usb; /* control the IC_USB FS/LS transceiver */
|
||||
/* offset: 0x60 */
|
||||
u32 ulpi_viewport; /* indirect access to ULPI PHY */
|
||||
#define ULPIWU BIT(31) /* ULPI wakeup */
|
||||
#define ULPIRUN BIT(30) /* ULPI read/write run */
|
||||
#define ULPIRW BIT(29) /* ULPI read/write control */
|
||||
#define ULPISS BIT(27) /* ULPI sync state */
|
||||
#define ULPIPORT(u) \
|
||||
(((u)>>24)&7) /* bits 26:24, ULPI port number */
|
||||
#define ULPIADDR(u) \
|
||||
(((u)>>16)&0xff) /* bits 23:16, ULPI data address */
|
||||
#define ULPIDATRD(u) \
|
||||
(((u)>>8)&0xff) /* bits 15:8, ULPI data read */
|
||||
#define ULPIDATWR(u) \
|
||||
(((u)>>0)&0xff) /* bits 7:0, ULPI date write */
|
||||
u8 _reserved6[0x70-0x64];
|
||||
/* offset: 0x70 */
|
||||
u32 configflag; /* H: not used */
|
||||
u32 portsc1; /* port status */
|
||||
#define DA(p) \
|
||||
(((p)>>25)&0x7f) /* bits 31:25, device address */
|
||||
#define PORTS_SSTS (BIT(24) | BIT(23)) /* suspend status */
|
||||
#define PORTS_WKOC BIT(22) /* wake on over-current enable */
|
||||
#define PORTS_WKDS BIT(21) /* wake on disconnect enable */
|
||||
#define PORTS_WKCN BIT(20) /* wake on connect enable */
|
||||
#define PORTS_PTC(p) (((p)>>16)&0xf) /* bits 19:16, port test control */
|
||||
#define PORTS_PIC (BIT(15) | BIT(14)) /* port indicator control */
|
||||
#define PORTS_PO BIT(13) /* port owner */
|
||||
#define PORTS_PP BIT(12) /* port power */
|
||||
#define PORTS_LS (BIT(11) | BIT(10)) /* line status */
|
||||
#define PORTS_SLP BIT(9) /* suspend using L1 */
|
||||
#define PORTS_PR BIT(8) /* port reset */
|
||||
#define PORTS_SUSP BIT(7) /* suspend */
|
||||
#define PORTS_FPR BIT(6) /* force port resume */
|
||||
#define PORTS_OCC BIT(5) /* over-current change */
|
||||
#define PORTS_OCA BIT(4) /* over-current active */
|
||||
#define PORTS_PEC BIT(3) /* port enable/disable change */
|
||||
#define PORTS_PE BIT(2) /* port enable/disable */
|
||||
#define PORTS_CSC BIT(1) /* connect status change */
|
||||
#define PORTS_CCS BIT(0) /* current connect status */
|
||||
u8 _reserved7[0xb4-0x78];
|
||||
/* offset: 0xb4 */
|
||||
u32 devlc; /* control LPM and each USB port behavior */
|
||||
/* bits 31:29, parallel transceiver select */
|
||||
#define LPM_PTS(d) (((d)>>29)&7)
|
||||
#define LPM_STS BIT(28) /* serial transceiver select */
|
||||
#define LPM_PTW BIT(27) /* parallel transceiver width */
|
||||
#define LPM_PSPD(d) (((d)>>25)&3) /* bits 26:25, port speed */
|
||||
#define LPM_PSPD_MASK (BIT(26) | BIT(25))
|
||||
#define LPM_SPEED_FULL 0
|
||||
#define LPM_SPEED_LOW 1
|
||||
#define LPM_SPEED_HIGH 2
|
||||
#define LPM_SRT BIT(24) /* shorten reset time */
|
||||
#define LPM_PFSC BIT(23) /* port force full speed connect */
|
||||
#define LPM_PHCD BIT(22) /* PHY low power suspend clock disable */
|
||||
#define LPM_STL BIT(16) /* STALL reply to LPM token */
|
||||
#define LPM_BA(d) \
|
||||
(((d)>>1)&0x7ff) /* bits 11:1, BmAttributes */
|
||||
#define LPM_NYT_ACK BIT(0) /* NYET/ACK reply to LPM token */
|
||||
u8 _reserved8[0xf4-0xb8];
|
||||
/* offset: 0xf4 */
|
||||
u32 otgsc; /* On-The-Go status and control */
|
||||
#define OTGSC_DPIE BIT(30) /* data pulse interrupt enable */
|
||||
#define OTGSC_MSE BIT(29) /* 1 ms timer interrupt enable */
|
||||
#define OTGSC_BSEIE BIT(28) /* B session end interrupt enable */
|
||||
#define OTGSC_BSVIE BIT(27) /* B session valid interrupt enable */
|
||||
#define OTGSC_ASVIE BIT(26) /* A session valid interrupt enable */
|
||||
#define OTGSC_AVVIE BIT(25) /* A VBUS valid interrupt enable */
|
||||
#define OTGSC_IDIE BIT(24) /* USB ID interrupt enable */
|
||||
#define OTGSC_DPIS BIT(22) /* data pulse interrupt status */
|
||||
#define OTGSC_MSS BIT(21) /* 1 ms timer interrupt status */
|
||||
#define OTGSC_BSEIS BIT(20) /* B session end interrupt status */
|
||||
#define OTGSC_BSVIS BIT(19) /* B session valid interrupt status */
|
||||
#define OTGSC_ASVIS BIT(18) /* A session valid interrupt status */
|
||||
#define OTGSC_AVVIS BIT(17) /* A VBUS valid interrupt status */
|
||||
#define OTGSC_IDIS BIT(16) /* USB ID interrupt status */
|
||||
#define OTGSC_DPS BIT(14) /* data bus pulsing status */
|
||||
#define OTGSC_MST BIT(13) /* 1 ms timer toggle */
|
||||
#define OTGSC_BSE BIT(12) /* B session end */
|
||||
#define OTGSC_BSV BIT(11) /* B session valid */
|
||||
#define OTGSC_ASV BIT(10) /* A session valid */
|
||||
#define OTGSC_AVV BIT(9) /* A VBUS valid */
|
||||
#define OTGSC_USBID BIT(8) /* USB ID */
|
||||
#define OTGSC_HABA BIT(7) /* hw assist B-disconnect to A-connect */
|
||||
#define OTGSC_HADP BIT(6) /* hw assist data pulse */
|
||||
#define OTGSC_IDPU BIT(5) /* ID pullup */
|
||||
#define OTGSC_DP BIT(4) /* data pulsing */
|
||||
#define OTGSC_OT BIT(3) /* OTG termination */
|
||||
#define OTGSC_HAAR BIT(2) /* hw assist auto reset */
|
||||
#define OTGSC_VC BIT(1) /* VBUS charge */
|
||||
#define OTGSC_VD BIT(0) /* VBUS discharge */
|
||||
u32 usbmode;
|
||||
#define MODE_VBPS BIT(5) /* R/W VBUS power select */
|
||||
#define MODE_SDIS BIT(4) /* R/W stream disable mode */
|
||||
#define MODE_SLOM BIT(3) /* R/W setup lockout mode */
|
||||
#define MODE_ENSE BIT(2) /* endian select */
|
||||
#define MODE_CM(u) (((u)>>0)&3) /* bits 1:0, controller mode */
|
||||
#define MODE_IDLE 0
|
||||
#define MODE_DEVICE 2
|
||||
#define MODE_HOST 3
|
||||
u8 _reserved9[0x100-0xfc];
|
||||
/* offset: 0x100 */
|
||||
u32 endptnak;
|
||||
#define EPTN(e) \
|
||||
(((e)>>16)&0xffff) /* bits 31:16, TX endpoint NAK */
|
||||
#define EPRN(e) \
|
||||
(((e)>>0)&0xffff) /* bits 15:0, RX endpoint NAK */
|
||||
u32 endptnaken;
|
||||
#define EPTNE(e) \
|
||||
(((e)>>16)&0xffff) /* bits 31:16, TX endpoint NAK enable */
|
||||
#define EPRNE(e) \
|
||||
(((e)>>0)&0xffff) /* bits 15:0, RX endpoint NAK enable */
|
||||
u32 endptsetupstat;
|
||||
#define SETUPSTAT_MASK (0xffff << 0) /* bits 15:0 */
|
||||
#define EP0SETUPSTAT_MASK 1
|
||||
u32 endptprime;
|
||||
/* bits 31:16, prime endpoint transmit buffer */
|
||||
#define PETB(e) (((e)>>16)&0xffff)
|
||||
/* bits 15:0, prime endpoint receive buffer */
|
||||
#define PERB(e) (((e)>>0)&0xffff)
|
||||
/* offset: 0x110 */
|
||||
u32 endptflush;
|
||||
/* bits 31:16, flush endpoint transmit buffer */
|
||||
#define FETB(e) (((e)>>16)&0xffff)
|
||||
/* bits 15:0, flush endpoint receive buffer */
|
||||
#define FERB(e) (((e)>>0)&0xffff)
|
||||
u32 endptstat;
|
||||
/* bits 31:16, endpoint transmit buffer ready */
|
||||
#define ETBR(e) (((e)>>16)&0xffff)
|
||||
/* bits 15:0, endpoint receive buffer ready */
|
||||
#define ERBR(e) (((e)>>0)&0xffff)
|
||||
u32 endptcomplete;
|
||||
/* bits 31:16, endpoint transmit complete event */
|
||||
#define ETCE(e) (((e)>>16)&0xffff)
|
||||
/* bits 15:0, endpoint receive complete event */
|
||||
#define ERCE(e) (((e)>>0)&0xffff)
|
||||
/* offset: 0x11c */
|
||||
u32 endptctrl[16];
|
||||
#define EPCTRL_TXE BIT(23) /* TX endpoint enable */
|
||||
#define EPCTRL_TXR BIT(22) /* TX data toggle reset */
|
||||
#define EPCTRL_TXI BIT(21) /* TX data toggle inhibit */
|
||||
#define EPCTRL_TXT(e) (((e)>>18)&3) /* bits 19:18, TX endpoint type */
|
||||
#define EPCTRL_TXT_SHIFT 18
|
||||
#define EPCTRL_TXD BIT(17) /* TX endpoint data source */
|
||||
#define EPCTRL_TXS BIT(16) /* TX endpoint STALL */
|
||||
#define EPCTRL_RXE BIT(7) /* RX endpoint enable */
|
||||
#define EPCTRL_RXR BIT(6) /* RX data toggle reset */
|
||||
#define EPCTRL_RXI BIT(5) /* RX data toggle inhibit */
|
||||
#define EPCTRL_RXT(e) (((e)>>2)&3) /* bits 3:2, RX endpoint type */
|
||||
#define EPCTRL_RXT_SHIFT 2 /* bits 19:18, TX endpoint type */
|
||||
#define EPCTRL_RXD BIT(1) /* RX endpoint data sink */
|
||||
#define EPCTRL_RXS BIT(0) /* RX endpoint STALL */
|
||||
} __attribute__ ((packed));
|
||||
|
||||
#endif /* __LANGWELL_UDC_H */
|
||||
|
||||
@@ -80,10 +80,10 @@ struct otg_transceiver {
|
||||
|
||||
/* for board-specific init logic */
|
||||
extern int otg_set_transceiver(struct otg_transceiver *);
|
||||
#ifdef CONFIG_NOP_USB_XCEIV
|
||||
|
||||
/* sometimes transceivers are accessed only through e.g. ULPI */
|
||||
extern void usb_nop_xceiv_register(void);
|
||||
extern void usb_nop_xceiv_unregister(void);
|
||||
#endif
|
||||
|
||||
|
||||
/* for usb host and peripheral controller drivers */
|
||||
|
||||
@@ -0,0 +1,44 @@
|
||||
/*
|
||||
* R8A66597 driver platform data
|
||||
*
|
||||
* Copyright (C) 2009 Renesas Solutions Corp.
|
||||
*
|
||||
* Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __LINUX_USB_R8A66597_H
|
||||
#define __LINUX_USB_R8A66597_H
|
||||
|
||||
#define R8A66597_PLATDATA_XTAL_12MHZ 0x01
|
||||
#define R8A66597_PLATDATA_XTAL_24MHZ 0x02
|
||||
#define R8A66597_PLATDATA_XTAL_48MHZ 0x03
|
||||
|
||||
struct r8a66597_platdata {
|
||||
/* This ops can controll port power instead of DVSTCTR register. */
|
||||
void (*port_power)(int port, int power);
|
||||
|
||||
/* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */
|
||||
unsigned xtal:2;
|
||||
|
||||
/* set one = 3.3V, set zero = 1.5V */
|
||||
unsigned vif:1;
|
||||
|
||||
/* set one = big endian, set zero = little endian */
|
||||
unsigned endian:1;
|
||||
};
|
||||
#endif
|
||||
|
||||
@@ -15,6 +15,7 @@
|
||||
|
||||
#include <linux/kref.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/sysrq.h>
|
||||
|
||||
#define SERIAL_TTY_MAJOR 188 /* Nice legal number now */
|
||||
#define SERIAL_TTY_MINORS 254 /* loads of devices :) */
|
||||
@@ -26,6 +27,13 @@
|
||||
/* parity check flag */
|
||||
#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
|
||||
|
||||
enum port_dev_state {
|
||||
PORT_UNREGISTERED,
|
||||
PORT_REGISTERING,
|
||||
PORT_REGISTERED,
|
||||
PORT_UNREGISTERING,
|
||||
};
|
||||
|
||||
/**
|
||||
* usb_serial_port: structure for the specific ports of a device.
|
||||
* @serial: pointer back to the struct usb_serial owner of this port.
|
||||
@@ -91,12 +99,17 @@ struct usb_serial_port {
|
||||
int write_urb_busy;
|
||||
__u8 bulk_out_endpointAddress;
|
||||
|
||||
int tx_bytes_flight;
|
||||
int urbs_in_flight;
|
||||
|
||||
wait_queue_head_t write_wait;
|
||||
struct work_struct work;
|
||||
char throttled;
|
||||
char throttle_req;
|
||||
char console;
|
||||
unsigned long sysrq; /* sysrq timeout */
|
||||
struct device dev;
|
||||
enum port_dev_state dev_state;
|
||||
};
|
||||
#define to_usb_serial_port(d) container_of(d, struct usb_serial_port, dev)
|
||||
|
||||
@@ -181,8 +194,10 @@ static inline void usb_set_serial_data(struct usb_serial *serial, void *data)
|
||||
* This will be called when the struct usb_serial structure is fully set
|
||||
* set up. Do any local initialization of the device, or any private
|
||||
* memory structure allocation at this point in time.
|
||||
* @shutdown: pointer to the driver's shutdown function. This will be
|
||||
* called when the device is removed from the system.
|
||||
* @disconnect: pointer to the driver's disconnect function. This will be
|
||||
* called when the device is unplugged or unbound from the driver.
|
||||
* @release: pointer to the driver's release function. This will be called
|
||||
* when the usb_serial data structure is about to be destroyed.
|
||||
* @usb_driver: pointer to the struct usb_driver that controls this
|
||||
* device. This is necessary to allow dynamic ids to be added to
|
||||
* the driver from sysfs.
|
||||
@@ -207,12 +222,14 @@ struct usb_serial_driver {
|
||||
struct device_driver driver;
|
||||
struct usb_driver *usb_driver;
|
||||
struct usb_dynids dynids;
|
||||
int max_in_flight_urbs;
|
||||
|
||||
int (*probe)(struct usb_serial *serial, const struct usb_device_id *id);
|
||||
int (*attach)(struct usb_serial *serial);
|
||||
int (*calc_num_ports) (struct usb_serial *serial);
|
||||
|
||||
void (*shutdown)(struct usb_serial *serial);
|
||||
void (*disconnect)(struct usb_serial *serial);
|
||||
void (*release)(struct usb_serial *serial);
|
||||
|
||||
int (*port_probe)(struct usb_serial_port *port);
|
||||
int (*port_remove)(struct usb_serial_port *port);
|
||||
@@ -294,9 +311,16 @@ extern void usb_serial_generic_read_bulk_callback(struct urb *urb);
|
||||
extern void usb_serial_generic_write_bulk_callback(struct urb *urb);
|
||||
extern void usb_serial_generic_throttle(struct tty_struct *tty);
|
||||
extern void usb_serial_generic_unthrottle(struct tty_struct *tty);
|
||||
extern void usb_serial_generic_shutdown(struct usb_serial *serial);
|
||||
extern void usb_serial_generic_disconnect(struct usb_serial *serial);
|
||||
extern void usb_serial_generic_release(struct usb_serial *serial);
|
||||
extern int usb_serial_generic_register(int debug);
|
||||
extern void usb_serial_generic_deregister(void);
|
||||
extern void usb_serial_generic_resubmit_read_urb(struct usb_serial_port *port,
|
||||
gfp_t mem_flags);
|
||||
extern int usb_serial_handle_sysrq_char(struct usb_serial_port *port,
|
||||
unsigned int ch);
|
||||
extern int usb_serial_handle_break(struct usb_serial_port *port);
|
||||
|
||||
|
||||
extern int usb_serial_bus_register(struct usb_serial_driver *device);
|
||||
extern void usb_serial_bus_deregister(struct usb_serial_driver *device);
|
||||
|
||||
Reference in New Issue
Block a user