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Merge tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Browse Source 
Pull sound update from Takashi Iwai:
 "This is a fairly quiet release in all sound area.  Only a little bit
  of changes in the core side while most of changes are seen in the
  drivers.

  HD-audio:
   - A few new codec additions for Nvidia, Realtek and VIA
   - Intel Haswell audio support
   - Support for "phantom" jacks for consistent jack reporting
   - Major clean-ups in HDMI/DP driver codes
   - A workaround for inverted digital-mic pins with Realtek codecs
   - Removal of beep_mode=2 option

  ASoC:
   - Added the ability to add and remove DAPM paths dynamically, mostly
     for reparenting on clock changes
   - New machine drivers for Marvell Brownstone, ST-Ericsson Ux500
     reference platform and ttc-dkp
   - New CPU drivers for Blackfin BF6xx SPORTs in I2S mode, Marvell MMP,
     Synopsis Designware I2S controllers, and SPEAr DMA and S/PDIF
   - New CODEC drivers for Dialog DA732x, ST STA529, ST-Ericsson AB8500,
     TI Isabelle and Wolfson Microelectronics WM5102 and WM5110
   - DAPM fixes for the recent locking changes
   - Fix for _PRE and _POST widgets (which have been broken for a few
     releases now)
   - A couple of minor driver updates

  Misc
   - Conversion to new dev_pm_ops in platform and PCI drivers
   - LTC support and some fixes in PCXHR driver
   - A few fixes and PM support for ISA OPti9xx and WSS cards
   - Some TLV code cleanup
   - Move driver-specific headers from include/sound to local dirs"

* tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (212 commits)
  ASoC: dapm: Fix _PRE and _POST events for DAPM performance improvements
  ALSA: hda - add dock support for Thinkpad X230 Tablet
  ALSA: hda - Turn on PIN_OUT from hdmi playback prepare.
  ASoC imx-audmux: add MX31_AUDMUX_PORT7_SSI_PINS_7 define
  ASoC: littlemill: Add userspace control of the WM1250 I/O
  ASoC: wm8994: Update micdet for irqdomain conversion
  ALSA: hda - make sure alc268 does not OOPS on codec parse
  ALSA: hda - Add support for Realtek ALC282
  ALSA: hda - Fix index number conflicts of phantom jacks
  ALSA: opti9xx: Fix section mismatch by PM support
  ALSA: snd-opti9xx: Implement suspend/resume
  ALSA: hda - Add new GPU codec ID to snd-hda
  ALSA: hda - Fix driver type of Haswell controller to AZX_DRIVER_SCH
  ALSA: hda - add Haswell HDMI codec id
  ALSA: hda - Add DeviceID for Haswell HDA
  ALSA: wss_lib: Fix resume on Yamaha OPL3-SAx
  ALSA: wss_lib: fix suspend/resume
  ALSA: es1938: replace TLV_DB_RANGE_HEAD with DECLARE_TLV_DB_RANGE
  ALSA: tlv: add DECLARE_TLV_DB_RANGE()
  ALSA: tlv: add DECLARE_TLV_CONTAINER()
  ...
This commit is contained in:
Linus Torvalds
2012-07-24 13:37:37 -07:00
parent d14b7a419a c1b623d9e4
commit dbf7b5915b
239 changed files with 18347 additions and 2642 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/linux/ac97_codec.h
-362
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@@ -1,362 +0,0 @@
#ifndef _AC97_CODEC_H_
#define _AC97_CODEC_H_
#include <linux/types.h>
#include <linux/soundcard.h>
/* AC97 1.0 */
#define AC97_RESET 0x0000 //
#define AC97_MASTER_VOL_STEREO 0x0002 // Line Out
#define AC97_HEADPHONE_VOL 0x0004 //
#define AC97_MASTER_VOL_MONO 0x0006 // TAD Output
#define AC97_MASTER_TONE 0x0008 //
#define AC97_PCBEEP_VOL 0x000a // none
#define AC97_PHONE_VOL 0x000c // TAD Input (mono)
#define AC97_MIC_VOL 0x000e // MIC Input (mono)
#define AC97_LINEIN_VOL 0x0010 // Line Input (stereo)
#define AC97_CD_VOL 0x0012 // CD Input (stereo)
#define AC97_VIDEO_VOL 0x0014 // none
#define AC97_AUX_VOL 0x0016 // Aux Input (stereo)
#define AC97_PCMOUT_VOL 0x0018 // Wave Output (stereo)
#define AC97_RECORD_SELECT 0x001a //
#define AC97_RECORD_GAIN 0x001c
#define AC97_RECORD_GAIN_MIC 0x001e
#define AC97_GENERAL_PURPOSE 0x0020
#define AC97_3D_CONTROL 0x0022
#define AC97_MODEM_RATE 0x0024
#define AC97_POWER_CONTROL 0x0026
/* AC'97 2.0 */
#define AC97_EXTENDED_ID 0x0028 /* Extended Audio ID */
#define AC97_EXTENDED_STATUS 0x002A /* Extended Audio Status */
#define AC97_PCM_FRONT_DAC_RATE 0x002C /* PCM Front DAC Rate */
#define AC97_PCM_SURR_DAC_RATE 0x002E /* PCM Surround DAC Rate */
#define AC97_PCM_LFE_DAC_RATE 0x0030 /* PCM LFE DAC Rate */
#define AC97_PCM_LR_ADC_RATE 0x0032 /* PCM LR ADC Rate */
#define AC97_PCM_MIC_ADC_RATE 0x0034 /* PCM MIC ADC Rate */
#define AC97_CENTER_LFE_MASTER 0x0036 /* Center + LFE Master Volume */
#define AC97_SURROUND_MASTER 0x0038 /* Surround (Rear) Master Volume */
#define AC97_RESERVED_3A 0x003A /* Reserved in AC '97 < 2.2 */
/* AC'97 2.2 */
#define AC97_SPDIF_CONTROL 0x003A /* S/PDIF Control */
/* range 0x3c-0x58 - MODEM */
#define AC97_EXTENDED_MODEM_ID 0x003C
#define AC97_EXTEND_MODEM_STAT 0x003E
#define AC97_LINE1_RATE 0x0040
#define AC97_LINE2_RATE 0x0042
#define AC97_HANDSET_RATE 0x0044
#define AC97_LINE1_LEVEL 0x0046
#define AC97_LINE2_LEVEL 0x0048
#define AC97_HANDSET_LEVEL 0x004A
#define AC97_GPIO_CONFIG 0x004C
#define AC97_GPIO_POLARITY 0x004E
#define AC97_GPIO_STICKY 0x0050
#define AC97_GPIO_WAKE_UP 0x0052
#define AC97_GPIO_STATUS 0x0054
#define AC97_MISC_MODEM_STAT 0x0056
#define AC97_RESERVED_58 0x0058
/* registers 0x005a - 0x007a are vendor reserved */
#define AC97_VENDOR_ID1 0x007c
#define AC97_VENDOR_ID2 0x007e
/* volume control bit defines */
#define AC97_MUTE 0x8000
#define AC97_MICBOOST 0x0040
#define AC97_LEFTVOL 0x3f00
#define AC97_RIGHTVOL 0x003f
/* record mux defines */
#define AC97_RECMUX_MIC 0x0000
#define AC97_RECMUX_CD 0x0101
#define AC97_RECMUX_VIDEO 0x0202
#define AC97_RECMUX_AUX 0x0303
#define AC97_RECMUX_LINE 0x0404
#define AC97_RECMUX_STEREO_MIX 0x0505
#define AC97_RECMUX_MONO_MIX 0x0606
#define AC97_RECMUX_PHONE 0x0707
/* general purpose register bit defines */
#define AC97_GP_LPBK 0x0080 /* Loopback mode */
#define AC97_GP_MS 0x0100 /* Mic Select 0=Mic1, 1=Mic2 */
#define AC97_GP_MIX 0x0200 /* Mono output select 0=Mix, 1=Mic */
#define AC97_GP_RLBK 0x0400 /* Remote Loopback - Modem line codec */
#define AC97_GP_LLBK 0x0800 /* Local Loopback - Modem Line codec */
#define AC97_GP_LD 0x1000 /* Loudness 1=on */
#define AC97_GP_3D 0x2000 /* 3D Enhancement 1=on */
#define AC97_GP_ST 0x4000 /* Stereo Enhancement 1=on */
#define AC97_GP_POP 0x8000 /* Pcm Out Path, 0=pre 3D, 1=post 3D */
/* extended audio status and control bit defines */
#define AC97_EA_VRA 0x0001 /* Variable bit rate enable bit */
#define AC97_EA_DRA 0x0002 /* Double-rate audio enable bit */
#define AC97_EA_SPDIF 0x0004 /* S/PDIF Enable bit */
#define AC97_EA_VRM 0x0008 /* Variable bit rate for MIC enable bit */
#define AC97_EA_CDAC 0x0040 /* PCM Center DAC is ready (Read only) */
#define AC97_EA_SDAC 0x0040 /* PCM Surround DACs are ready (Read only) */
#define AC97_EA_LDAC 0x0080 /* PCM LFE DAC is ready (Read only) */
#define AC97_EA_MDAC 0x0100 /* MIC ADC is ready (Read only) */
#define AC97_EA_SPCV 0x0400 /* S/PDIF configuration valid (Read only) */
#define AC97_EA_PRI 0x0800 /* Turns the PCM Center DAC off */
#define AC97_EA_PRJ 0x1000 /* Turns the PCM Surround DACs off */
#define AC97_EA_PRK 0x2000 /* Turns the PCM LFE DAC off */
#define AC97_EA_PRL 0x4000 /* Turns the MIC ADC off */
#define AC97_EA_SLOT_MASK 0xffcf /* Mask for slot assignment bits */
#define AC97_EA_SPSA_3_4 0x0000 /* Slot assigned to 3 & 4 */
#define AC97_EA_SPSA_7_8 0x0010 /* Slot assigned to 7 & 8 */
#define AC97_EA_SPSA_6_9 0x0020 /* Slot assigned to 6 & 9 */
#define AC97_EA_SPSA_10_11 0x0030 /* Slot assigned to 10 & 11 */
/* S/PDIF control bit defines */
#define AC97_SC_PRO 0x0001 /* Professional status */
#define AC97_SC_NAUDIO 0x0002 /* Non audio stream */
#define AC97_SC_COPY 0x0004 /* Copyright status */
#define AC97_SC_PRE 0x0008 /* Preemphasis status */
#define AC97_SC_CC_MASK 0x07f0 /* Category Code mask */
#define AC97_SC_L 0x0800 /* Generation Level status */
#define AC97_SC_SPSR_MASK 0xcfff /* S/PDIF Sample Rate bits */
#define AC97_SC_SPSR_44K 0x0000 /* Use 44.1kHz Sample rate */
#define AC97_SC_SPSR_48K 0x2000 /* Use 48kHz Sample rate */
#define AC97_SC_SPSR_32K 0x3000 /* Use 32kHz Sample rate */
#define AC97_SC_DRS 0x4000 /* Double Rate S/PDIF */
#define AC97_SC_V 0x8000 /* Validity status */
/* powerdown control and status bit defines */
/* status */
#define AC97_PWR_MDM 0x0010 /* Modem section ready */
#define AC97_PWR_REF 0x0008 /* Vref nominal */
#define AC97_PWR_ANL 0x0004 /* Analog section ready */
#define AC97_PWR_DAC 0x0002 /* DAC section ready */
#define AC97_PWR_ADC 0x0001 /* ADC section ready */
/* control */
#define AC97_PWR_PR0 0x0100 /* ADC and Mux powerdown */
#define AC97_PWR_PR1 0x0200 /* DAC powerdown */
#define AC97_PWR_PR2 0x0400 /* Output mixer powerdown (Vref on) */
#define AC97_PWR_PR3 0x0800 /* Output mixer powerdown (Vref off) */
#define AC97_PWR_PR4 0x1000 /* AC-link powerdown */
#define AC97_PWR_PR5 0x2000 /* Internal Clk disable */
#define AC97_PWR_PR6 0x4000 /* HP amp powerdown */
#define AC97_PWR_PR7 0x8000 /* Modem off - if supported */
/* extended audio ID register bit defines */
#define AC97_EXTID_VRA 0x0001
#define AC97_EXTID_DRA 0x0002
#define AC97_EXTID_SPDIF 0x0004
#define AC97_EXTID_VRM 0x0008
#define AC97_EXTID_DSA0 0x0010
#define AC97_EXTID_DSA1 0x0020
#define AC97_EXTID_CDAC 0x0040
#define AC97_EXTID_SDAC 0x0080
#define AC97_EXTID_LDAC 0x0100
#define AC97_EXTID_AMAP 0x0200
#define AC97_EXTID_REV0 0x0400
#define AC97_EXTID_REV1 0x0800
#define AC97_EXTID_ID0 0x4000
#define AC97_EXTID_ID1 0x8000
/* extended status register bit defines */
#define AC97_EXTSTAT_VRA 0x0001
#define AC97_EXTSTAT_DRA 0x0002
#define AC97_EXTSTAT_SPDIF 0x0004
#define AC97_EXTSTAT_VRM 0x0008
#define AC97_EXTSTAT_SPSA0 0x0010
#define AC97_EXTSTAT_SPSA1 0x0020
#define AC97_EXTSTAT_CDAC 0x0040
#define AC97_EXTSTAT_SDAC 0x0080
#define AC97_EXTSTAT_LDAC 0x0100
#define AC97_EXTSTAT_MADC 0x0200
#define AC97_EXTSTAT_SPCV 0x0400
#define AC97_EXTSTAT_PRI 0x0800
#define AC97_EXTSTAT_PRJ 0x1000
#define AC97_EXTSTAT_PRK 0x2000
#define AC97_EXTSTAT_PRL 0x4000
/* extended audio ID register bit defines */
#define AC97_EXTID_VRA 0x0001
#define AC97_EXTID_DRA 0x0002
#define AC97_EXTID_SPDIF 0x0004
#define AC97_EXTID_VRM 0x0008
#define AC97_EXTID_DSA0 0x0010
#define AC97_EXTID_DSA1 0x0020
#define AC97_EXTID_CDAC 0x0040
#define AC97_EXTID_SDAC 0x0080
#define AC97_EXTID_LDAC 0x0100
#define AC97_EXTID_AMAP 0x0200
#define AC97_EXTID_REV0 0x0400
#define AC97_EXTID_REV1 0x0800
#define AC97_EXTID_ID0 0x4000
#define AC97_EXTID_ID1 0x8000
/* extended status register bit defines */
#define AC97_EXTSTAT_VRA 0x0001
#define AC97_EXTSTAT_DRA 0x0002
#define AC97_EXTSTAT_SPDIF 0x0004
#define AC97_EXTSTAT_VRM 0x0008
#define AC97_EXTSTAT_SPSA0 0x0010
#define AC97_EXTSTAT_SPSA1 0x0020
#define AC97_EXTSTAT_CDAC 0x0040
#define AC97_EXTSTAT_SDAC 0x0080
#define AC97_EXTSTAT_LDAC 0x0100
#define AC97_EXTSTAT_MADC 0x0200
#define AC97_EXTSTAT_SPCV 0x0400
#define AC97_EXTSTAT_PRI 0x0800
#define AC97_EXTSTAT_PRJ 0x1000
#define AC97_EXTSTAT_PRK 0x2000
#define AC97_EXTSTAT_PRL 0x4000
/* useful power states */
#define AC97_PWR_D0 0x0000 /* everything on */
#define AC97_PWR_D1 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR4
#define AC97_PWR_D2 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
#define AC97_PWR_D3 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4
#define AC97_PWR_ANLOFF AC97_PWR_PR2|AC97_PWR_PR3 /* analog section off */
/* Total number of defined registers. */
#define AC97_REG_CNT 64
/* OSS interface to the ac97s.. */
#define AC97_STEREO_MASK (SOUND_MASK_VOLUME|SOUND_MASK_PCM|\
SOUND_MASK_LINE|SOUND_MASK_CD|\
SOUND_MASK_ALTPCM|SOUND_MASK_IGAIN|\
SOUND_MASK_LINE1|SOUND_MASK_VIDEO)
#define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \
SOUND_MASK_BASS|SOUND_MASK_TREBLE|\
SOUND_MASK_SPEAKER|SOUND_MASK_MIC|\
SOUND_MASK_PHONEIN|SOUND_MASK_PHONEOUT)
#define AC97_RECORD_MASK (SOUND_MASK_MIC|\
SOUND_MASK_CD|SOUND_MASK_IGAIN|SOUND_MASK_VIDEO|\
SOUND_MASK_LINE1| SOUND_MASK_LINE|\
SOUND_MASK_PHONEIN)
/* original check is not good enough in case FOO is greater than
* SOUND_MIXER_NRDEVICES because the supported_mixers has exactly
* SOUND_MIXER_NRDEVICES elements.
* before matching the given mixer against the bitmask in supported_mixers we
* check if mixer number exceeds maximum allowed size which is as mentioned
* above SOUND_MIXER_NRDEVICES */
#define supported_mixer(CODEC,FOO) ((FOO >= 0) && \
(FOO < SOUND_MIXER_NRDEVICES) && \
(CODEC)->supported_mixers & (1<<FOO) )
struct ac97_codec {
/* Linked list of codecs */
struct list_head list;
/* AC97 controller connected with */
void *private_data;
char *name;
int id;
int dev_mixer;
int type;
u32 model;
unsigned int modem:1;
struct ac97_ops *codec_ops;
/* controller specific lower leverl ac97 accessing routines.
must be re-entrant safe */
u16 (*codec_read) (struct ac97_codec *codec, u8 reg);
void (*codec_write) (struct ac97_codec *codec, u8 reg, u16 val);
/* Wait for codec-ready. Ok to sleep here. */
void (*codec_wait) (struct ac97_codec *codec);
/* callback used by helper drivers for interesting ac97 setups */
void (*codec_unregister) (struct ac97_codec *codec);
struct ac97_driver *driver;
void *driver_private; /* Private data for the driver */
spinlock_t lock;
/* OSS mixer masks */
int modcnt;
int supported_mixers;
int stereo_mixers;
int record_sources;
/* Property flags */
int flags;
int bit_resolution;
/* OSS mixer interface */
int (*read_mixer) (struct ac97_codec *codec, int oss_channel);
void (*write_mixer)(struct ac97_codec *codec, int oss_channel,
unsigned int left, unsigned int right);
int (*recmask_io) (struct ac97_codec *codec, int rw, int mask);
int (*mixer_ioctl)(struct ac97_codec *codec, unsigned int cmd, unsigned long arg);
/* saved OSS mixer states */
unsigned int mixer_state[SOUND_MIXER_NRDEVICES];
/* Software Modem interface */
int (*modem_ioctl)(struct ac97_codec *codec, unsigned int cmd, unsigned long arg);
};
/*
* Operation structures for each known AC97 chip
*/
struct ac97_ops
{
/* Initialise */
int (*init)(struct ac97_codec *c);
/* Amplifier control */
int (*amplifier)(struct ac97_codec *codec, int on);
/* Digital mode control */
int (*digital)(struct ac97_codec *codec, int slots, int rate, int mode);
#define AUDIO_DIGITAL 0x8000
#define AUDIO_PRO 0x4000
#define AUDIO_DRS 0x2000
#define AUDIO_CCMASK 0x003F
#define AC97_DELUDED_MODEM 1 /* Audio codec reports its a modem */
#define AC97_NO_PCM_VOLUME 2 /* Volume control is missing */
#define AC97_DEFAULT_POWER_OFF 4 /* Needs warm reset to power up */
};
extern int ac97_probe_codec(struct ac97_codec *);
extern struct ac97_codec *ac97_alloc_codec(void);
extern void ac97_release_codec(struct ac97_codec *codec);
struct ac97_driver {
struct list_head list;
char *name;
u32 codec_id;
u32 codec_mask;
int (*probe) (struct ac97_codec *codec, struct ac97_driver *driver);
void (*remove) (struct ac97_codec *codec, struct ac97_driver *driver);
};
/* quirk types */
enum {
AC97_TUNE_DEFAULT = -1, /* use default from quirk list (not valid in list) */
AC97_TUNE_NONE = 0, /* nothing extra to do */
AC97_TUNE_HP_ONLY, /* headphone (true line-out) control as master only */
AC97_TUNE_SWAP_HP, /* swap headphone and master controls */
AC97_TUNE_SWAP_SURROUND, /* swap master and surround controls */
AC97_TUNE_AD_SHARING, /* for AD1985, turn on OMS bit and use headphone */
AC97_TUNE_ALC_JACK, /* for Realtek, enable JACK detection */
};
struct ac97_quirk {
unsigned short vendor; /* PCI vendor id */
unsigned short device; /* PCI device id */
unsigned short mask; /* device id bit mask, 0 = accept all */
const char *name; /* name shown as info */
int type; /* quirk type above */
};
#endif /* _AC97_CODEC_H_ */
include/linux/dmaengine.h
+6
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@@ -670,6 +670,12 @@ static inline int dmaengine_resume(struct dma_chan *chan)
return dmaengine_device_control(chan, DMA_RESUME, 0);
}
static inline enum dma_status dmaengine_tx_status(struct dma_chan *chan,
dma_cookie_t cookie, struct dma_tx_state *state)
{
return chan->device->device_tx_status(chan, cookie, state);
}
static inline dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc)
{
return desc->tx_submit(desc);
include/linux/mfd/abx500/ab8500-codec.h
+52
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@@ -0,0 +1,52 @@
/*
* Copyright (C) ST-Ericsson SA 2012
*
* Author: Ola Lilja <ola.o.lilja@stericsson.com>
* for ST-Ericsson.
*
* License terms:
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef AB8500_CORE_CODEC_H
#define AB8500_CORE_CODEC_H
/* Mic-types */
enum amic_type {
AMIC_TYPE_SINGLE_ENDED,
AMIC_TYPE_DIFFERENTIAL
};
/* Mic-biases */
enum amic_micbias {
AMIC_MICBIAS_VAMIC1,
AMIC_MICBIAS_VAMIC2
};
/* Bias-voltage */
enum ear_cm_voltage {
EAR_CMV_0_95V,
EAR_CMV_1_10V,
EAR_CMV_1_27V,
EAR_CMV_1_58V
};
/* Analog microphone settings */
struct amic_settings {
enum amic_type mic1_type;
enum amic_type mic2_type;
enum amic_micbias mic1a_micbias;
enum amic_micbias mic1b_micbias;
enum amic_micbias mic2_micbias;
};
/* Platform data structure for the audio-parts of the AB8500 */
struct ab8500_codec_platform_data {
struct amic_settings amics;
enum ear_cm_voltage ear_cmv;
};
#endif
include/linux/mfd/abx500/ab8500.h
+2
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@@ -266,6 +266,7 @@ struct ab8500 {
struct regulator_reg_init;
struct regulator_init_data;
struct ab8500_gpio_platform_data;
struct ab8500_codec_platform_data;
/**
* struct ab8500_platform_data - AB8500 platform data
@@ -284,6 +285,7 @@ struct ab8500_platform_data {
int num_regulator;
struct regulator_init_data *regulator;
struct ab8500_gpio_platform_data *gpio;
struct ab8500_codec_platform_data *codec;
};
extern int __devinit ab8500_init(struct ab8500 *ab8500,
include/linux/platform_data/mmp_audio.h
+22
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@@ -0,0 +1,22 @@
/*
* MMP Platform AUDIO Management
*
* Copyright (c) 2011 Marvell Semiconductors Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef MMP_AUDIO_H
#define MMP_AUDIO_H
struct mmp_audio_platdata {
u32 period_max_capture;
u32 buffer_max_capture;
u32 period_max_playback;
u32 buffer_max_playback;
};
#endif /* MMP_AUDIO_H */
include/sound/cs46xx.h
-1745
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File diff suppressed because it is too large Load Diff
include/sound/cs46xx_dsp_scb_types.h
-1213
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File diff suppressed because it is too large Load Diff
include/sound/cs46xx_dsp_spos.h
-234
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@@ -1,234 +0,0 @@
/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef __CS46XX_DSP_SPOS_H__
#define __CS46XX_DSP_SPOS_H__
#include "cs46xx_dsp_scb_types.h"
#include "cs46xx_dsp_task_types.h"
#define SYMBOL_CONSTANT 0x0
#define SYMBOL_SAMPLE 0x1
#define SYMBOL_PARAMETER 0x2
#define SYMBOL_CODE 0x3
#define SEGTYPE_SP_PROGRAM 0x00000001
#define SEGTYPE_SP_PARAMETER 0x00000002
#define SEGTYPE_SP_SAMPLE 0x00000003
#define SEGTYPE_SP_COEFFICIENT 0x00000004
#define DSP_SPOS_UU 0x0deadul /* unused */
#define DSP_SPOS_DC 0x0badul /* don't care */
#define DSP_SPOS_DC_DC 0x0bad0badul /* don't care */
#define DSP_SPOS_UUUU 0xdeadc0edul /* unused */
#define DSP_SPOS_UUHI 0xdeadul
#define DSP_SPOS_UULO 0xc0edul
#define DSP_SPOS_DCDC 0x0badf1d0ul /* don't care */
#define DSP_SPOS_DCDCHI 0x0badul
#define DSP_SPOS_DCDCLO 0xf1d0ul
#define DSP_MAX_TASK_NAME 60
#define DSP_MAX_SYMBOL_NAME 100
#define DSP_MAX_SCB_NAME 60
#define DSP_MAX_SCB_DESC 200
#define DSP_MAX_TASK_DESC 50
#define DSP_MAX_PCM_CHANNELS 32
#define DSP_MAX_SRC_NR 14
#define DSP_PCM_MAIN_CHANNEL 1
#define DSP_PCM_REAR_CHANNEL 2
#define DSP_PCM_CENTER_LFE_CHANNEL 3
#define DSP_PCM_S71_CHANNEL 4 /* surround 7.1 */
#define DSP_IEC958_CHANNEL 5
#define DSP_SPDIF_STATUS_OUTPUT_ENABLED 1
#define DSP_SPDIF_STATUS_PLAYBACK_OPEN 2
#define DSP_SPDIF_STATUS_HW_ENABLED 4
#define DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED 8
struct dsp_symbol_entry {
u32 address;
char symbol_name[DSP_MAX_SYMBOL_NAME];
int symbol_type;
/* initialized by driver */
struct dsp_module_desc * module;
int deleted;
};
struct dsp_symbol_desc {
int nsymbols;
struct dsp_symbol_entry *symbols;
/* initialized by driver */
int highest_frag_index;
};
struct dsp_segment_desc {
int segment_type;
u32 offset;
u32 size;
u32 * data;
};
struct dsp_module_desc {
char * module_name;
struct dsp_symbol_desc symbol_table;
int nsegments;
struct dsp_segment_desc * segments;
/* initialized by driver */
u32 overlay_begin_address;
u32 load_address;
int nfixups;
};
struct dsp_scb_descriptor {
char scb_name[DSP_MAX_SCB_NAME];
u32 address;
int index;
u32 *data;
struct dsp_scb_descriptor * sub_list_ptr;
struct dsp_scb_descriptor * next_scb_ptr;
struct dsp_scb_descriptor * parent_scb_ptr;
struct dsp_symbol_entry * task_entry;
struct dsp_symbol_entry * scb_symbol;
struct snd_info_entry *proc_info;
int ref_count;
u16 volume[2];
unsigned int deleted :1;
unsigned int updated :1;
unsigned int volume_set :1;
};
struct dsp_task_descriptor {
char task_name[DSP_MAX_TASK_NAME];
int size;
u32 address;
int index;
u32 *data;
};
struct dsp_pcm_channel_descriptor {
int active;
int src_slot;
int pcm_slot;
u32 sample_rate;
u32 unlinked;
struct dsp_scb_descriptor * pcm_reader_scb;
struct dsp_scb_descriptor * src_scb;
struct dsp_scb_descriptor * mixer_scb;
void * private_data;
};
struct dsp_spos_instance {
struct dsp_symbol_desc symbol_table; /* currently available loaded symbols in SP */
int nmodules;
struct dsp_module_desc * modules; /* modules loaded into SP */
struct dsp_segment_desc code;
/* Main PCM playback mixer */
struct dsp_scb_descriptor * master_mix_scb;
u16 dac_volume_right;
u16 dac_volume_left;
/* Rear/surround PCM playback mixer */
struct dsp_scb_descriptor * rear_mix_scb;
/* Center/LFE mixer */
struct dsp_scb_descriptor * center_lfe_mix_scb;
int npcm_channels;
int nsrc_scb;
struct dsp_pcm_channel_descriptor pcm_channels[DSP_MAX_PCM_CHANNELS];
int src_scb_slots[DSP_MAX_SRC_NR];
/* cache this symbols */
struct dsp_symbol_entry * null_algorithm; /* used by PCMreaderSCB's */
struct dsp_symbol_entry * s16_up; /* used by SRCtaskSCB's */
/* proc fs */
struct snd_card *snd_card;
struct snd_info_entry * proc_dsp_dir;
struct snd_info_entry * proc_sym_info_entry;
struct snd_info_entry * proc_modules_info_entry;
struct snd_info_entry * proc_parameter_dump_info_entry;
struct snd_info_entry * proc_sample_dump_info_entry;
/* SCB's descriptors */
int nscb;
int scb_highest_frag_index;
struct dsp_scb_descriptor scbs[DSP_MAX_SCB_DESC];
struct snd_info_entry * proc_scb_info_entry;
struct dsp_scb_descriptor * the_null_scb;
/* Task's descriptors */
int ntask;
struct dsp_task_descriptor tasks[DSP_MAX_TASK_DESC];
struct snd_info_entry * proc_task_info_entry;
/* SPDIF status */
int spdif_status_out;
int spdif_status_in;
u16 spdif_input_volume_right;
u16 spdif_input_volume_left;
/* spdif channel status,
left right and user validity bits */
unsigned int spdif_csuv_default;
unsigned int spdif_csuv_stream;
/* SPDIF input sample rate converter */
struct dsp_scb_descriptor * spdif_in_src;
/* SPDIF input asynch. receiver */
struct dsp_scb_descriptor * asynch_rx_scb;
/* Capture record mixer SCB */
struct dsp_scb_descriptor * record_mixer_scb;
/* CODEC input SCB */
struct dsp_scb_descriptor * codec_in_scb;
/* reference snooper */
struct dsp_scb_descriptor * ref_snoop_scb;
/* SPDIF output PCM reference */
struct dsp_scb_descriptor * spdif_pcm_input_scb;
/* asynch TX task */
struct dsp_scb_descriptor * asynch_tx_scb;
/* record sources */
struct dsp_scb_descriptor * pcm_input;
struct dsp_scb_descriptor * adc_input;
int spdif_in_sample_rate;
};
#endif /* __DSP_SPOS_H__ */
include/sound/cs46xx_dsp_task_types.h
-252
View File
@@ -1,252 +0,0 @@
/*
* The driver for the Cirrus Logic's Sound Fusion CS46XX based soundcards
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*
* NOTE: comments are copy/paste from cwcemb80.lst
* provided by Tom Woller at Cirrus (my only
* documentation about the SP OS running inside
* the DSP)
*/
#ifndef __CS46XX_DSP_TASK_TYPES_H__
#define __CS46XX_DSP_TASK_TYPES_H__
#include "cs46xx_dsp_scb_types.h"
/*********************************************************************************************
Example hierarchy of stream control blocks in the SP
hfgTree
Ptr____Call (c)
\
-------+------ ------------- ------------- ------------- -----
| SBlaster IF |______\| Foreground |___\| Middlegr'nd |___\| Background |___\| Nul |
| |Goto /| tree header |g /| tree header |g /| tree header |g /| SCB |r
-------------- (g) ------------- ------------- ------------- -----
|c |c |c |c
| | | |
\/ ------------- ------------- -------------
| Foreground |_\ | Middlegr'nd |_\ | Background |_\
| tree |g/ | tree |g/ | tree |g/
------------- ------------- -------------
|c |c |c
| | |
\/ \/ \/
*********************************************************************************************/
#define HFG_FIRST_EXECUTE_MODE 0x0001
#define HFG_FIRST_EXECUTE_MODE_BIT 0
#define HFG_CONTEXT_SWITCH_MODE 0x0002
#define HFG_CONTEXT_SWITCH_MODE_BIT 1
#define MAX_FG_STACK_SIZE 32 /* THESE NEED TO BE COMPUTED PROPERLY */
#define MAX_MG_STACK_SIZE 16
#define MAX_BG_STACK_SIZE 9
#define MAX_HFG_STACK_SIZE 4
#define SLEEP_ACTIVE_INCREMENT 0 /* Enable task tree thread to go to sleep
This should only ever be used on the Background thread */
#define STANDARD_ACTIVE_INCREMENT 1 /* Task tree thread normal operation */
#define SUSPEND_ACTIVE_INCREMENT 2 /* Cause execution to suspend in the task tree thread
This should only ever be used on the Background thread */
#define HOSTFLAGS_DISABLE_BG_SLEEP 0 /* Host-controlled flag that determines whether we go to sleep
at the end of BG */
/* Minimal context save area for Hyper Forground */
struct dsp_hf_save_area {
u32 r10_save;
u32 r54_save;
u32 r98_save;
___DSP_DUAL_16BIT_ALLOC(
status_save,
ind_save
)
___DSP_DUAL_16BIT_ALLOC(
rci1_save,
rci0_save
)
u32 r32_save;
u32 r76_save;
u32 rsd2_save;
___DSP_DUAL_16BIT_ALLOC(
rsi2_save, /* See TaskTreeParameterBlock for
remainder of registers */
rsa2Save
)
/* saved as part of HFG context */
};
/* Task link data structure */
struct dsp_tree_link {
___DSP_DUAL_16BIT_ALLOC(
/* Pointer to sibling task control block */
next_scb,
/* Pointer to child task control block */
sub_ptr
)
___DSP_DUAL_16BIT_ALLOC(
/* Pointer to code entry point */
entry_point,
/* Pointer to local data */
this_spb
)
};
struct dsp_task_tree_data {
___DSP_DUAL_16BIT_ALLOC(
/* Initial tock count; controls task tree execution rate */
tock_count_limit,
/* Tock down counter */
tock_count
)
/* Add to ActiveCount when TockCountLimit reached:
Subtract on task tree termination */
___DSP_DUAL_16BIT_ALLOC(
active_tncrement,
/* Number of pending activations for task tree */
active_count
)
___DSP_DUAL_16BIT_ALLOC(
/* BitNumber to enable modification of correct bit in ActiveTaskFlags */
active_bit,
/* Pointer to OS location for indicating current activity on task level */
active_task_flags_ptr
)
/* Data structure for controlling movement of memory blocks:-
currently unused */
___DSP_DUAL_16BIT_ALLOC(
mem_upd_ptr,
/* Data structure for controlling synchronous link update */
link_upd_ptr
)
___DSP_DUAL_16BIT_ALLOC(
/* Save area for remainder of full context. */
save_area,
/* Address of start of local stack for data storage */
data_stack_base_ptr
)
};
struct dsp_interval_timer_data
{
/* These data items have the same relative locations to those */
___DSP_DUAL_16BIT_ALLOC(
interval_timer_period,
itd_unused
)
/* used for this data in the SPOS control block for SPOS 1.0 */
___DSP_DUAL_16BIT_ALLOC(
num_FG_ticks_this_interval,
num_intervals
)
};
/* This structure contains extra storage for the task tree
Currently, this additional data is related only to a full context save */
struct dsp_task_tree_context_block {
/* Up to 10 values are saved onto the stack. 8 for the task tree, 1 for
The access to the context switch (call or interrupt), and 1 spare that
users should never use. This last may be required by the system */
___DSP_DUAL_16BIT_ALLOC(
stack1,
stack0
)
___DSP_DUAL_16BIT_ALLOC(
stack3,
stack2
)
___DSP_DUAL_16BIT_ALLOC(
stack5,
stack4
)
___DSP_DUAL_16BIT_ALLOC(
stack7,
stack6
)
___DSP_DUAL_16BIT_ALLOC(
stack9,
stack8
)
u32 saverfe;
/* Value may be overwriten by stack save algorithm.
Retain the size of the stack data saved here if used */
___DSP_DUAL_16BIT_ALLOC(
reserved1,
stack_size
)
u32 saverba; /* (HFG) */
u32 saverdc;
u32 savers_config_23; /* (HFG) */
u32 savers_DMA23; /* (HFG) */
u32 saversa0;
u32 saversi0;
u32 saversa1;
u32 saversi1;
u32 saversa3;
u32 saversd0;
u32 saversd1;
u32 saversd3;
u32 savers_config01;
u32 savers_DMA01;
u32 saveacc0hl;
u32 saveacc1hl;
u32 saveacc0xacc1x;
u32 saveacc2hl;
u32 saveacc3hl;
u32 saveacc2xacc3x;
u32 saveaux0hl;
u32 saveaux1hl;
u32 saveaux0xaux1x;
u32 saveaux2hl;
u32 saveaux3hl;
u32 saveaux2xaux3x;
u32 savershouthl;
u32 savershoutxmacmode;
};
struct dsp_task_tree_control_block {
struct dsp_hf_save_area context;
struct dsp_tree_link links;
struct dsp_task_tree_data data;
struct dsp_task_tree_context_block context_blk;
struct dsp_interval_timer_data int_timer;
};
#endif /* __DSP_TASK_TYPES_H__ */
include/sound/designware_i2s.h
+69
View File
@@ -0,0 +1,69 @@
/*
* Copyright (ST) 2012 Rajeev Kumar (rajeev-dlh.kumar@st.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef __SOUND_DESIGNWARE_I2S_H
#define __SOUND_DESIGNWARE_I2S_H
#include <linux/dmaengine.h>
#include <linux/types.h>
/*
* struct i2s_clk_config_data - represent i2s clk configuration data
* @chan_nr: number of channel
* @data_width: number of bits per sample (8/16/24/32 bit)
* @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
*/
struct i2s_clk_config_data {
int chan_nr;
u32 data_width;
u32 sample_rate;
};
struct i2s_platform_data {
#define DWC_I2S_PLAY (1 << 0)
#define DWC_I2S_RECORD (1 << 1)
unsigned int cap;
int channel;
u32 snd_fmts;
u32 snd_rates;
void *play_dma_data;
void *capture_dma_data;
bool (*filter)(struct dma_chan *chan, void *slave);
int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
};
struct i2s_dma_data {
void *data;
dma_addr_t addr;
u32 max_burst;
enum dma_slave_buswidth addr_width;
bool (*filter)(struct dma_chan *chan, void *slave);
};
/* I2S DMA registers */
#define I2S_RXDMA 0x01C0
#define I2S_TXDMA 0x01C8
#define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */
#define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */
#define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */
#define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */
#endif /* __SOUND_DESIGNWARE_I2S_H */
include/sound/dmaengine_pcm.h
+1
View File
@@ -39,6 +39,7 @@ int snd_hwparams_to_dma_slave_config(const struct snd_pcm_substream *substream,
const struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config);
int snd_dmaengine_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
snd_pcm_uframes_t snd_dmaengine_pcm_pointer(struct snd_pcm_substream *substream);
snd_pcm_uframes_t snd_dmaengine_pcm_pointer_no_residue(struct snd_pcm_substream *substream);
int snd_dmaengine_pcm_open(struct snd_pcm_substream *substream,
dma_filter_fn filter_fn, void *filter_data);
include/sound/pcm.h
+13 -1
View File
@@ -810,7 +810,7 @@ int snd_pcm_hw_constraint_integer(struct snd_pcm_runtime *runtime, snd_pcm_hw_pa
int snd_pcm_hw_constraint_list(struct snd_pcm_runtime *runtime,
unsigned int cond,
snd_pcm_hw_param_t var,
struct snd_pcm_hw_constraint_list *l);
const struct snd_pcm_hw_constraint_list *l);
int snd_pcm_hw_constraint_ratnums(struct snd_pcm_runtime *runtime,
unsigned int cond,
snd_pcm_hw_param_t var,
@@ -893,6 +893,7 @@ extern const struct snd_pcm_hw_constraint_list snd_pcm_known_rates;
int snd_pcm_limit_hw_rates(struct snd_pcm_runtime *runtime);
unsigned int snd_pcm_rate_to_rate_bit(unsigned int rate);
unsigned int snd_pcm_rate_bit_to_rate(unsigned int rate_bit);
static inline void snd_pcm_set_runtime_buffer(struct snd_pcm_substream *substream,
struct snd_dma_buffer *bufp)
@@ -1073,4 +1074,15 @@ static inline void snd_pcm_limit_isa_dma_size(int dma, size_t *max)
const char *snd_pcm_format_name(snd_pcm_format_t format);
/**
* Get a string naming the direction of a stream
*/
static inline const char *snd_pcm_stream_str(struct snd_pcm_substream *substream)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
return "Playback";
else
return "Capture";
}
#endif /* __SOUND_PCM_H */
include/sound/pcm_params.h
+2
View File
@@ -22,6 +22,8 @@
*
*/
#include <sound/pcm.h>
int snd_pcm_hw_param_first(struct snd_pcm_substream *pcm,
struct snd_pcm_hw_params *params,
snd_pcm_hw_param_t var, int *dir);
include/sound/soc-dapm.h
+12
View File
@@ -229,6 +229,10 @@ struct device;
{ .id = snd_soc_dapm_adc, .name = wname, .sname = stname, .reg = wreg, \
.shift = wshift, .invert = winvert, \
.event = wevent, .event_flags = wflags}
#define SND_SOC_DAPM_CLOCK_SUPPLY(wname) \
{ .id = snd_soc_dapm_clock_supply, .name = wname, \
.reg = SND_SOC_NOPM, .event = dapm_clock_event, \
.event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD }
/* generic widgets */
#define SND_SOC_DAPM_REG(wid, wname, wreg, wshift, wmask, won_val, woff_val) \
@@ -245,6 +249,7 @@ struct device;
.reg = SND_SOC_NOPM, .shift = wdelay, .event = dapm_regulator_event, \
.event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD }
/* dapm kcontrol types */
#define SOC_DAPM_SINGLE(xname, reg, shift, max, invert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
@@ -327,6 +332,8 @@ int dapm_reg_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event);
int dapm_regulator_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event);
int dapm_clock_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event);
/* dapm controls */
int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol,
@@ -367,6 +374,8 @@ int snd_soc_dapm_new_widgets(struct snd_soc_dapm_context *dapm);
void snd_soc_dapm_free(struct snd_soc_dapm_context *dapm);
int snd_soc_dapm_add_routes(struct snd_soc_dapm_context *dapm,
const struct snd_soc_dapm_route *route, int num);
int snd_soc_dapm_del_routes(struct snd_soc_dapm_context *dapm,
const struct snd_soc_dapm_route *route, int num);
int snd_soc_dapm_weak_routes(struct snd_soc_dapm_context *dapm,
const struct snd_soc_dapm_route *route, int num);
@@ -432,6 +441,7 @@ enum snd_soc_dapm_type {
snd_soc_dapm_post, /* machine specific post widget - exec last */
snd_soc_dapm_supply, /* power/clock supply */
snd_soc_dapm_regulator_supply, /* external regulator */
snd_soc_dapm_clock_supply, /* external clock */
snd_soc_dapm_aif_in, /* audio interface input */
snd_soc_dapm_aif_out, /* audio interface output */
snd_soc_dapm_siggen, /* signal generator */
@@ -537,6 +547,8 @@ struct snd_soc_dapm_widget {
struct list_head dirty;
int inputs;
int outputs;
struct clk *clk;
};
struct snd_soc_dapm_update {
include/sound/soc.h
+72 -5
View File
@@ -42,11 +42,22 @@
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.max = xmax, .platform_max = xmax, .invert = xinvert})
#define SOC_DOUBLE_R_RANGE_VALUE(xlreg, xrreg, xshift, xmin, xmax, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.min = xmin, .max = xmax, .platform_max = xmax, .invert = xinvert})
#define SOC_SINGLE(xname, reg, shift, max, invert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
.put = snd_soc_put_volsw, \
.private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
#define SOC_SINGLE_RANGE(xname, xreg, xshift, xmin, xmax, xinvert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw_range, .get = snd_soc_get_volsw_range, \
.put = snd_soc_put_volsw_range, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .shift = xshift, .min = xmin,\
.max = xmax, .platform_max = xmax, .invert = xinvert} }
#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
@@ -67,6 +78,16 @@
{.reg = xreg, .rreg = xreg, \
.shift = xshift, .rshift = xshift, \
.max = xmax, .min = xmin} }
#define SOC_SINGLE_RANGE_TLV(xname, xreg, xshift, xmin, xmax, xinvert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw_range, \
.get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .shift = xshift, .min = xmin,\
.max = xmax, .platform_max = xmax, .invert = xinvert} }
#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
@@ -79,6 +100,13 @@
.get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
xmax, xinvert) }
#define SOC_DOUBLE_R_RANGE(xname, reg_left, reg_right, xshift, xmin, \
xmax, xinvert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw_range, \
.get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
.private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
xshift, xmin, xmax, xinvert) }
#define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
@@ -97,6 +125,16 @@
.get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \
.private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
xmax, xinvert) }
#define SOC_DOUBLE_R_RANGE_TLV(xname, reg_left, reg_right, xshift, xmin, \
xmax, xinvert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
SNDRV_CTL_ELEM_ACCESS_READWRITE,\
.tlv.p = (tlv_array), \
.info = snd_soc_info_volsw_range, \
.get = snd_soc_get_volsw_range, .put = snd_soc_put_volsw_range, \
.private_value = SOC_DOUBLE_R_RANGE_VALUE(reg_left, reg_right, \
xshift, xmin, xmax, xinvert) }
#define SOC_DOUBLE_R_SX_TLV(xname, xreg, xrreg, xshift, xmin, xmax, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
@@ -460,6 +498,12 @@ int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_info_volsw_range(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo);
int snd_soc_put_volsw_range(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_get_volsw_range(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol);
int snd_soc_limit_volume(struct snd_soc_codec *codec,
const char *name, int max);
int snd_soc_bytes_info(struct snd_kcontrol *kcontrol,
@@ -785,13 +829,36 @@ struct snd_soc_dai_link {
/* config - must be set by machine driver */
const char *name; /* Codec name */
const char *stream_name; /* Stream name */
const char *codec_name; /* for multi-codec */
const struct device_node *codec_of_node;
const char *platform_name; /* for multi-platform */
const struct device_node *platform_of_node;
/*
* You MAY specify the link's CPU-side device, either by device name,
* or by DT/OF node, but not both. If this information is omitted,
* the CPU-side DAI is matched using .cpu_dai_name only, which hence
* must be globally unique. These fields are currently typically used
* only for codec to codec links, or systems using device tree.
*/
const char *cpu_name;
const struct device_node *cpu_of_node;
/*
* You MAY specify the DAI name of the CPU DAI. If this information is
* omitted, the CPU-side DAI is matched using .cpu_name/.cpu_of_node
* only, which only works well when that device exposes a single DAI.
*/
const char *cpu_dai_name;
const struct device_node *cpu_dai_of_node;
/*
* You MUST specify the link's codec, either by device name, or by
* DT/OF node, but not both.
*/
const char *codec_name;
const struct device_node *codec_of_node;
/* You MUST specify the DAI name within the codec */
const char *codec_dai_name;
/*
* You MAY specify the link's platform/PCM/DMA driver, either by
* device name, or by DT/OF node, but not both. Some forms of link
* do not need a platform.
*/
const char *platform_name;
const struct device_node *platform_of_node;
int be_id; /* optional ID for machine driver BE identification */
const struct snd_soc_pcm_stream *params;
include/sound/spear_dma.h
+35
View File
@@ -0,0 +1,35 @@
/*
* linux/spear_dma.h
*
* Copyright (ST) 2012 Rajeev Kumar (rajeev-dlh.kumar@st.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef SPEAR_DMA_H
#define SPEAR_DMA_H
#include <linux/dmaengine.h>
struct spear_dma_data {
void *data;
dma_addr_t addr;
u32 max_burst;
enum dma_slave_buswidth addr_width;
bool (*filter)(struct dma_chan *chan, void *slave);
};
#endif /* SPEAR_DMA_H */
include/sound/spear_spdif.h
+29
View File
@@ -0,0 +1,29 @@
/*
* Copyright (ST) 2012 Vipin Kumar (vipin.kumar@st.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __SOUND_SPDIF_H
#define __SOUND_SPDIF_H
struct spear_spdif_platform_data {
/* DMA params */
void *dma_params;
bool (*filter)(struct dma_chan *chan, void *slave);
void (*reset_perip)(void);
};
#endif /* SOUND_SPDIF_H */
include/sound/tlv.h
+21 -8
View File
@@ -38,21 +38,31 @@
#define SNDRV_CTL_TLVT_DB_MINMAX 4 /* dB scale with min/max */
#define SNDRV_CTL_TLVT_DB_MINMAX_MUTE 5 /* dB scale with min/max with mute */
#define TLV_ITEM(type, ...) \
(type), TLV_LENGTH(__VA_ARGS__), __VA_ARGS__
#define TLV_LENGTH(...) \
((unsigned int)sizeof((const unsigned int[]) { __VA_ARGS__ }))
#define TLV_CONTAINER_ITEM(...) \
TLV_ITEM(SNDRV_CTL_TLVT_CONTAINER, __VA_ARGS__)
#define DECLARE_TLV_CONTAINER(name, ...) \
unsigned int name[] = { TLV_CONTAINER_ITEM(__VA_ARGS__) }
#define TLV_DB_SCALE_MASK 0xffff
#define TLV_DB_SCALE_MUTE 0x10000
#define TLV_DB_SCALE_ITEM(min, step, mute) \
SNDRV_CTL_TLVT_DB_SCALE, 2 * sizeof(unsigned int), \
(min), ((step) & TLV_DB_SCALE_MASK) | ((mute) ? TLV_DB_SCALE_MUTE : 0)
TLV_ITEM(SNDRV_CTL_TLVT_DB_SCALE, \
(min), \
((step) & TLV_DB_SCALE_MASK) | \
((mute) ? TLV_DB_SCALE_MUTE : 0))
#define DECLARE_TLV_DB_SCALE(name, min, step, mute) \
unsigned int name[] = { TLV_DB_SCALE_ITEM(min, step, mute) }
/* dB scale specified with min/max values instead of step */
#define TLV_DB_MINMAX_ITEM(min_dB, max_dB) \
SNDRV_CTL_TLVT_DB_MINMAX, 2 * sizeof(unsigned int), \
(min_dB), (max_dB)
TLV_ITEM(SNDRV_CTL_TLVT_DB_MINMAX, (min_dB), (max_dB))
#define TLV_DB_MINMAX_MUTE_ITEM(min_dB, max_dB) \
SNDRV_CTL_TLVT_DB_MINMAX_MUTE, 2 * sizeof(unsigned int), \
(min_dB), (max_dB)
TLV_ITEM(SNDRV_CTL_TLVT_DB_MINMAX_MUTE, (min_dB), (max_dB))
#define DECLARE_TLV_DB_MINMAX(name, min_dB, max_dB) \
unsigned int name[] = { TLV_DB_MINMAX_ITEM(min_dB, max_dB) }
#define DECLARE_TLV_DB_MINMAX_MUTE(name, min_dB, max_dB) \
@@ -60,13 +70,16 @@
/* linear volume between min_dB and max_dB (.01dB unit) */
#define TLV_DB_LINEAR_ITEM(min_dB, max_dB) \
SNDRV_CTL_TLVT_DB_LINEAR, 2 * sizeof(unsigned int), \
(min_dB), (max_dB)
TLV_ITEM(SNDRV_CTL_TLVT_DB_LINEAR, (min_dB), (max_dB))
#define DECLARE_TLV_DB_LINEAR(name, min_dB, max_dB) \
unsigned int name[] = { TLV_DB_LINEAR_ITEM(min_dB, max_dB) }
/* dB range container */
/* Each item is: <min> <max> <TLV> */
#define TLV_DB_RANGE_ITEM(...) \
TLV_ITEM(SNDRV_CTL_TLVT_DB_RANGE, __VA_ARGS__)
#define DECLARE_TLV_DB_RANGE(name, ...) \
unsigned int name[] = { TLV_DB_RANGE_ITEM(__VA_ARGS__) }
/* The below assumes that each item TLV is 4 words like DB_SCALE or LINEAR */
#define TLV_DB_RANGE_HEAD(num) \
SNDRV_CTL_TLVT_DB_RANGE, 6 * (num) * sizeof(unsigned int)
include/sound/trident.h
-445
View File
@@ -1,445 +0,0 @@
#ifndef __SOUND_TRIDENT_H
#define __SOUND_TRIDENT_H
/*
* audio@tridentmicro.com
* Fri Feb 19 15:55:28 MST 1999
* Definitions for Trident 4DWave DX/NX chips
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include "pcm.h"
#include "mpu401.h"
#include "ac97_codec.h"
#include "util_mem.h"
#define TRIDENT_DEVICE_ID_DX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_DX)
#define TRIDENT_DEVICE_ID_NX ((PCI_VENDOR_ID_TRIDENT<<16)|PCI_DEVICE_ID_TRIDENT_4DWAVE_NX)
#define TRIDENT_DEVICE_ID_SI7018 ((PCI_VENDOR_ID_SI<<16)|PCI_DEVICE_ID_SI_7018)
#define SNDRV_TRIDENT_VOICE_TYPE_PCM 0
#define SNDRV_TRIDENT_VOICE_TYPE_SYNTH 1
#define SNDRV_TRIDENT_VOICE_TYPE_MIDI 2
#define SNDRV_TRIDENT_VFLG_RUNNING (1<<0)
/* TLB code constants */
#define SNDRV_TRIDENT_PAGE_SIZE 4096
#define SNDRV_TRIDENT_PAGE_SHIFT 12
#define SNDRV_TRIDENT_PAGE_MASK ((1<<SNDRV_TRIDENT_PAGE_SHIFT)-1)
#define SNDRV_TRIDENT_MAX_PAGES 4096
/*
* Direct registers
*/
#define TRID_REG(trident, x) ((trident)->port + (x))
#define ID_4DWAVE_DX 0x2000
#define ID_4DWAVE_NX 0x2001
/* Bank definitions */
#define T4D_BANK_A 0
#define T4D_BANK_B 1
#define T4D_NUM_BANKS 2
/* Register definitions */
/* Global registers */
enum global_control_bits {
CHANNEL_IDX = 0x0000003f,
OVERRUN_IE = 0x00000400, /* interrupt enable: capture overrun */
UNDERRUN_IE = 0x00000800, /* interrupt enable: playback underrun */
ENDLP_IE = 0x00001000, /* interrupt enable: end of buffer */
MIDLP_IE = 0x00002000, /* interrupt enable: middle buffer */
ETOG_IE = 0x00004000, /* interrupt enable: envelope toggling */
EDROP_IE = 0x00008000, /* interrupt enable: envelope drop */
BANK_B_EN = 0x00010000, /* SiS: enable bank B (64 channels) */
PCMIN_B_MIX = 0x00020000, /* SiS: PCM IN B mixing enable */
I2S_OUT_ASSIGN = 0x00040000, /* SiS: I2S Out contains surround PCM */
SPDIF_OUT_ASSIGN= 0x00080000, /* SiS: 0=S/PDIF L/R | 1=PCM Out FIFO */
MAIN_OUT_ASSIGN = 0x00100000, /* SiS: 0=PCM Out FIFO | 1=MMC Out buffer */
};
enum miscint_bits {
PB_UNDERRUN_IRQ = 0x00000001, REC_OVERRUN_IRQ = 0x00000002,
SB_IRQ = 0x00000004, MPU401_IRQ = 0x00000008,
OPL3_IRQ = 0x00000010, ADDRESS_IRQ = 0x00000020,
ENVELOPE_IRQ = 0x00000040, PB_UNDERRUN = 0x00000100,
REC_OVERRUN = 0x00000200, MIXER_UNDERFLOW = 0x00000400,
MIXER_OVERFLOW = 0x00000800, NX_SB_IRQ_DISABLE = 0x00001000,
ST_TARGET_REACHED = 0x00008000,
PB_24K_MODE = 0x00010000, ST_IRQ_EN = 0x00800000,
ACGPIO_IRQ = 0x01000000
};
/* T2 legacy dma control registers. */
#define LEGACY_DMAR0 0x00 // ADR0
#define LEGACY_DMAR4 0x04 // CNT0
#define LEGACY_DMAR6 0x06 // CNT0 - High bits
#define LEGACY_DMAR11 0x0b // MOD
#define LEGACY_DMAR15 0x0f // MMR
#define T4D_START_A 0x80
#define T4D_STOP_A 0x84
#define T4D_DLY_A 0x88
#define T4D_SIGN_CSO_A 0x8c
#define T4D_CSPF_A 0x90
#define T4D_CSPF_B 0xbc
#define T4D_CEBC_A 0x94
#define T4D_AINT_A 0x98
#define T4D_AINTEN_A 0x9c
#define T4D_LFO_GC_CIR 0xa0
#define T4D_MUSICVOL_WAVEVOL 0xa8
#define T4D_SBDELTA_DELTA_R 0xac
#define T4D_MISCINT 0xb0
#define T4D_START_B 0xb4
#define T4D_STOP_B 0xb8
#define T4D_SBBL_SBCL 0xc0
#define T4D_SBCTRL_SBE2R_SBDD 0xc4
#define T4D_STIMER 0xc8
#define T4D_AINT_B 0xd8
#define T4D_AINTEN_B 0xdc
#define T4D_RCI 0x70
/* MPU-401 UART */
#define T4D_MPU401_BASE 0x20
#define T4D_MPUR0 0x20
#define T4D_MPUR1 0x21
#define T4D_MPUR2 0x22
#define T4D_MPUR3 0x23
/* S/PDIF Registers */
#define NX_SPCTRL_SPCSO 0x24
#define NX_SPLBA 0x28
#define NX_SPESO 0x2c
#define NX_SPCSTATUS 0x64
/* Joystick */
#define GAMEPORT_GCR 0x30
#define GAMEPORT_MODE_ADC 0x80
#define GAMEPORT_LEGACY 0x31
#define GAMEPORT_AXES 0x34
/* NX Specific Registers */
#define NX_TLBC 0x6c
/* Channel Registers */
#define CH_START 0xe0
#define CH_DX_CSO_ALPHA_FMS 0xe0
#define CH_DX_ESO_DELTA 0xe8
#define CH_DX_FMC_RVOL_CVOL 0xec
#define CH_NX_DELTA_CSO 0xe0
#define CH_NX_DELTA_ESO 0xe8
#define CH_NX_ALPHA_FMS_FMC_RVOL_CVOL 0xec
#define CH_LBA 0xe4
#define CH_GVSEL_PAN_VOL_CTRL_EC 0xf0
#define CH_EBUF1 0xf4
#define CH_EBUF2 0xf8
/* AC-97 Registers */
#define DX_ACR0_AC97_W 0x40
#define DX_ACR1_AC97_R 0x44
#define DX_ACR2_AC97_COM_STAT 0x48
#define NX_ACR0_AC97_COM_STAT 0x40
#define NX_ACR1_AC97_W 0x44
#define NX_ACR2_AC97_R_PRIMARY 0x48
#define NX_ACR3_AC97_R_SECONDARY 0x4c
#define SI_AC97_WRITE 0x40
#define SI_AC97_READ 0x44
#define SI_SERIAL_INTF_CTRL 0x48
#define SI_AC97_GPIO 0x4c
#define SI_ASR0 0x50
#define SI_SPDIF_CS 0x70
#define SI_GPIO 0x7c
enum trident_nx_ac97_bits {
/* ACR1-3 */
NX_AC97_BUSY_WRITE = 0x0800,
NX_AC97_BUSY_READ = 0x0800,
NX_AC97_BUSY_DATA = 0x0400,
NX_AC97_WRITE_SECONDARY = 0x0100,
/* ACR0 */
NX_AC97_SECONDARY_READY = 0x0040,
NX_AC97_SECONDARY_RECORD = 0x0020,
NX_AC97_SURROUND_OUTPUT = 0x0010,
NX_AC97_PRIMARY_READY = 0x0008,
NX_AC97_PRIMARY_RECORD = 0x0004,
NX_AC97_PCM_OUTPUT = 0x0002,
NX_AC97_WARM_RESET = 0x0001
};
enum trident_dx_ac97_bits {
DX_AC97_BUSY_WRITE = 0x8000,
DX_AC97_BUSY_READ = 0x8000,
DX_AC97_READY = 0x0010,
DX_AC97_RECORD = 0x0008,
DX_AC97_PLAYBACK = 0x0002
};
enum sis7018_ac97_bits {
SI_AC97_BUSY_WRITE = 0x00008000,
SI_AC97_AUDIO_BUSY = 0x00004000,
SI_AC97_MODEM_BUSY = 0x00002000,
SI_AC97_BUSY_READ = 0x00008000,
SI_AC97_SECONDARY = 0x00000080,
};
enum serial_intf_ctrl_bits {
WARM_RESET = 0x00000001,
COLD_RESET = 0x00000002,
I2S_CLOCK = 0x00000004,
PCM_SEC_AC97 = 0x00000008,
AC97_DBL_RATE = 0x00000010,
SPDIF_EN = 0x00000020,
I2S_OUTPUT_EN = 0x00000040,
I2S_INPUT_EN = 0x00000080,
PCMIN = 0x00000100,
LINE1IN = 0x00000200,
MICIN = 0x00000400,
LINE2IN = 0x00000800,
HEAD_SET_IN = 0x00001000,
GPIOIN = 0x00002000,
/* 7018 spec says id = 01 but the demo board routed to 10
SECONDARY_ID= 0x00004000, */
SECONDARY_ID = 0x00004000,
PCMOUT = 0x00010000,
SURROUT = 0x00020000,
CENTEROUT = 0x00040000,
LFEOUT = 0x00080000,
LINE1OUT = 0x00100000,
LINE2OUT = 0x00200000,
GPIOOUT = 0x00400000,
SI_AC97_PRIMARY_READY = 0x01000000,
SI_AC97_SECONDARY_READY = 0x02000000,
SI_AC97_POWERDOWN = 0x04000000,
};
/* PCM defaults */
#define T4D_DEFAULT_PCM_VOL 10 /* 0 - 255 */
#define T4D_DEFAULT_PCM_PAN 0 /* 0 - 127 */
#define T4D_DEFAULT_PCM_RVOL 127 /* 0 - 127 */
#define T4D_DEFAULT_PCM_CVOL 127 /* 0 - 127 */
struct snd_trident;
struct snd_trident_voice;
struct snd_trident_pcm_mixer;
struct snd_trident_port {
struct snd_midi_channel_set * chset;
struct snd_trident * trident;
int mode; /* operation mode */
int client; /* sequencer client number */
int port; /* sequencer port number */
unsigned int midi_has_voices: 1;
};
struct snd_trident_memblk_arg {
short first_page, last_page;
};
struct snd_trident_tlb {
unsigned int * entries; /* 16k-aligned TLB table */
dma_addr_t entries_dmaaddr; /* 16k-aligned PCI address to TLB table */
unsigned long * shadow_entries; /* shadow entries with virtual addresses */
struct snd_dma_buffer buffer;
struct snd_util_memhdr * memhdr; /* page allocation list */
struct snd_dma_buffer silent_page;
};
struct snd_trident_voice {
unsigned int number;
unsigned int use: 1,
pcm: 1,
synth:1,
midi: 1;
unsigned int flags;
unsigned char client;
unsigned char port;
unsigned char index;
struct snd_trident_sample_ops *sample_ops;
/* channel parameters */
unsigned int CSO; /* 24 bits (16 on DX) */
unsigned int ESO; /* 24 bits (16 on DX) */
unsigned int LBA; /* 30 bits */
unsigned short EC; /* 12 bits */
unsigned short Alpha; /* 12 bits */
unsigned short Delta; /* 16 bits */
unsigned short Attribute; /* 16 bits - SiS 7018 */
unsigned short Vol; /* 12 bits (6.6) */
unsigned char Pan; /* 7 bits (1.4.2) */
unsigned char GVSel; /* 1 bit */
unsigned char RVol; /* 7 bits (5.2) */
unsigned char CVol; /* 7 bits (5.2) */
unsigned char FMC; /* 2 bits */
unsigned char CTRL; /* 4 bits */
unsigned char FMS; /* 4 bits */
unsigned char LFO; /* 8 bits */
unsigned int negCSO; /* nonzero - use negative CSO */
struct snd_util_memblk *memblk; /* memory block if TLB enabled */
/* PCM data */
struct snd_trident *trident;
struct snd_pcm_substream *substream;
struct snd_trident_voice *extra; /* extra PCM voice (acts as interrupt generator) */
unsigned int running: 1,
capture: 1,
spdif: 1,
foldback: 1,
isync: 1,
isync2: 1,
isync3: 1;
int foldback_chan; /* foldback subdevice number */
unsigned int stimer; /* global sample timer (to detect spurious interrupts) */
unsigned int spurious_threshold; /* spurious threshold */
unsigned int isync_mark;
unsigned int isync_max;
unsigned int isync_ESO;
/* --- */
void *private_data;
void (*private_free)(struct snd_trident_voice *voice);
};
struct snd_4dwave {
int seq_client;
struct snd_trident_port seq_ports[4];
struct snd_trident_voice voices[64];
int ChanSynthCount; /* number of allocated synth channels */
int max_size; /* maximum synth memory size in bytes */
int current_size; /* current allocated synth mem in bytes */
};
struct snd_trident_pcm_mixer {
struct snd_trident_voice *voice; /* active voice */
unsigned short vol; /* front volume */
unsigned char pan; /* pan control */
unsigned char rvol; /* rear volume */
unsigned char cvol; /* center volume */
unsigned char pad;
};
struct snd_trident {
int irq;
unsigned int device; /* device ID */
unsigned char bDMAStart;
unsigned long port;
unsigned long midi_port;
unsigned int spurious_irq_count;
unsigned int spurious_irq_max_delta;
struct snd_trident_tlb tlb; /* TLB entries for NX cards */
unsigned char spdif_ctrl;
unsigned char spdif_pcm_ctrl;
unsigned int spdif_bits;
unsigned int spdif_pcm_bits;
struct snd_kcontrol *spdif_pcm_ctl; /* S/PDIF settings */
unsigned int ac97_ctrl;
unsigned int ChanMap[2]; /* allocation map for hardware channels */
int ChanPCM; /* max number of PCM channels */
int ChanPCMcnt; /* actual number of PCM channels */
unsigned int ac97_detect: 1; /* 1 = AC97 in detection phase */
unsigned int in_suspend: 1; /* 1 during suspend/resume */
struct snd_4dwave synth; /* synth specific variables */
spinlock_t event_lock;
spinlock_t voice_alloc;
struct snd_dma_device dma_dev;
struct pci_dev *pci;
struct snd_card *card;
struct snd_pcm *pcm; /* ADC/DAC PCM */
struct snd_pcm *foldback; /* Foldback PCM */
struct snd_pcm *spdif; /* SPDIF PCM */
struct snd_rawmidi *rmidi;
struct snd_ac97_bus *ac97_bus;
struct snd_ac97 *ac97;
struct snd_ac97 *ac97_sec;
unsigned int musicvol_wavevol;
struct snd_trident_pcm_mixer pcm_mixer[32];
struct snd_kcontrol *ctl_vol; /* front volume */
struct snd_kcontrol *ctl_pan; /* pan */
struct snd_kcontrol *ctl_rvol; /* rear volume */
struct snd_kcontrol *ctl_cvol; /* center volume */
spinlock_t reg_lock;
struct gameport *gameport;
};
int snd_trident_create(struct snd_card *card,
struct pci_dev *pci,
int pcm_streams,
int pcm_spdif_device,
int max_wavetable_size,
struct snd_trident ** rtrident);
int snd_trident_create_gameport(struct snd_trident *trident);
int snd_trident_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm);
int snd_trident_foldback_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm);
int snd_trident_spdif_pcm(struct snd_trident * trident, int device, struct snd_pcm **rpcm);
int snd_trident_attach_synthesizer(struct snd_trident * trident);
struct snd_trident_voice *snd_trident_alloc_voice(struct snd_trident * trident, int type,
int client, int port);
void snd_trident_free_voice(struct snd_trident * trident, struct snd_trident_voice *voice);
void snd_trident_start_voice(struct snd_trident * trident, unsigned int voice);
void snd_trident_stop_voice(struct snd_trident * trident, unsigned int voice);
void snd_trident_write_voice_regs(struct snd_trident * trident, struct snd_trident_voice *voice);
int snd_trident_suspend(struct pci_dev *pci, pm_message_t state);
int snd_trident_resume(struct pci_dev *pci);
/* TLB memory allocation */
struct snd_util_memblk *snd_trident_alloc_pages(struct snd_trident *trident,
struct snd_pcm_substream *substream);
int snd_trident_free_pages(struct snd_trident *trident, struct snd_util_memblk *blk);
struct snd_util_memblk *snd_trident_synth_alloc(struct snd_trident *trident, unsigned int size);
int snd_trident_synth_free(struct snd_trident *trident, struct snd_util_memblk *blk);
int snd_trident_synth_copy_from_user(struct snd_trident *trident, struct snd_util_memblk *blk,
int offset, const char __user *data, int size);
#endif /* __SOUND_TRIDENT_H */
include/sound/vx_core.h
+1 -1
View File
@@ -341,7 +341,7 @@ int vx_change_frequency(struct vx_core *chip);
/*
* PM
*/
int snd_vx_suspend(struct vx_core *card, pm_message_t state);
int snd_vx_suspend(struct vx_core *card);
int snd_vx_resume(struct vx_core *card);
/*
include/sound/ymfpci.h
-390
View File
@@ -1,390 +0,0 @@
#ifndef __SOUND_YMFPCI_H
#define __SOUND_YMFPCI_H
/*
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
* Definitions for Yahama YMF724/740/744/754 chips
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include "pcm.h"
#include "rawmidi.h"
#include "ac97_codec.h"
#include "timer.h"
#include <linux/gameport.h>
/*
* Direct registers
*/
#define YMFREG(chip, reg) (chip->port + YDSXGR_##reg)
#define YDSXGR_INTFLAG 0x0004
#define YDSXGR_ACTIVITY 0x0006
#define YDSXGR_GLOBALCTRL 0x0008
#define YDSXGR_ZVCTRL 0x000A
#define YDSXGR_TIMERCTRL 0x0010
#define YDSXGR_TIMERCOUNT 0x0012
#define YDSXGR_SPDIFOUTCTRL 0x0018
#define YDSXGR_SPDIFOUTSTATUS 0x001C
#define YDSXGR_EEPROMCTRL 0x0020
#define YDSXGR_SPDIFINCTRL 0x0034
#define YDSXGR_SPDIFINSTATUS 0x0038
#define YDSXGR_DSPPROGRAMDL 0x0048
#define YDSXGR_DLCNTRL 0x004C
#define YDSXGR_GPIOININTFLAG 0x0050
#define YDSXGR_GPIOININTENABLE 0x0052
#define YDSXGR_GPIOINSTATUS 0x0054
#define YDSXGR_GPIOOUTCTRL 0x0056
#define YDSXGR_GPIOFUNCENABLE 0x0058
#define YDSXGR_GPIOTYPECONFIG 0x005A
#define YDSXGR_AC97CMDDATA 0x0060
#define YDSXGR_AC97CMDADR 0x0062
#define YDSXGR_PRISTATUSDATA 0x0064
#define YDSXGR_PRISTATUSADR 0x0066
#define YDSXGR_SECSTATUSDATA 0x0068
#define YDSXGR_SECSTATUSADR 0x006A
#define YDSXGR_SECCONFIG 0x0070
#define YDSXGR_LEGACYOUTVOL 0x0080
#define YDSXGR_LEGACYOUTVOLL 0x0080
#define YDSXGR_LEGACYOUTVOLR 0x0082
#define YDSXGR_NATIVEDACOUTVOL 0x0084
#define YDSXGR_NATIVEDACOUTVOLL 0x0084
#define YDSXGR_NATIVEDACOUTVOLR 0x0086
#define YDSXGR_ZVOUTVOL 0x0088
#define YDSXGR_ZVOUTVOLL 0x0088
#define YDSXGR_ZVOUTVOLR 0x008A
#define YDSXGR_SECADCOUTVOL 0x008C
#define YDSXGR_SECADCOUTVOLL 0x008C
#define YDSXGR_SECADCOUTVOLR 0x008E
#define YDSXGR_PRIADCOUTVOL 0x0090
#define YDSXGR_PRIADCOUTVOLL 0x0090
#define YDSXGR_PRIADCOUTVOLR 0x0092
#define YDSXGR_LEGACYLOOPVOL 0x0094
#define YDSXGR_LEGACYLOOPVOLL 0x0094
#define YDSXGR_LEGACYLOOPVOLR 0x0096
#define YDSXGR_NATIVEDACLOOPVOL 0x0098
#define YDSXGR_NATIVEDACLOOPVOLL 0x0098
#define YDSXGR_NATIVEDACLOOPVOLR 0x009A
#define YDSXGR_ZVLOOPVOL 0x009C
#define YDSXGR_ZVLOOPVOLL 0x009E
#define YDSXGR_ZVLOOPVOLR 0x009E
#define YDSXGR_SECADCLOOPVOL 0x00A0
#define YDSXGR_SECADCLOOPVOLL 0x00A0
#define YDSXGR_SECADCLOOPVOLR 0x00A2
#define YDSXGR_PRIADCLOOPVOL 0x00A4
#define YDSXGR_PRIADCLOOPVOLL 0x00A4
#define YDSXGR_PRIADCLOOPVOLR 0x00A6
#define YDSXGR_NATIVEADCINVOL 0x00A8
#define YDSXGR_NATIVEADCINVOLL 0x00A8
#define YDSXGR_NATIVEADCINVOLR 0x00AA
#define YDSXGR_NATIVEDACINVOL 0x00AC
#define YDSXGR_NATIVEDACINVOLL 0x00AC
#define YDSXGR_NATIVEDACINVOLR 0x00AE
#define YDSXGR_BUF441OUTVOL 0x00B0
#define YDSXGR_BUF441OUTVOLL 0x00B0
#define YDSXGR_BUF441OUTVOLR 0x00B2
#define YDSXGR_BUF441LOOPVOL 0x00B4
#define YDSXGR_BUF441LOOPVOLL 0x00B4
#define YDSXGR_BUF441LOOPVOLR 0x00B6
#define YDSXGR_SPDIFOUTVOL 0x00B8
#define YDSXGR_SPDIFOUTVOLL 0x00B8
#define YDSXGR_SPDIFOUTVOLR 0x00BA
#define YDSXGR_SPDIFLOOPVOL 0x00BC
#define YDSXGR_SPDIFLOOPVOLL 0x00BC
#define YDSXGR_SPDIFLOOPVOLR 0x00BE
#define YDSXGR_ADCSLOTSR 0x00C0
#define YDSXGR_RECSLOTSR 0x00C4
#define YDSXGR_ADCFORMAT 0x00C8
#define YDSXGR_RECFORMAT 0x00CC
#define YDSXGR_P44SLOTSR 0x00D0
#define YDSXGR_STATUS 0x0100
#define YDSXGR_CTRLSELECT 0x0104
#define YDSXGR_MODE 0x0108
#define YDSXGR_SAMPLECOUNT 0x010C
#define YDSXGR_NUMOFSAMPLES 0x0110
#define YDSXGR_CONFIG 0x0114
#define YDSXGR_PLAYCTRLSIZE 0x0140
#define YDSXGR_RECCTRLSIZE 0x0144
#define YDSXGR_EFFCTRLSIZE 0x0148
#define YDSXGR_WORKSIZE 0x014C
#define YDSXGR_MAPOFREC 0x0150
#define YDSXGR_MAPOFEFFECT 0x0154
#define YDSXGR_PLAYCTRLBASE 0x0158
#define YDSXGR_RECCTRLBASE 0x015C
#define YDSXGR_EFFCTRLBASE 0x0160
#define YDSXGR_WORKBASE 0x0164
#define YDSXGR_DSPINSTRAM 0x1000
#define YDSXGR_CTRLINSTRAM 0x4000
#define YDSXG_AC97READCMD 0x8000
#define YDSXG_AC97WRITECMD 0x0000
#define PCIR_DSXG_LEGACY 0x40
#define PCIR_DSXG_ELEGACY 0x42
#define PCIR_DSXG_CTRL 0x48
#define PCIR_DSXG_PWRCTRL1 0x4a
#define PCIR_DSXG_PWRCTRL2 0x4e
#define PCIR_DSXG_FMBASE 0x60
#define PCIR_DSXG_SBBASE 0x62
#define PCIR_DSXG_MPU401BASE 0x64
#define PCIR_DSXG_JOYBASE 0x66
#define YDSXG_DSPLENGTH 0x0080
#define YDSXG_CTRLLENGTH 0x3000
#define YDSXG_DEFAULT_WORK_SIZE 0x0400
#define YDSXG_PLAYBACK_VOICES 64
#define YDSXG_CAPTURE_VOICES 2
#define YDSXG_EFFECT_VOICES 5
#define YMFPCI_LEGACY_SBEN (1 << 0) /* soundblaster enable */
#define YMFPCI_LEGACY_FMEN (1 << 1) /* OPL3 enable */
#define YMFPCI_LEGACY_JPEN (1 << 2) /* joystick enable */
#define YMFPCI_LEGACY_MEN (1 << 3) /* MPU401 enable */
#define YMFPCI_LEGACY_MIEN (1 << 4) /* MPU RX irq enable */
#define YMFPCI_LEGACY_IOBITS (1 << 5) /* i/o bits range, 0 = 16bit, 1 =10bit */
#define YMFPCI_LEGACY_SDMA (3 << 6) /* SB DMA select */
#define YMFPCI_LEGACY_SBIRQ (7 << 8) /* SB IRQ select */
#define YMFPCI_LEGACY_MPUIRQ (7 << 11) /* MPU IRQ select */
#define YMFPCI_LEGACY_SIEN (1 << 14) /* serialized IRQ */
#define YMFPCI_LEGACY_LAD (1 << 15) /* legacy audio disable */
#define YMFPCI_LEGACY2_FMIO (3 << 0) /* OPL3 i/o address (724/740) */
#define YMFPCI_LEGACY2_SBIO (3 << 2) /* SB i/o address (724/740) */
#define YMFPCI_LEGACY2_MPUIO (3 << 4) /* MPU401 i/o address (724/740) */
#define YMFPCI_LEGACY2_JSIO (3 << 6) /* joystick i/o address (724/740) */
#define YMFPCI_LEGACY2_MAIM (1 << 8) /* MPU401 ack intr mask */
#define YMFPCI_LEGACY2_SMOD (3 << 11) /* SB DMA mode */
#define YMFPCI_LEGACY2_SBVER (3 << 13) /* SB version select */
#define YMFPCI_LEGACY2_IMOD (1 << 15) /* legacy IRQ mode */
/* SIEN:IMOD 0:0 = legacy irq, 0:1 = INTA, 1:0 = serialized IRQ */
#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
#define SUPPORT_JOYSTICK
#endif
/*
*
*/
struct snd_ymfpci_playback_bank {
u32 format;
u32 loop_default;
u32 base; /* 32-bit address */
u32 loop_start; /* 32-bit offset */
u32 loop_end; /* 32-bit offset */
u32 loop_frac; /* 8-bit fraction - loop_start */
u32 delta_end; /* pitch delta end */
u32 lpfK_end;
u32 eg_gain_end;
u32 left_gain_end;
u32 right_gain_end;
u32 eff1_gain_end;
u32 eff2_gain_end;
u32 eff3_gain_end;
u32 lpfQ;
u32 status;
u32 num_of_frames;
u32 loop_count;
u32 start;
u32 start_frac;
u32 delta;
u32 lpfK;
u32 eg_gain;
u32 left_gain;
u32 right_gain;
u32 eff1_gain;
u32 eff2_gain;
u32 eff3_gain;
u32 lpfD1;
u32 lpfD2;
};
struct snd_ymfpci_capture_bank {
u32 base; /* 32-bit address */
u32 loop_end; /* 32-bit offset */
u32 start; /* 32-bit offset */
u32 num_of_loops; /* counter */
};
struct snd_ymfpci_effect_bank {
u32 base; /* 32-bit address */
u32 loop_end; /* 32-bit offset */
u32 start; /* 32-bit offset */
u32 temp;
};
struct snd_ymfpci_pcm;
struct snd_ymfpci;
enum snd_ymfpci_voice_type {
YMFPCI_PCM,
YMFPCI_SYNTH,
YMFPCI_MIDI
};
struct snd_ymfpci_voice {
struct snd_ymfpci *chip;
int number;
unsigned int use: 1,
pcm: 1,
synth: 1,
midi: 1;
struct snd_ymfpci_playback_bank *bank;
dma_addr_t bank_addr;
void (*interrupt)(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice);
struct snd_ymfpci_pcm *ypcm;
};
enum snd_ymfpci_pcm_type {
PLAYBACK_VOICE,
CAPTURE_REC,
CAPTURE_AC97,
EFFECT_DRY_LEFT,
EFFECT_DRY_RIGHT,
EFFECT_EFF1,
EFFECT_EFF2,
EFFECT_EFF3
};
struct snd_ymfpci_pcm {
struct snd_ymfpci *chip;
enum snd_ymfpci_pcm_type type;
struct snd_pcm_substream *substream;
struct snd_ymfpci_voice *voices[2]; /* playback only */
unsigned int running: 1,
use_441_slot: 1,
output_front: 1,
output_rear: 1,
swap_rear: 1;
unsigned int update_pcm_vol;
u32 period_size; /* cached from runtime->period_size */
u32 buffer_size; /* cached from runtime->buffer_size */
u32 period_pos;
u32 last_pos;
u32 capture_bank_number;
u32 shift;
};
struct snd_ymfpci {
int irq;
unsigned int device_id; /* PCI device ID */
unsigned char rev; /* PCI revision */
unsigned long reg_area_phys;
void __iomem *reg_area_virt;
struct resource *res_reg_area;
struct resource *fm_res;
struct resource *mpu_res;
unsigned short old_legacy_ctrl;
#ifdef SUPPORT_JOYSTICK
struct gameport *gameport;
#endif
struct snd_dma_buffer work_ptr;
unsigned int bank_size_playback;
unsigned int bank_size_capture;
unsigned int bank_size_effect;
unsigned int work_size;
void *bank_base_playback;
void *bank_base_capture;
void *bank_base_effect;
void *work_base;
dma_addr_t bank_base_playback_addr;
dma_addr_t bank_base_capture_addr;
dma_addr_t bank_base_effect_addr;
dma_addr_t work_base_addr;
struct snd_dma_buffer ac3_tmp_base;
u32 *ctrl_playback;
struct snd_ymfpci_playback_bank *bank_playback[YDSXG_PLAYBACK_VOICES][2];
struct snd_ymfpci_capture_bank *bank_capture[YDSXG_CAPTURE_VOICES][2];
struct snd_ymfpci_effect_bank *bank_effect[YDSXG_EFFECT_VOICES][2];
int start_count;
u32 active_bank;
struct snd_ymfpci_voice voices[64];
int src441_used;
struct snd_ac97_bus *ac97_bus;
struct snd_ac97 *ac97;
struct snd_rawmidi *rawmidi;
struct snd_timer *timer;
unsigned int timer_ticks;
struct pci_dev *pci;
struct snd_card *card;
struct snd_pcm *pcm;
struct snd_pcm *pcm2;
struct snd_pcm *pcm_spdif;
struct snd_pcm *pcm_4ch;
struct snd_pcm_substream *capture_substream[YDSXG_CAPTURE_VOICES];
struct snd_pcm_substream *effect_substream[YDSXG_EFFECT_VOICES];
struct snd_kcontrol *ctl_vol_recsrc;
struct snd_kcontrol *ctl_vol_adcrec;
struct snd_kcontrol *ctl_vol_spdifrec;
unsigned short spdif_bits, spdif_pcm_bits;
struct snd_kcontrol *spdif_pcm_ctl;
int mode_dup4ch;
int rear_opened;
int spdif_opened;
struct snd_ymfpci_pcm_mixer {
u16 left;
u16 right;
struct snd_kcontrol *ctl;
} pcm_mixer[32];
spinlock_t reg_lock;
spinlock_t voice_lock;
wait_queue_head_t interrupt_sleep;
atomic_t interrupt_sleep_count;
struct snd_info_entry *proc_entry;
const struct firmware *dsp_microcode;
const struct firmware *controller_microcode;
#ifdef CONFIG_PM
u32 *saved_regs;
u32 saved_ydsxgr_mode;
u16 saved_dsxg_legacy;
u16 saved_dsxg_elegacy;
#endif
};
int snd_ymfpci_create(struct snd_card *card,
struct pci_dev *pci,
unsigned short old_legacy_ctrl,
struct snd_ymfpci ** rcodec);
void snd_ymfpci_free_gameport(struct snd_ymfpci *chip);
int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state);
int snd_ymfpci_resume(struct pci_dev *pci);
int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm **rpcm);
int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch);
int snd_ymfpci_timer(struct snd_ymfpci *chip, int device);
#endif /* __SOUND_YMFPCI_H */