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RDMA/mlx5: Add support in MEMIC operations

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MEMIC buffer, in addition to regular read and write operations, can
support atomic operations from the host.

Introduce and implement new UAPI to allocate address space for MEMIC
operations such as atomic. This includes:

1. Expose new IOCTL for request mapping of MEMIC operation.
2. Hold the operations address in a list, so same operation to same DM
   will be allocated only once.
3. Manage refcount on the mlx5_ib_dm object, so it would be keep valid
   until all addresses were unmapped.

Link: https://lore.kernel.org/r/20210411122924.60230-7-leon@kernel.org
Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Maor Gottlieb
2021-04-13 19:36:36 -03:00
committed by Jason Gunthorpe
parent 39cc792ff2
commit cea85fa5db
5 changed files with 209 additions and 14 deletions
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include/uapi/rdma/mlx5_user_ioctl_cmds.h
+11
View File
@@ -41,6 +41,17 @@ enum mlx5_ib_create_flow_action_attrs {
MLX5_IB_ATTR_CREATE_FLOW_ACTION_FLAGS = (1U << UVERBS_ID_NS_SHIFT),
};
enum mlx5_ib_dm_methods {
MLX5_IB_METHOD_DM_MAP_OP_ADDR = (1U << UVERBS_ID_NS_SHIFT),
};
enum mlx5_ib_dm_map_op_addr_attrs {
MLX5_IB_ATTR_DM_MAP_OP_ADDR_REQ_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
MLX5_IB_ATTR_DM_MAP_OP_ADDR_REQ_OP,
MLX5_IB_ATTR_DM_MAP_OP_ADDR_RESP_START_OFFSET,
MLX5_IB_ATTR_DM_MAP_OP_ADDR_RESP_PAGE_INDEX,
};
enum mlx5_ib_alloc_dm_attrs {
MLX5_IB_ATTR_ALLOC_DM_RESP_START_OFFSET = (1U << UVERBS_ID_NS_SHIFT),
MLX5_IB_ATTR_ALLOC_DM_RESP_PAGE_INDEX,