Merge tag 'ib-mfd-gpio-input-pwm-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into next

Merge an immutable branch between MFD, GPIO, Input and PWM to resolve
conflicts for the merge window pull request.
This commit is contained in:
Dmitry Torokhov
2025-08-03 23:28:48 -07:00
13062 changed files with 590483 additions and 258483 deletions
+2
View File
@@ -145,6 +145,8 @@
#define SO_RCVPRIORITY 82
#define SO_PASSRIGHTS 83
#if !defined(__KERNEL__)
#if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))
+317
View File
@@ -54,6 +54,9 @@ extern "C" {
#define DRM_AMDGPU_VM 0x13
#define DRM_AMDGPU_FENCE_TO_HANDLE 0x14
#define DRM_AMDGPU_SCHED 0x15
#define DRM_AMDGPU_USERQ 0x16
#define DRM_AMDGPU_USERQ_SIGNAL 0x17
#define DRM_AMDGPU_USERQ_WAIT 0x18
#define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -71,6 +74,9 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_VM DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_VM, union drm_amdgpu_vm)
#define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
#define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
#define DRM_IOCTL_AMDGPU_USERQ DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ, union drm_amdgpu_userq)
#define DRM_IOCTL_AMDGPU_USERQ_SIGNAL DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_SIGNAL, struct drm_amdgpu_userq_signal)
#define DRM_IOCTL_AMDGPU_USERQ_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_WAIT, struct drm_amdgpu_userq_wait)
/**
* DOC: memory domains
@@ -319,6 +325,260 @@ union drm_amdgpu_ctx {
union drm_amdgpu_ctx_out out;
};
/* user queue IOCTL operations */
#define AMDGPU_USERQ_OP_CREATE 1
#define AMDGPU_USERQ_OP_FREE 2
/* queue priority levels */
/* low < normal low < normal high < high */
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK 0x3
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT 0
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW 0
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW 1
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH 2
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH 3 /* admin only */
/* for queues that need access to protected content */
#define AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE (1 << 2)
/*
* This structure is a container to pass input configuration
* info for all supported userqueue related operations.
* For operation AMDGPU_USERQ_OP_CREATE: user is expected
* to set all fields, excep the parameter 'queue_id'.
* For operation AMDGPU_USERQ_OP_FREE: the only input parameter expected
* to be set is 'queue_id', eveything else is ignored.
*/
struct drm_amdgpu_userq_in {
/** AMDGPU_USERQ_OP_* */
__u32 op;
/** Queue id passed for operation USERQ_OP_FREE */
__u32 queue_id;
/** the target GPU engine to execute workload (AMDGPU_HW_IP_*) */
__u32 ip_type;
/**
* @doorbell_handle: the handle of doorbell GEM object
* associated with this userqueue client.
*/
__u32 doorbell_handle;
/**
* @doorbell_offset: 32-bit offset of the doorbell in the doorbell bo.
* Kernel will generate absolute doorbell offset using doorbell_handle
* and doorbell_offset in the doorbell bo.
*/
__u32 doorbell_offset;
/**
* @flags: flags used for queue parameters
*/
__u32 flags;
/**
* @queue_va: Virtual address of the GPU memory which holds the queue
* object. The queue holds the workload packets.
*/
__u64 queue_va;
/**
* @queue_size: Size of the queue in bytes, this needs to be 256-byte
* aligned.
*/
__u64 queue_size;
/**
* @rptr_va : Virtual address of the GPU memory which holds the ring RPTR.
* This object must be at least 8 byte in size and aligned to 8-byte offset.
*/
__u64 rptr_va;
/**
* @wptr_va : Virtual address of the GPU memory which holds the ring WPTR.
* This object must be at least 8 byte in size and aligned to 8-byte offset.
*
* Queue, RPTR and WPTR can come from the same object, as long as the size
* and alignment related requirements are met.
*/
__u64 wptr_va;
/**
* @mqd: MQD (memory queue descriptor) is a set of parameters which allow
* the GPU to uniquely define and identify a usermode queue.
*
* MQD data can be of different size for different GPU IP/engine and
* their respective versions/revisions, so this points to a __u64 *
* which holds IP specific MQD of this usermode queue.
*/
__u64 mqd;
/**
* @size: size of MQD data in bytes, it must match the MQD structure
* size of the respective engine/revision defined in UAPI for ex, for
* gfx11 workloads, size = sizeof(drm_amdgpu_userq_mqd_gfx11).
*/
__u64 mqd_size;
};
/* The structure to carry output of userqueue ops */
struct drm_amdgpu_userq_out {
/**
* For operation AMDGPU_USERQ_OP_CREATE: This field contains a unique
* queue ID to represent the newly created userqueue in the system, otherwise
* it should be ignored.
*/
__u32 queue_id;
__u32 _pad;
};
union drm_amdgpu_userq {
struct drm_amdgpu_userq_in in;
struct drm_amdgpu_userq_out out;
};
/* GFX V11 IP specific MQD parameters */
struct drm_amdgpu_userq_mqd_gfx11 {
/**
* @shadow_va: Virtual address of the GPU memory to hold the shadow buffer.
* Use AMDGPU_INFO_IOCTL to find the exact size of the object.
*/
__u64 shadow_va;
/**
* @csa_va: Virtual address of the GPU memory to hold the CSA buffer.
* Use AMDGPU_INFO_IOCTL to find the exact size of the object.
*/
__u64 csa_va;
};
/* GFX V11 SDMA IP specific MQD parameters */
struct drm_amdgpu_userq_mqd_sdma_gfx11 {
/**
* @csa_va: Virtual address of the GPU memory to hold the CSA buffer.
* This must be a from a separate GPU object, and use AMDGPU_INFO IOCTL
* to get the size.
*/
__u64 csa_va;
};
/* GFX V11 Compute IP specific MQD parameters */
struct drm_amdgpu_userq_mqd_compute_gfx11 {
/**
* @eop_va: Virtual address of the GPU memory to hold the EOP buffer.
* This must be a from a separate GPU object, and use AMDGPU_INFO IOCTL
* to get the size.
*/
__u64 eop_va;
};
/* userq signal/wait ioctl */
struct drm_amdgpu_userq_signal {
/**
* @queue_id: Queue handle used by the userq fence creation function
* to retrieve the WPTR.
*/
__u32 queue_id;
__u32 pad;
/**
* @syncobj_handles: The list of syncobj handles submitted by the user queue
* job to be signaled.
*/
__u64 syncobj_handles;
/**
* @num_syncobj_handles: A count that represents the number of syncobj handles in
* @syncobj_handles.
*/
__u64 num_syncobj_handles;
/**
* @bo_read_handles: The list of BO handles that the submitted user queue job
* is using for read only. This will update BO fences in the kernel.
*/
__u64 bo_read_handles;
/**
* @bo_write_handles: The list of BO handles that the submitted user queue job
* is using for write only. This will update BO fences in the kernel.
*/
__u64 bo_write_handles;
/**
* @num_bo_read_handles: A count that represents the number of read BO handles in
* @bo_read_handles.
*/
__u32 num_bo_read_handles;
/**
* @num_bo_write_handles: A count that represents the number of write BO handles in
* @bo_write_handles.
*/
__u32 num_bo_write_handles;
};
struct drm_amdgpu_userq_fence_info {
/**
* @va: A gpu address allocated for each queue which stores the
* read pointer (RPTR) value.
*/
__u64 va;
/**
* @value: A 64 bit value represents the write pointer (WPTR) of the
* queue commands which compared with the RPTR value to signal the
* fences.
*/
__u64 value;
};
struct drm_amdgpu_userq_wait {
/**
* @waitq_id: Queue handle used by the userq wait IOCTL to retrieve the
* wait queue and maintain the fence driver references in it.
*/
__u32 waitq_id;
__u32 pad;
/**
* @syncobj_handles: The list of syncobj handles submitted by the user queue
* job to get the va/value pairs.
*/
__u64 syncobj_handles;
/**
* @syncobj_timeline_handles: The list of timeline syncobj handles submitted by
* the user queue job to get the va/value pairs at given @syncobj_timeline_points.
*/
__u64 syncobj_timeline_handles;
/**
* @syncobj_timeline_points: The list of timeline syncobj points submitted by the
* user queue job for the corresponding @syncobj_timeline_handles.
*/
__u64 syncobj_timeline_points;
/**
* @bo_read_handles: The list of read BO handles submitted by the user queue
* job to get the va/value pairs.
*/
__u64 bo_read_handles;
/**
* @bo_write_handles: The list of write BO handles submitted by the user queue
* job to get the va/value pairs.
*/
__u64 bo_write_handles;
/**
* @num_syncobj_timeline_handles: A count that represents the number of timeline
* syncobj handles in @syncobj_timeline_handles.
*/
__u16 num_syncobj_timeline_handles;
/**
* @num_fences: This field can be used both as input and output. As input it defines
* the maximum number of fences that can be returned and as output it will specify
* how many fences were actually returned from the ioctl.
*/
__u16 num_fences;
/**
* @num_syncobj_handles: A count that represents the number of syncobj handles in
* @syncobj_handles.
*/
__u32 num_syncobj_handles;
/**
* @num_bo_read_handles: A count that represents the number of read BO handles in
* @bo_read_handles.
*/
__u32 num_bo_read_handles;
/**
* @num_bo_write_handles: A count that represents the number of write BO handles in
* @bo_write_handles.
*/
__u32 num_bo_write_handles;
/**
* @out_fences: The field is a return value from the ioctl containing the list of
* address/value pairs to wait for.
*/
__u64 out_fences;
};
/* vm ioctl */
#define AMDGPU_VM_OP_RESERVE_VMID 1
#define AMDGPU_VM_OP_UNRESERVE_VMID 2
@@ -599,6 +859,19 @@ struct drm_amdgpu_gem_va {
__u64 offset_in_bo;
/** Specify mapping size. Must be correctly aligned. */
__u64 map_size;
/**
* vm_timeline_point is a sequence number used to add new timeline point.
*/
__u64 vm_timeline_point;
/**
* The vm page table update fence is installed in given vm_timeline_syncobj_out
* at vm_timeline_point.
*/
__u32 vm_timeline_syncobj_out;
/** the number of syncobj handles in @input_fence_syncobj_handles */
__u32 num_syncobj_handles;
/** Array of sync object handle to wait for given input fences */
__u64 input_fence_syncobj_handles;
};
#define AMDGPU_HW_IP_GFX 0
@@ -940,6 +1213,8 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
#define AMDGPU_INFO_MAX_IBS 0x22
/* query last page fault info */
#define AMDGPU_INFO_GPUVM_FAULT 0x23
/* query FW object size and alignment */
#define AMDGPU_INFO_UQ_FW_AREAS 0x24
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
@@ -1093,6 +1368,7 @@ struct drm_amdgpu_info_vbios {
#define AMDGPU_VRAM_TYPE_DDR5 10
#define AMDGPU_VRAM_TYPE_LPDDR4 11
#define AMDGPU_VRAM_TYPE_LPDDR5 12
#define AMDGPU_VRAM_TYPE_HBM3E 13
struct drm_amdgpu_info_device {
/** PCI Device ID */
@@ -1198,6 +1474,9 @@ struct drm_amdgpu_info_device {
__u32 csa_size;
/* context save area base virtual alignment for gfx11 */
__u32 csa_alignment;
/* Userq IP mask (1 << AMDGPU_HW_IP_*) */
__u32 userq_ip_mask;
__u32 pad;
};
struct drm_amdgpu_info_hw_ip {
@@ -1216,6 +1495,27 @@ struct drm_amdgpu_info_hw_ip {
__u32 ip_discovery_version;
};
/* GFX metadata BO sizes and alignment info (in bytes) */
struct drm_amdgpu_info_uq_fw_areas_gfx {
/* shadow area size */
__u32 shadow_size;
/* shadow area base virtual mem alignment */
__u32 shadow_alignment;
/* context save area size */
__u32 csa_size;
/* context save area base virtual mem alignment */
__u32 csa_alignment;
};
/* IP specific fw related information used in the
* subquery AMDGPU_INFO_UQ_FW_AREAS
*/
struct drm_amdgpu_info_uq_fw_areas {
union {
struct drm_amdgpu_info_uq_fw_areas_gfx gfx;
};
};
struct drm_amdgpu_info_num_handles {
/** Max handles as supported by firmware for UVD */
__u32 uvd_max_handles;
@@ -1279,6 +1579,23 @@ struct drm_amdgpu_info_gpuvm_fault {
__u32 vmhub;
};
struct drm_amdgpu_info_uq_metadata_gfx {
/* shadow area size for gfx11 */
__u32 shadow_size;
/* shadow area base virtual alignment for gfx11 */
__u32 shadow_alignment;
/* context save area size for gfx11 */
__u32 csa_size;
/* context save area base virtual alignment for gfx11 */
__u32 csa_alignment;
};
struct drm_amdgpu_info_uq_metadata {
union {
struct drm_amdgpu_info_uq_metadata_gfx gfx;
};
};
/*
* Supported GPU families
*/
File diff suppressed because it is too large Load Diff
+4
View File
@@ -905,13 +905,17 @@ struct drm_syncobj_destroy {
};
#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_TIMELINE (1 << 1)
#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_TIMELINE (1 << 1)
struct drm_syncobj_handle {
__u32 handle;
__u32 flags;
__s32 fd;
__u32 pad;
__u64 point;
};
struct drm_syncobj_transfer {
+45
View File
@@ -422,6 +422,7 @@ extern "C" {
#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09
#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a
#define DRM_FORMAT_MOD_VENDOR_MTK 0x0b
#define DRM_FORMAT_MOD_VENDOR_APPLE 0x0c
/* add more to the end as needed */
@@ -1494,6 +1495,50 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
/* alias for the most common tiling format */
#define DRM_FORMAT_MOD_MTK_16L_32S_TILE DRM_FORMAT_MOD_MTK(MTK_FMT_MOD_TILE_16L32S)
/*
* Apple GPU-tiled layouts.
*
* Apple GPUs support nonlinear tilings with optional lossless compression.
*
* GPU-tiled images are divided into 16KiB tiles:
*
* Bytes per pixel Tile size
* --------------- ---------
* 1 128x128
* 2 128x64
* 4 64x64
* 8 64x32
* 16 32x32
*
* Tiles are raster-order. Pixels within a tile are interleaved (Morton order).
*
* Compressed images pad the body to 128-bytes and are immediately followed by a
* metadata section. The metadata section rounds the image dimensions to
* powers-of-two and contains 8 bytes for each 16x16 compression subtile.
* Subtiles are interleaved (Morton order).
*
* All images are 128-byte aligned.
*
* These layouts fundamentally do not have meaningful strides. No matter how we
* specify strides for these layouts, userspace unaware of Apple image layouts
* will be unable to use correctly the specified stride for any purpose.
* Userspace aware of the image layouts do not use strides. The most "correct"
* convention would be setting the image stride to 0. Unfortunately, some
* software assumes the stride is at least (width * bytes per pixel). We
* therefore require that stride equals (width * bytes per pixel). Since the
* stride is arbitrary here, we pick the simplest convention.
*
* Although containing two sections, compressed image layouts are treated in
* software as a single plane. This is modelled after AFBC, a similar
* scheme. Attempting to separate the sections to be "explicit" in DRM would
* only generate more confusion, as software does not treat the image this way.
*
* For detailed information on the hardware image layouts, see
* https://docs.mesa3d.org/drivers/asahi.html#image-layouts
*/
#define DRM_FORMAT_MOD_APPLE_GPU_TILED fourcc_mod_code(APPLE, 1)
#define DRM_FORMAT_MOD_APPLE_GPU_TILED_COMPRESSED fourcc_mod_code(APPLE, 2)
/*
* AMD modifiers
*
+101
View File
@@ -0,0 +1,101 @@
/* SPDX-License-Identifier: MIT */
#ifndef __NOVA_DRM_H__
#define __NOVA_DRM_H__
#include "drm.h"
/* DISCLAIMER: Do not use, this is not a stable uAPI.
*
* This uAPI serves only testing purposes as long as this driver is still in
* development. It is required to implement and test infrastructure which is
* upstreamed in the context of this driver. See also [1].
*
* [1] https://lore.kernel.org/dri-devel/Zfsj0_tb-0-tNrJy@cassiopeiae/T/#u
*/
#if defined(__cplusplus)
extern "C" {
#endif
/*
* NOVA_GETPARAM_VRAM_BAR_SIZE
*
* Query the VRAM BAR size in bytes.
*/
#define NOVA_GETPARAM_VRAM_BAR_SIZE 0x1
/**
* struct drm_nova_getparam - query GPU and driver metadata
*/
struct drm_nova_getparam {
/**
* @param: The identifier of the parameter to query.
*/
__u64 param;
/**
* @value: The value for the specified parameter.
*/
__u64 value;
};
/**
* struct drm_nova_gem_create - create a new DRM GEM object
*/
struct drm_nova_gem_create {
/**
* @handle: The handle of the new DRM GEM object.
*/
__u32 handle;
/**
* @pad: 32 bit padding, should be 0.
*/
__u32 pad;
/**
* @size: The size of the new DRM GEM object.
*/
__u64 size;
};
/**
* struct drm_nova_gem_info - query DRM GEM object metadata
*/
struct drm_nova_gem_info {
/**
* @handle: The handle of the DRM GEM object to query.
*/
__u32 handle;
/**
* @pad: 32 bit padding, should be 0.
*/
__u32 pad;
/**
* @size: The size of the DRM GEM obejct.
*/
__u64 size;
};
#define DRM_NOVA_GETPARAM 0x00
#define DRM_NOVA_GEM_CREATE 0x01
#define DRM_NOVA_GEM_INFO 0x02
/* Note: this is an enum so that it can be resolved by Rust bindgen. */
enum {
DRM_IOCTL_NOVA_GETPARAM = DRM_IOWR(DRM_COMMAND_BASE + DRM_NOVA_GETPARAM,
struct drm_nova_getparam),
DRM_IOCTL_NOVA_GEM_CREATE = DRM_IOWR(DRM_COMMAND_BASE + DRM_NOVA_GEM_CREATE,
struct drm_nova_gem_create),
DRM_IOCTL_NOVA_GEM_INFO = DRM_IOWR(DRM_COMMAND_BASE + DRM_NOVA_GEM_INFO,
struct drm_nova_gem_info),
};
#if defined(__cplusplus)
}
#endif
#endif /* __NOVA_DRM_H__ */
+23
View File
@@ -127,6 +127,9 @@ enum drm_panthor_ioctl_id {
/** @DRM_PANTHOR_TILER_HEAP_DESTROY: Destroy a tiler heap. */
DRM_PANTHOR_TILER_HEAP_DESTROY,
/** @DRM_PANTHOR_BO_SET_LABEL: Label a BO. */
DRM_PANTHOR_BO_SET_LABEL,
};
/**
@@ -977,6 +980,24 @@ struct drm_panthor_tiler_heap_destroy {
__u32 pad;
};
/**
* struct drm_panthor_bo_set_label - Arguments passed to DRM_IOCTL_PANTHOR_BO_SET_LABEL
*/
struct drm_panthor_bo_set_label {
/** @handle: Handle of the buffer object to label. */
__u32 handle;
/** @pad: MBZ. */
__u32 pad;
/**
* @label: User pointer to a NUL-terminated string
*
* Length cannot be greater than 4096
*/
__u64 label;
};
/**
* DRM_IOCTL_PANTHOR() - Build a Panthor IOCTL number
* @__access: Access type. Must be R, W or RW.
@@ -1019,6 +1040,8 @@ enum {
DRM_IOCTL_PANTHOR(WR, TILER_HEAP_CREATE, tiler_heap_create),
DRM_IOCTL_PANTHOR_TILER_HEAP_DESTROY =
DRM_IOCTL_PANTHOR(WR, TILER_HEAP_DESTROY, tiler_heap_destroy),
DRM_IOCTL_PANTHOR_BO_SET_LABEL =
DRM_IOCTL_PANTHOR(WR, BO_SET_LABEL, bo_set_label),
};
#if defined(__cplusplus)
+6
View File
@@ -163,6 +163,12 @@ struct drm_virtgpu_3d_wait {
__u32 flags;
};
#define VIRTGPU_DRM_CAPSET_VIRGL 1
#define VIRTGPU_DRM_CAPSET_VIRGL2 2
#define VIRTGPU_DRM_CAPSET_GFXSTREAM_VULKAN 3
#define VIRTGPU_DRM_CAPSET_VENUS 4
#define VIRTGPU_DRM_CAPSET_CROSS_DOMAIN 5
#define VIRTGPU_DRM_CAPSET_DRM 6
struct drm_virtgpu_get_caps {
__u32 cap_set_id;
__u32 cap_set_ver;
+10 -1
View File
@@ -917,7 +917,11 @@ struct drm_xe_gem_mmap_offset {
* struct drm_xe_vm_create - Input of &DRM_IOCTL_XE_VM_CREATE
*
* The @flags can be:
* - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE
* - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE - Map the whole virtual address
* space of the VM to scratch page. A vm_bind would overwrite the scratch
* page mapping. This flag is mutually exclusive with the
* %DRM_XE_VM_CREATE_FLAG_FAULT_MODE flag, with an exception of on x2 and
* xe3 platform.
* - %DRM_XE_VM_CREATE_FLAG_LR_MODE - An LR, or Long Running VM accepts
* exec submissions to its exec_queues that don't have an upper time
* limit on the job execution time. But exec submissions to these
@@ -1206,6 +1210,11 @@ struct drm_xe_vm_bind {
* there is no need to explicitly set that. When a queue of type
* %DRM_XE_PXP_TYPE_HWDRM is created, the PXP default HWDRM session
* (%XE_PXP_HWDRM_DEFAULT_SESSION) will be started, if isn't already running.
* The user is expected to query the PXP status via the query ioctl (see
* %DRM_XE_DEVICE_QUERY_PXP_STATUS) and to wait for PXP to be ready before
* attempting to create a queue with this property. When a queue is created
* before PXP is ready, the ioctl will return -EBUSY if init is still in
* progress or -EIO if init failed.
* Given that going into a power-saving state kills PXP HWDRM sessions,
* runtime PM will be blocked while queues of this type are alive.
* All PXP queues will be killed if a PXP invalidation event occurs.
+1 -1
View File
@@ -49,7 +49,7 @@ enum blktrace_act {
__BLK_TA_UNPLUG_TIMER, /* queue was unplugged by timer */
__BLK_TA_INSERT, /* insert request */
__BLK_TA_SPLIT, /* bio was split */
__BLK_TA_BOUNCE, /* bio was bounced */
__BLK_TA_BOUNCE, /* unused, was: bio was bounced */
__BLK_TA_REMAP, /* bio was remapped */
__BLK_TA_ABORT, /* request aborted */
__BLK_TA_DRV_DATA, /* driver-specific binary data */
+14 -7
View File
@@ -1506,7 +1506,7 @@ union bpf_attr {
__s32 map_token_fd;
};
struct { /* anonymous struct used by BPF_MAP_*_ELEM commands */
struct { /* anonymous struct used by BPF_MAP_*_ELEM and BPF_MAP_FREEZE commands */
__u32 map_fd;
__aligned_u64 key;
union {
@@ -1995,11 +1995,15 @@ union bpf_attr {
* long bpf_skb_store_bytes(struct sk_buff *skb, u32 offset, const void *from, u32 len, u64 flags)
* Description
* Store *len* bytes from address *from* into the packet
* associated to *skb*, at *offset*. *flags* are a combination of
* **BPF_F_RECOMPUTE_CSUM** (automatically recompute the
* checksum for the packet after storing the bytes) and
* **BPF_F_INVALIDATE_HASH** (set *skb*\ **->hash**, *skb*\
* **->swhash** and *skb*\ **->l4hash** to 0).
* associated to *skb*, at *offset*. The *flags* are a combination
* of the following values:
*
* **BPF_F_RECOMPUTE_CSUM**
* Automatically update *skb*\ **->csum** after storing the
* bytes.
* **BPF_F_INVALIDATE_HASH**
* Set *skb*\ **->hash**, *skb*\ **->swhash** and *skb*\
* **->l4hash** to 0.
*
* A call to this helper is susceptible to change the underlying
* packet buffer. Therefore, at load time, all checks on pointers
@@ -2051,7 +2055,8 @@ union bpf_attr {
* untouched (unless **BPF_F_MARK_ENFORCE** is added as well), and
* for updates resulting in a null checksum the value is set to
* **CSUM_MANGLED_0** instead. Flag **BPF_F_PSEUDO_HDR** indicates
* the checksum is to be computed against a pseudo-header.
* that the modified header field is part of the pseudo-header.
* Flag **BPF_F_IPV6** should be set for IPv6 packets.
*
* This helper works in combination with **bpf_csum_diff**\ (),
* which does not update the checksum in-place, but offers more
@@ -6068,6 +6073,7 @@ enum {
BPF_F_PSEUDO_HDR = (1ULL << 4),
BPF_F_MARK_MANGLED_0 = (1ULL << 5),
BPF_F_MARK_ENFORCE = (1ULL << 6),
BPF_F_IPV6 = (1ULL << 7),
};
/* BPF_FUNC_skb_set_tunnel_key and BPF_FUNC_skb_get_tunnel_key flags. */
@@ -6723,6 +6729,7 @@ struct bpf_link_info {
__u32 name_len;
__u32 offset; /* offset from file_name */
__u64 cookie;
__u64 ref_ctr_offset;
} uprobe; /* BPF_PERF_EVENT_UPROBE, BPF_PERF_EVENT_URETPROBE */
struct {
__aligned_u64 func_name; /* in/out */
+20 -20
View File
@@ -14,7 +14,7 @@
static inline void cec_msg_active_source(struct cec_msg *msg, __u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_ACTIVE_SOURCE;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@@ -59,7 +59,7 @@ static inline void cec_msg_request_active_source(struct cec_msg *msg,
int reply)
{
msg->len = 2;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REQUEST_ACTIVE_SOURCE;
msg->reply = reply ? CEC_MSG_ACTIVE_SOURCE : 0;
}
@@ -68,7 +68,7 @@ static inline void cec_msg_routing_information(struct cec_msg *msg,
__u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_ROUTING_INFORMATION;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@@ -86,7 +86,7 @@ static inline void cec_msg_routing_change(struct cec_msg *msg,
__u16 new_phys_addr)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_ROUTING_CHANGE;
msg->msg[2] = orig_phys_addr >> 8;
msg->msg[3] = orig_phys_addr & 0xff;
@@ -106,7 +106,7 @@ static inline void cec_ops_routing_change(const struct cec_msg *msg,
static inline void cec_msg_set_stream_path(struct cec_msg *msg, __u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_SET_STREAM_PATH;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@@ -791,7 +791,7 @@ static inline void cec_msg_report_physical_addr(struct cec_msg *msg,
__u16 phys_addr, __u8 prim_devtype)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REPORT_PHYSICAL_ADDR;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@@ -817,7 +817,7 @@ static inline void cec_msg_set_menu_language(struct cec_msg *msg,
const char *language)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_SET_MENU_LANGUAGE;
memcpy(msg->msg + 2, language, 3);
}
@@ -850,7 +850,7 @@ static inline void cec_msg_report_features(struct cec_msg *msg,
__u8 rc_profile, __u8 dev_features)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REPORT_FEATURES;
msg->msg[2] = cec_version;
msg->msg[3] = all_device_types;
@@ -1092,7 +1092,7 @@ static inline void cec_msg_tuner_step_increment(struct cec_msg *msg)
static inline void cec_msg_device_vendor_id(struct cec_msg *msg, __u32 vendor_id)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_DEVICE_VENDOR_ID;
msg->msg[2] = vendor_id >> 16;
msg->msg[3] = (vendor_id >> 8) & 0xff;
@@ -1655,7 +1655,7 @@ static inline void cec_msg_report_current_latency(struct cec_msg *msg,
__u8 audio_out_delay)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REPORT_CURRENT_LATENCY;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@@ -1687,7 +1687,7 @@ static inline void cec_msg_request_current_latency(struct cec_msg *msg,
__u16 phys_addr)
{
msg->len = 4;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_REQUEST_CURRENT_LATENCY;
msg->msg[2] = phys_addr >> 8;
msg->msg[3] = phys_addr & 0xff;
@@ -1707,7 +1707,7 @@ static inline void cec_msg_cdc_hec_inquire_state(struct cec_msg *msg,
__u16 phys_addr2)
{
msg->len = 9;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_INQUIRE_STATE;
@@ -1737,7 +1737,7 @@ static inline void cec_msg_cdc_hec_report_state(struct cec_msg *msg,
__u16 hec_field)
{
msg->len = has_field ? 10 : 8;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_REPORT_STATE;
@@ -1782,7 +1782,7 @@ static inline void cec_msg_cdc_hec_set_state(struct cec_msg *msg,
__u16 phys_addr5)
{
msg->len = 10;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_INQUIRE_STATE;
@@ -1832,7 +1832,7 @@ static inline void cec_msg_cdc_hec_set_state_adjacent(struct cec_msg *msg,
__u8 hec_set_state)
{
msg->len = 8;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_SET_STATE_ADJACENT;
@@ -1857,7 +1857,7 @@ static inline void cec_msg_cdc_hec_request_deactivation(struct cec_msg *msg,
__u16 phys_addr3)
{
msg->len = 11;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_REQUEST_DEACTIVATION;
@@ -1884,7 +1884,7 @@ static inline void cec_ops_cdc_hec_request_deactivation(const struct cec_msg *ms
static inline void cec_msg_cdc_hec_notify_alive(struct cec_msg *msg)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_NOTIFY_ALIVE;
@@ -1899,7 +1899,7 @@ static inline void cec_ops_cdc_hec_notify_alive(const struct cec_msg *msg,
static inline void cec_msg_cdc_hec_discover(struct cec_msg *msg)
{
msg->len = 5;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HEC_DISCOVER;
@@ -1916,7 +1916,7 @@ static inline void cec_msg_cdc_hpd_set_state(struct cec_msg *msg,
__u8 hpd_state)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HPD_SET_STATE;
@@ -1938,7 +1938,7 @@ static inline void cec_msg_cdc_hpd_report_state(struct cec_msg *msg,
__u8 hpd_error)
{
msg->len = 6;
msg->msg[0] |= 0xf; /* broadcast */
msg->msg[0] |= CEC_LOG_ADDR_BROADCAST;
msg->msg[1] = CEC_MSG_CDC_MESSAGE;
/* msg[2] and msg[3] (phys_addr) are filled in by the CEC framework */
msg->msg[4] = CEC_MSG_CDC_HPD_REPORT_STATE;
+15
View File
@@ -385,6 +385,21 @@ enum devlink_linecard_state {
DEVLINK_LINECARD_STATE_MAX = __DEVLINK_LINECARD_STATE_MAX - 1
};
/* Variable attribute type. */
enum devlink_var_attr_type {
/* Following values relate to the internal NLA_* values */
DEVLINK_VAR_ATTR_TYPE_U8 = 1,
DEVLINK_VAR_ATTR_TYPE_U16,
DEVLINK_VAR_ATTR_TYPE_U32,
DEVLINK_VAR_ATTR_TYPE_U64,
DEVLINK_VAR_ATTR_TYPE_STRING,
DEVLINK_VAR_ATTR_TYPE_FLAG,
DEVLINK_VAR_ATTR_TYPE_NUL_STRING = 10,
DEVLINK_VAR_ATTR_TYPE_BINARY,
__DEVLINK_VAR_ATTR_TYPE_CUSTOM_BASE = 0x80,
/* Any possible custom types, unrelated to NLA_* values go below */
};
enum devlink_attr {
/* don't change the order or add anything between, this is ABI! */
DEVLINK_ATTR_UNSPEC,
+7 -2
View File
@@ -258,10 +258,12 @@ enum {
DM_DEV_SET_GEOMETRY_CMD,
DM_DEV_ARM_POLL_CMD,
DM_GET_TARGET_VERSION_CMD,
DM_MPATH_PROBE_PATHS_CMD,
};
#define DM_IOCTL 0xfd
/* Control device ioctls */
#define DM_VERSION _IOWR(DM_IOCTL, DM_VERSION_CMD, struct dm_ioctl)
#define DM_REMOVE_ALL _IOWR(DM_IOCTL, DM_REMOVE_ALL_CMD, struct dm_ioctl)
#define DM_LIST_DEVICES _IOWR(DM_IOCTL, DM_LIST_DEVICES_CMD, struct dm_ioctl)
@@ -285,10 +287,13 @@ enum {
#define DM_TARGET_MSG _IOWR(DM_IOCTL, DM_TARGET_MSG_CMD, struct dm_ioctl)
#define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
/* Block device ioctls */
#define DM_MPATH_PROBE_PATHS _IO(DM_IOCTL, DM_MPATH_PROBE_PATHS_CMD)
#define DM_VERSION_MAJOR 4
#define DM_VERSION_MINOR 49
#define DM_VERSION_MINOR 50
#define DM_VERSION_PATCHLEVEL 0
#define DM_VERSION_EXTRA "-ioctl (2025-01-17)"
#define DM_VERSION_EXTRA "-ioctl (2025-04-28)"
/* Status bits */
#define DM_READONLY_FLAG (1 << 0) /* In/Out */
+64 -60
View File
@@ -2295,71 +2295,75 @@ static inline int ethtool_validate_duplex(__u8 duplex)
#define RXH_XFRM_SYM_OR_XOR (1 << 1)
#define RXH_XFRM_NO_CHANGE 0xff
/* L2-L4 network traffic flow types */
#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */
#define UDP_V4_FLOW 0x02 /* hash or spec (udp_ip4_spec) */
#define SCTP_V4_FLOW 0x03 /* hash or spec (sctp_ip4_spec) */
#define AH_ESP_V4_FLOW 0x04 /* hash only */
#define TCP_V6_FLOW 0x05 /* hash or spec (tcp_ip6_spec; nfc only) */
#define UDP_V6_FLOW 0x06 /* hash or spec (udp_ip6_spec; nfc only) */
#define SCTP_V6_FLOW 0x07 /* hash or spec (sctp_ip6_spec; nfc only) */
#define AH_ESP_V6_FLOW 0x08 /* hash only */
#define AH_V4_FLOW 0x09 /* hash or spec (ah_ip4_spec) */
#define ESP_V4_FLOW 0x0a /* hash or spec (esp_ip4_spec) */
#define AH_V6_FLOW 0x0b /* hash or spec (ah_ip6_spec; nfc only) */
#define ESP_V6_FLOW 0x0c /* hash or spec (esp_ip6_spec; nfc only) */
#define IPV4_USER_FLOW 0x0d /* spec only (usr_ip4_spec) */
#define IP_USER_FLOW IPV4_USER_FLOW
#define IPV6_USER_FLOW 0x0e /* spec only (usr_ip6_spec; nfc only) */
#define IPV4_FLOW 0x10 /* hash only */
#define IPV6_FLOW 0x11 /* hash only */
#define ETHER_FLOW 0x12 /* spec only (ether_spec) */
enum {
/* L2-L4 network traffic flow types */
TCP_V4_FLOW = 0x01, /* hash or spec (tcp_ip4_spec) */
UDP_V4_FLOW = 0x02, /* hash or spec (udp_ip4_spec) */
SCTP_V4_FLOW = 0x03, /* hash or spec (sctp_ip4_spec) */
AH_ESP_V4_FLOW = 0x04, /* hash only */
TCP_V6_FLOW = 0x05, /* hash or spec (tcp_ip6_spec; nfc only) */
UDP_V6_FLOW = 0x06, /* hash or spec (udp_ip6_spec; nfc only) */
SCTP_V6_FLOW = 0x07, /* hash or spec (sctp_ip6_spec; nfc only) */
AH_ESP_V6_FLOW = 0x08, /* hash only */
AH_V4_FLOW = 0x09, /* hash or spec (ah_ip4_spec) */
ESP_V4_FLOW = 0x0a, /* hash or spec (esp_ip4_spec) */
AH_V6_FLOW = 0x0b, /* hash or spec (ah_ip6_spec; nfc only) */
ESP_V6_FLOW = 0x0c, /* hash or spec (esp_ip6_spec; nfc only) */
IPV4_USER_FLOW = 0x0d, /* spec only (usr_ip4_spec) */
IP_USER_FLOW = IPV4_USER_FLOW,
IPV6_USER_FLOW = 0x0e, /* spec only (usr_ip6_spec; nfc only) */
IPV4_FLOW = 0x10, /* hash only */
IPV6_FLOW = 0x11, /* hash only */
ETHER_FLOW = 0x12, /* spec only (ether_spec) */
/* Used for GTP-U IPv4 and IPv6.
* The format of GTP packets only includes
* elements such as TEID and GTP version.
* It is primarily intended for data communication of the UE.
*/
#define GTPU_V4_FLOW 0x13 /* hash only */
#define GTPU_V6_FLOW 0x14 /* hash only */
/* Used for GTP-U IPv4 and IPv6.
* The format of GTP packets only includes
* elements such as TEID and GTP version.
* It is primarily intended for data communication of the UE.
*/
GTPU_V4_FLOW = 0x13, /* hash only */
GTPU_V6_FLOW = 0x14, /* hash only */
/* Use for GTP-C IPv4 and v6.
* The format of these GTP packets does not include TEID.
* Primarily expected to be used for communication
* to create sessions for UE data communication,
* commonly referred to as CSR (Create Session Request).
*/
#define GTPC_V4_FLOW 0x15 /* hash only */
#define GTPC_V6_FLOW 0x16 /* hash only */
/* Use for GTP-C IPv4 and v6.
* The format of these GTP packets does not include TEID.
* Primarily expected to be used for communication
* to create sessions for UE data communication,
* commonly referred to as CSR (Create Session Request).
*/
GTPC_V4_FLOW = 0x15, /* hash only */
GTPC_V6_FLOW = 0x16, /* hash only */
/* Use for GTP-C IPv4 and v6.
* Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID.
* After session creation, it becomes this packet.
* This is mainly used for requests to realize UE handover.
*/
#define GTPC_TEID_V4_FLOW 0x17 /* hash only */
#define GTPC_TEID_V6_FLOW 0x18 /* hash only */
/* Use for GTP-C IPv4 and v6.
* Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID.
* After session creation, it becomes this packet.
* This is mainly used for requests to realize UE handover.
*/
GTPC_TEID_V4_FLOW = 0x17, /* hash only */
GTPC_TEID_V6_FLOW = 0x18, /* hash only */
/* Use for GTP-U and extended headers for the PSC (PDU Session Container).
* The format of these GTP packets includes TEID and QFI.
* In 5G communication using UPF (User Plane Function),
* data communication with this extended header is performed.
*/
#define GTPU_EH_V4_FLOW 0x19 /* hash only */
#define GTPU_EH_V6_FLOW 0x1a /* hash only */
/* Use for GTP-U and extended headers for the PSC (PDU Session Container).
* The format of these GTP packets includes TEID and QFI.
* In 5G communication using UPF (User Plane Function),
* data communication with this extended header is performed.
*/
GTPU_EH_V4_FLOW = 0x19, /* hash only */
GTPU_EH_V6_FLOW = 0x1a, /* hash only */
/* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers.
* This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by
* UL/DL included in the PSC.
* There are differences in the data included based on Downlink/Uplink,
* and can be used to distinguish packets.
* The functions described so far are useful when you want to
* handle communication from the mobile network in UPF, PGW, etc.
*/
#define GTPU_UL_V4_FLOW 0x1b /* hash only */
#define GTPU_UL_V6_FLOW 0x1c /* hash only */
#define GTPU_DL_V4_FLOW 0x1d /* hash only */
#define GTPU_DL_V6_FLOW 0x1e /* hash only */
/* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers.
* This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by
* UL/DL included in the PSC.
* There are differences in the data included based on Downlink/Uplink,
* and can be used to distinguish packets.
* The functions described so far are useful when you want to
* handle communication from the mobile network in UPF, PGW, etc.
*/
GTPU_UL_V4_FLOW = 0x1b, /* hash only */
GTPU_UL_V6_FLOW = 0x1c, /* hash only */
GTPU_DL_V4_FLOW = 0x1d, /* hash only */
GTPU_DL_V6_FLOW = 0x1e, /* hash only */
__FLOW_TYPE_COUNT,
};
/* Flag to enable additional fields in struct ethtool_rx_flow_spec */
#define FLOW_EXT 0x80000000
@@ -37,6 +37,18 @@ enum ethtool_tcp_data_split {
ETHTOOL_TCP_DATA_SPLIT_ENABLED,
};
/**
* enum hwtstamp_source - Source of the hardware timestamp
* @HWTSTAMP_SOURCE_NETDEV: Hardware timestamp comes from a MAC or a device
* which has MAC and PHY integrated
* @HWTSTAMP_SOURCE_PHYLIB: Hardware timestamp comes from one PHY device of the
* network topology
*/
enum hwtstamp_source {
HWTSTAMP_SOURCE_NETDEV = 1,
HWTSTAMP_SOURCE_PHYLIB,
};
enum {
ETHTOOL_A_HEADER_UNSPEC,
ETHTOOL_A_HEADER_DEV_INDEX,
@@ -401,6 +413,8 @@ enum {
ETHTOOL_A_TSINFO_PHC_INDEX,
ETHTOOL_A_TSINFO_STATS,
ETHTOOL_A_TSINFO_HWTSTAMP_PROVIDER,
ETHTOOL_A_TSINFO_HWTSTAMP_SOURCE,
ETHTOOL_A_TSINFO_HWTSTAMP_PHYINDEX,
__ETHTOOL_A_TSINFO_CNT,
ETHTOOL_A_TSINFO_MAX = (__ETHTOOL_A_TSINFO_CNT - 1)
+2 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __LINUX_FIB_RULES_H
#define __LINUX_FIB_RULES_H
#ifndef _UAPI__LINUX_FIB_RULES_H
#define _UAPI__LINUX_FIB_RULES_H
#include <linux/types.h>
#include <linux/rtnetlink.h>
+1
View File
@@ -361,6 +361,7 @@ typedef int __bitwise __kernel_rwf_t;
#define PAGE_IS_PFNZERO (1 << 5)
#define PAGE_IS_HUGE (1 << 6)
#define PAGE_IS_SOFT_DIRTY (1 << 7)
#define PAGE_IS_GUARD (1 << 8)
/*
* struct page_region - Page region with flags
+4 -2
View File
@@ -119,7 +119,7 @@ struct fscrypt_key_specifier {
*/
struct fscrypt_provisioning_key_payload {
__u32 type;
__u32 __reserved;
__u32 flags;
__u8 raw[];
};
@@ -128,7 +128,9 @@ struct fscrypt_add_key_arg {
struct fscrypt_key_specifier key_spec;
__u32 raw_size;
__u32 key_id;
__u32 __reserved[8];
#define FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED 0x00000001
__u32 flags;
__u32 __reserved[7];
__u8 raw[];
};
+5 -1
View File
@@ -232,6 +232,9 @@
*
* 7.43
* - add FUSE_REQUEST_TIMEOUT
*
* 7.44
* - add FUSE_NOTIFY_INC_EPOCH
*/
#ifndef _LINUX_FUSE_H
@@ -267,7 +270,7 @@
#define FUSE_KERNEL_VERSION 7
/** Minor version number of this interface */
#define FUSE_KERNEL_MINOR_VERSION 43
#define FUSE_KERNEL_MINOR_VERSION 44
/** The node ID of the root inode */
#define FUSE_ROOT_ID 1
@@ -671,6 +674,7 @@ enum fuse_notify_code {
FUSE_NOTIFY_RETRIEVE = 5,
FUSE_NOTIFY_DELETE = 6,
FUSE_NOTIFY_RESEND = 7,
FUSE_NOTIFY_INC_EPOCH = 8,
FUSE_NOTIFY_CODE_MAX,
};
+8 -1
View File
@@ -63,7 +63,7 @@
#define FUTEX2_SIZE_U32 0x02
#define FUTEX2_SIZE_U64 0x03
#define FUTEX2_NUMA 0x04
/* 0x08 */
#define FUTEX2_MPOL 0x08
/* 0x10 */
/* 0x20 */
/* 0x40 */
@@ -74,6 +74,13 @@
/* do not use */
#define FUTEX_32 FUTEX2_SIZE_U32 /* historical accident :-( */
/*
* When FUTEX2_NUMA doubles the futex word, the second word is a node value.
* The special value -1 indicates no-node. This is the same value as
* NUMA_NO_NODE, except that value is not ABI, this is.
*/
#define FUTEX_NO_NODE (-1)
/*
* Max numbers of elements in a futex_waitv array
*/
+2 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __LINUX_IF_ADDR_H
#define __LINUX_IF_ADDR_H
#ifndef _UAPI__LINUX_IF_ADDR_H
#define _UAPI__LINUX_IF_ADDR_H
#include <linux/types.h>
#include <linux/netlink.h>
+2 -2
View File
@@ -8,8 +8,8 @@
* YOSHIFUJI Hideaki @ USAGI/WIDE <yoshfuji@linux-ipv6.org>
*/
#ifndef __LINUX_IF_ADDRLABEL_H
#define __LINUX_IF_ADDRLABEL_H
#ifndef _UAPI__LINUX_IF_ADDRLABEL_H
#define _UAPI__LINUX_IF_ADDRLABEL_H
#include <linux/types.h>
+3 -3
View File
@@ -11,8 +11,8 @@
*
*/
#ifndef _LINUX_IF_ALG_H
#define _LINUX_IF_ALG_H
#ifndef _UAPI_LINUX_IF_ALG_H
#define _UAPI_LINUX_IF_ALG_H
#include <linux/types.h>
@@ -58,4 +58,4 @@ struct af_alg_iv {
#define ALG_OP_DECRYPT 0
#define ALG_OP_ENCRYPT 1
#endif /* _LINUX_IF_ALG_H */
#endif /* _UAPI_LINUX_IF_ALG_H */
+3 -3
View File
@@ -14,8 +14,8 @@
* 2 of the License, or (at your option) any later version.
*/
#ifndef _LINUX_IF_ARCNET_H
#define _LINUX_IF_ARCNET_H
#ifndef _UAPI_LINUX_IF_ARCNET_H
#define _UAPI_LINUX_IF_ARCNET_H
#include <linux/types.h>
#include <linux/if_ether.h>
@@ -127,4 +127,4 @@ struct archdr {
} soft;
};
#endif /* _LINUX_IF_ARCNET_H */
#endif /* _UAPI_LINUX_IF_ARCNET_H */
+3 -3
View File
@@ -41,8 +41,8 @@
* - added definitions for various XOR hashing policies
*/
#ifndef _LINUX_IF_BONDING_H
#define _LINUX_IF_BONDING_H
#ifndef _UAPI_LINUX_IF_BONDING_H
#define _UAPI_LINUX_IF_BONDING_H
#include <linux/if.h>
#include <linux/types.h>
@@ -152,4 +152,4 @@ enum {
};
#define BOND_3AD_STAT_MAX (__BOND_3AD_STAT_MAX - 1)
#endif /* _LINUX_IF_BONDING_H */
#endif /* _UAPI_LINUX_IF_BONDING_H */
+6 -4
View File
@@ -699,10 +699,11 @@ struct br_mdb_entry {
#define MDB_TEMPORARY 0
#define MDB_PERMANENT 1
__u8 state;
#define MDB_FLAGS_OFFLOAD (1 << 0)
#define MDB_FLAGS_FAST_LEAVE (1 << 1)
#define MDB_FLAGS_STAR_EXCL (1 << 2)
#define MDB_FLAGS_BLOCKED (1 << 3)
#define MDB_FLAGS_OFFLOAD (1 << 0)
#define MDB_FLAGS_FAST_LEAVE (1 << 1)
#define MDB_FLAGS_STAR_EXCL (1 << 2)
#define MDB_FLAGS_BLOCKED (1 << 3)
#define MDB_FLAGS_OFFLOAD_FAILED (1 << 4)
__u8 flags;
__u16 vid;
struct {
@@ -830,6 +831,7 @@ enum br_boolopt_id {
BR_BOOLOPT_NO_LL_LEARN,
BR_BOOLOPT_MCAST_VLAN_SNOOPING,
BR_BOOLOPT_MST_ENABLE,
BR_BOOLOPT_MDB_OFFLOAD_FAIL_NOTIFICATION,
BR_BOOLOPT_MAX
};
+3 -3
View File
@@ -18,8 +18,8 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef _LINUX_IF_FC_H
#define _LINUX_IF_FC_H
#ifndef _UAPI_LINUX_IF_FC_H
#define _UAPI_LINUX_IF_FC_H
#include <linux/types.h>
@@ -49,4 +49,4 @@ struct fcllc {
__be16 ethertype; /* ether type field */
};
#endif /* _LINUX_IF_FC_H */
#endif /* _UAPI_LINUX_IF_FC_H */
+3 -3
View File
@@ -20,8 +20,8 @@
* 2 of the License, or (at your option) any later version.
*/
#ifndef _LINUX_IF_HIPPI_H
#define _LINUX_IF_HIPPI_H
#ifndef _UAPI_LINUX_IF_HIPPI_H
#define _UAPI_LINUX_IF_HIPPI_H
#include <linux/types.h>
#include <asm/byteorder.h>
@@ -151,4 +151,4 @@ struct hippi_hdr {
struct hippi_snap_hdr snap;
} __attribute__((packed));
#endif /* _LINUX_IF_HIPPI_H */
#endif /* _UAPI_LINUX_IF_HIPPI_H */
+15
View File
@@ -1986,4 +1986,19 @@ enum {
#define IFLA_DSA_MAX (__IFLA_DSA_MAX - 1)
/* OVPN section */
enum ovpn_mode {
OVPN_MODE_P2P,
OVPN_MODE_MP,
};
enum {
IFLA_OVPN_UNSPEC,
IFLA_OVPN_MODE,
__IFLA_OVPN_MAX,
};
#define IFLA_OVPN_MAX (__IFLA_OVPN_MAX - 1)
#endif /* _UAPI_LINUX_IF_LINK_H */
+2 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __LINUX_IF_PACKET_H
#define __LINUX_IF_PACKET_H
#ifndef _UAPI__LINUX_IF_PACKET_H
#define _UAPI__LINUX_IF_PACKET_H
#include <asm/byteorder.h>
#include <linux/types.h>
+2 -2
View File
@@ -9,8 +9,8 @@
*
*/
#ifndef _LINUX_IF_PLIP_H
#define _LINUX_IF_PLIP_H
#ifndef _UAPI_LINUX_IF_PLIP_H
#define _UAPI_LINUX_IF_PLIP_H
#include <linux/sockios.h>
+2 -2
View File
@@ -6,8 +6,8 @@
* KISS TNC driver.
*/
#ifndef __LINUX_SLIP_H
#define __LINUX_SLIP_H
#ifndef _UAPI__LINUX_SLIP_H
#define _UAPI__LINUX_SLIP_H
#define SL_MODE_SLIP 0
#define SL_MODE_CSLIP 1
+3 -3
View File
@@ -13,8 +13,8 @@
* GNU General Public License for more details.
*/
#ifndef _IF_X25_H
#define _IF_X25_H
#ifndef _UAPI_IF_X25_H
#define _UAPI_IF_X25_H
#include <linux/types.h>
@@ -24,4 +24,4 @@
#define X25_IFACE_DISCONNECT 0x02
#define X25_IFACE_PARAMS 0x03
#endif /* _IF_X25_H */
#endif /* _UAPI_IF_X25_H */
+3 -3
View File
@@ -7,8 +7,8 @@
* Magnus Karlsson <magnus.karlsson@intel.com>
*/
#ifndef _LINUX_IF_XDP_H
#define _LINUX_IF_XDP_H
#ifndef _UAPI_LINUX_IF_XDP_H
#define _UAPI_LINUX_IF_XDP_H
#include <linux/types.h>
@@ -180,4 +180,4 @@ struct xdp_desc {
/* TX packet carries valid metadata. */
#define XDP_TX_METADATA (1 << 1)
#endif /* _LINUX_IF_XDP_H */
#endif /* _UAPI_LINUX_IF_XDP_H */
+2 -1
View File
@@ -930,7 +930,8 @@
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
#define SW_MACHINE_COVER 0x10 /* set = cover closed */
#define SW_MAX 0x10
#define SW_USB_INSERT 0x11 /* set = USB audio device connected */
#define SW_MAX 0x11
#define SW_CNT (SW_MAX+1)
/*
+11 -1
View File
@@ -73,6 +73,7 @@ struct io_uring_sqe {
__u32 futex_flags;
__u32 install_fd_flags;
__u32 nop_flags;
__u32 pipe_flags;
};
__u64 user_data; /* data to be passed back at completion time */
/* pack this to avoid bogus arm OABI complaints */
@@ -93,6 +94,10 @@ struct io_uring_sqe {
__u16 addr_len;
__u16 __pad3[1];
};
struct {
__u8 write_stream;
__u8 __pad4[3];
};
};
union {
struct {
@@ -283,6 +288,7 @@ enum io_uring_op {
IORING_OP_EPOLL_WAIT,
IORING_OP_READV_FIXED,
IORING_OP_WRITEV_FIXED,
IORING_OP_PIPE,
/* this goes last, obviously */
IORING_OP_LAST,
@@ -988,12 +994,16 @@ struct io_uring_zcrx_offsets {
__u64 __resv[2];
};
enum io_uring_zcrx_area_flags {
IORING_ZCRX_AREA_DMABUF = 1,
};
struct io_uring_zcrx_area_reg {
__u64 addr;
__u64 len;
__u64 rq_area_token;
__u32 flags;
__u32 __resv1;
__u32 dmabuf_fd;
__u64 __resv2[2];
};
+2 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _IP6_TUNNEL_H
#define _IP6_TUNNEL_H
#ifndef _UAPI_IP6_TUNNEL_H
#define _UAPI_IP6_TUNNEL_H
#include <linux/types.h>
#include <linux/if.h> /* For IFNAMSIZ. */
+26
View File
@@ -375,6 +375,30 @@ struct isst_perf_level_data_info {
__u16 trl_freq_mhz[TRL_MAX_LEVELS][TRL_MAX_BUCKETS];
};
#define MAX_FABRIC_COUNT 8
/**
* struct isst_perf_level_fabric_info - Structure to get SST-PP fabric details
* @socket_id: Socket/package id
* @power_domain_id: Power Domain id
* @level: SST-PP level for which caller wants to get information
* @max_fabrics: Count of fabrics in resonse
* @p0_fabric_freq_mhz: Fabric (Uncore) maximum frequency
* @p1_fabric_freq_mhz: Fabric (Uncore) TDP frequency
* @pm_fabric_freq_mhz: Fabric (Uncore) minimum frequency
*
* Structure used to get information on frequencies for fabrics.
*/
struct isst_perf_level_fabric_info {
__u8 socket_id;
__u8 power_domain_id;
__u16 level;
__u16 max_fabrics;
__u16 p0_fabric_freq_mhz[MAX_FABRIC_COUNT];
__u16 p1_fabric_freq_mhz[MAX_FABRIC_COUNT];
__u16 pm_fabric_freq_mhz[MAX_FABRIC_COUNT];
};
/**
* struct isst_perf_level_cpu_mask - Structure to get SST-PP level CPU mask
* @socket_id: Socket/package id
@@ -471,5 +495,7 @@ struct isst_turbo_freq_info {
#define ISST_IF_GET_BASE_FREQ_INFO _IOR(ISST_IF_MAGIC, 14, struct isst_base_freq_info *)
#define ISST_IF_GET_BASE_FREQ_CPU_MASK _IOR(ISST_IF_MAGIC, 15, struct isst_perf_level_cpu_mask *)
#define ISST_IF_GET_TURBO_FREQ_INFO _IOR(ISST_IF_MAGIC, 16, struct isst_turbo_freq_info *)
#define ISST_IF_GET_PERF_LEVEL_FABRIC_INFO _IOR(ISST_IF_MAGIC, 17,\
struct isst_perf_level_fabric_info *)
#endif
+5
View File
@@ -536,6 +536,8 @@ enum kfd_smi_event {
KFD_SMI_EVENT_QUEUE_EVICTION = 9,
KFD_SMI_EVENT_QUEUE_RESTORE = 10,
KFD_SMI_EVENT_UNMAP_FROM_GPU = 11,
KFD_SMI_EVENT_PROCESS_START = 12,
KFD_SMI_EVENT_PROCESS_END = 13,
/*
* max event number, as a flag bit to get events from all processes,
@@ -651,6 +653,9 @@ struct kfd_ioctl_smi_events_args {
"%lld -%d @%lx(%lx) %x %d\n", (ns), (pid), (addr), (size),\
(node), (unmap_trigger)
#define KFD_EVENT_FMT_PROCESS(pid, task_name)\
"%x %s\n", (pid), (task_name)
/**************************************************************************************************
* CRIU IOCTLs (Checkpoint Restore In Userspace)
*
+4
View File
@@ -375,6 +375,7 @@ struct kvm_run {
#define KVM_SYSTEM_EVENT_WAKEUP 4
#define KVM_SYSTEM_EVENT_SUSPEND 5
#define KVM_SYSTEM_EVENT_SEV_TERM 6
#define KVM_SYSTEM_EVENT_TDX_FATAL 7
__u32 type;
__u32 ndata;
union {
@@ -930,6 +931,9 @@ struct kvm_enable_cap {
#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
#define KVM_CAP_X86_GUEST_MODE 238
#define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239
#define KVM_CAP_ARM_EL2 240
#define KVM_CAP_ARM_EL2_E2H0 241
#define KVM_CAP_RISCV_MP_STATE_RESET 242
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@@ -0,0 +1,564 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (C) 2024 Amlogic, Inc. All rights reserved
*/
#ifndef _UAPI_C3_ISP_CONFIG_H_
#define _UAPI_C3_ISP_CONFIG_H_
#include <linux/types.h>
/*
* Frames are split into zones of almost equal width and height - a zone is a
* rectangular tile of a frame. The metering blocks within the ISP collect
* aggregated statistics per zone.
*/
#define C3_ISP_AE_MAX_ZONES (17 * 15)
#define C3_ISP_AF_MAX_ZONES (17 * 15)
#define C3_ISP_AWB_MAX_ZONES (32 * 24)
/* The maximum number of point on the diagonal of the frame for statistics */
#define C3_ISP_AE_MAX_PT_NUM 18
#define C3_ISP_AF_MAX_PT_NUM 18
#define C3_ISP_AWB_MAX_PT_NUM 33
/**
* struct c3_isp_awb_zone_stats - AWB statistics of a zone
*
* AWB zone stats is aligned with 8 bytes
*
* @rg: the ratio of R / G in a zone
* @bg: the ratio of B / G in a zone
* @pixel_sum: the total number of pixels used in a zone
*/
struct c3_isp_awb_zone_stats {
__u16 rg;
__u16 bg;
__u32 pixel_sum;
};
/**
* struct c3_isp_awb_stats - Auto white balance statistics information.
*
* AWB statistical information of all zones.
*
* @stats: array of auto white balance statistics
*/
struct c3_isp_awb_stats {
struct c3_isp_awb_zone_stats stats[C3_ISP_AWB_MAX_ZONES];
} __attribute__((aligned(16)));
/**
* struct c3_isp_ae_zone_stats - AE statistics of a zone
*
* AE zone stats is aligned with 8 bytes.
* This is a 5-bin histogram and the total sum is normalized to 0xffff.
* So hist2 = 0xffff - (hist0 + hist1 + hist3 + hist4)
*
* @hist0: the global normalized pixel count for bin 0
* @hist1: the global normalized pixel count for bin 1
* @hist3: the global normalized pixel count for bin 3
* @hist4: the global normalized pixel count for bin 4
*/
struct c3_isp_ae_zone_stats {
__u16 hist0;
__u16 hist1;
__u16 hist3;
__u16 hist4;
};
/**
* struct c3_isp_ae_stats - Exposure statistics information
*
* AE statistical information consists of all blocks information and a 1024-bin
* histogram.
*
* @stats: array of auto exposure block statistics
* @reserved: undefined buffer space
* @hist: a 1024-bin histogram for the entire image
*/
struct c3_isp_ae_stats {
struct c3_isp_ae_zone_stats stats[C3_ISP_AE_MAX_ZONES];
__u32 reserved[2];
__u32 hist[1024];
} __attribute__((aligned(16)));
/**
* struct c3_isp_af_zone_stats - AF statistics of a zone
*
* AF zone stats is aligned with 8 bytes.
* The zonal accumulated contrast metrics are stored in floating point format
* with 16 bits mantissa and 5 or 6 bits exponent. Apart from contrast metrics
* we accumulate squared image and quartic image data over the zone.
*
* @i2_mat: the mantissa of zonal squared image pixel sum
* @i4_mat: the mantissa of zonal quartic image pixel sum
* @e4_mat: the mantissa of zonal multi-directional quartic edge sum
* @e4_exp: the exponent of zonal multi-directional quartic edge sum
* @i2_exp: the exponent of zonal squared image pixel sum
* @i4_exp: the exponent of zonal quartic image pixel sum
*/
struct c3_isp_af_zone_stats {
__u16 i2_mat;
__u16 i4_mat;
__u16 e4_mat;
__u16 e4_exp : 5;
__u16 i2_exp : 5;
__u16 i4_exp : 6;
};
/**
* struct c3_isp_af_stats - Auto Focus statistics information
*
* AF statistical information of each zone
*
* @stats: array of auto focus block statistics
* @reserved: undefined buffer space
*/
struct c3_isp_af_stats {
struct c3_isp_af_zone_stats stats[C3_ISP_AF_MAX_ZONES];
__u32 reserved[2];
} __attribute__((aligned(16)));
/**
* struct c3_isp_stats_info - V4L2_META_FMT_C3ISP_STATS
*
* Contains ISP statistics
*
* @awb: auto white balance stats
* @ae: auto exposure stats
* @af: auto focus stats
*/
struct c3_isp_stats_info {
struct c3_isp_awb_stats awb;
struct c3_isp_ae_stats ae;
struct c3_isp_af_stats af;
};
/**
* enum c3_isp_params_buffer_version - C3 ISP parameters block versioning
*
* @C3_ISP_PARAMS_BUFFER_V0: First version of C3 ISP parameters block
*/
enum c3_isp_params_buffer_version {
C3_ISP_PARAMS_BUFFER_V0,
};
/**
* enum c3_isp_params_block_type - Enumeration of C3 ISP parameter blocks
*
* Each block configures a specific processing block of the C3 ISP.
* The block type allows the driver to correctly interpret the parameters block
* data.
*
* @C3_ISP_PARAMS_BLOCK_AWB_GAINS: White balance gains
* @C3_ISP_PARAMS_BLOCK_AWB_CONFIG: AWB statistic format configuration for all
* blocks that control how stats are generated
* @C3_ISP_PARAMS_BLOCK_AE_CONFIG: AE statistic format configuration for all
* blocks that control how stats are generated
* @C3_ISP_PARAMS_BLOCK_AF_CONFIG: AF statistic format configuration for all
* blocks that control how stats are generated
* @C3_ISP_PARAMS_BLOCK_PST_GAMMA: post gamma parameters
* @C3_ISP_PARAMS_BLOCK_CCM: Color correction matrix parameters
* @C3_ISP_PARAMS_BLOCK_CSC: Color space conversion parameters
* @C3_ISP_PARAMS_BLOCK_BLC: Black level correction parameters
* @C3_ISP_PARAMS_BLOCK_SENTINEL: First non-valid block index
*/
enum c3_isp_params_block_type {
C3_ISP_PARAMS_BLOCK_AWB_GAINS,
C3_ISP_PARAMS_BLOCK_AWB_CONFIG,
C3_ISP_PARAMS_BLOCK_AE_CONFIG,
C3_ISP_PARAMS_BLOCK_AF_CONFIG,
C3_ISP_PARAMS_BLOCK_PST_GAMMA,
C3_ISP_PARAMS_BLOCK_CCM,
C3_ISP_PARAMS_BLOCK_CSC,
C3_ISP_PARAMS_BLOCK_BLC,
C3_ISP_PARAMS_BLOCK_SENTINEL
};
#define C3_ISP_PARAMS_BLOCK_FL_DISABLE (1U << 0)
#define C3_ISP_PARAMS_BLOCK_FL_ENABLE (1U << 1)
/**
* struct c3_isp_params_block_header - C3 ISP parameter block header
*
* This structure represents the common part of all the ISP configuration
* blocks. Each parameters block shall embed an instance of this structure type
* as its first member, followed by the block-specific configuration data. The
* driver inspects this common header to discern the block type and its size and
* properly handle the block content by casting it to the correct block-specific
* type.
*
* The @type field is one of the values enumerated by
* :c:type:`c3_isp_params_block_type` and specifies how the data should be
* interpreted by the driver. The @size field specifies the size of the
* parameters block and is used by the driver for validation purposes. The
* @flags field is a bitmask of per-block flags C3_ISP_PARAMS_FL*.
*
* When userspace wants to disable an ISP block the
* C3_ISP_PARAMS_BLOCK_FL_DISABLED bit should be set in the @flags field. In
* this case userspace may optionally omit the remainder of the configuration
* block, which will be ignored by the driver.
*
* When a new configuration of an ISP block needs to be applied userspace
* shall fully populate the ISP block and omit setting the
* C3_ISP_PARAMS_BLOCK_FL_DISABLED bit in the @flags field.
*
* Userspace is responsible for correctly populating the parameters block header
* fields (@type, @flags and @size) and the block-specific parameters.
*
* For example:
*
* .. code-block:: c
*
* void populate_pst_gamma(struct c3_isp_params_block_header *block) {
* struct c3_isp_params_pst_gamma *gamma =
* (struct c3_isp_params_pst_gamma *)block;
*
* gamma->header.type = C3_ISP_PARAMS_BLOCK_PST_GAMMA;
* gamma->header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE;
* gamma->header.size = sizeof(*gamma);
*
* for (unsigned int i = 0; i < 129; i++)
* gamma->pst_gamma_lut[i] = i;
* }
*
* @type: The parameters block type from :c:type:`c3_isp_params_block_type`
* @flags: A bitmask of block flags
* @size: Size (in bytes) of the parameters block, including this header
*/
struct c3_isp_params_block_header {
__u16 type;
__u16 flags;
__u32 size;
};
/**
* struct c3_isp_params_awb_gains - Gains for auto-white balance
*
* This struct allows users to configure the gains for white balance.
* There are four gain settings corresponding to each colour channel in
* the bayer domain. All of the gains are stored in Q4.8 format.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AWB_GAINS
* from :c:type:`c3_isp_params_block_type`
*
* @header: The C3 ISP parameters block header
* @gr_gain: Multiplier for Gr channel (Q4.8 format)
* @r_gain: Multiplier for R channel (Q4.8 format)
* @b_gain: Multiplier for B channel (Q4.8 format)
* @gb_gain: Multiplier for Gb channel (Q4.8 format)
*/
struct c3_isp_params_awb_gains {
struct c3_isp_params_block_header header;
__u16 gr_gain;
__u16 r_gain;
__u16 b_gain;
__u16 gb_gain;
} __attribute__((aligned(8)));
/**
* enum c3_isp_params_awb_tap_points - Tap points for the AWB statistics
* @C3_ISP_AWB_STATS_TAP_OFE: immediately after the optical frontend block
* @C3_ISP_AWB_STATS_TAP_GE: immediately after the green equal block
* @C3_ISP_AWB_STATS_TAP_BEFORE_WB: immediately before the white balance block
* @C3_ISP_AWB_STATS_TAP_AFTER_WB: immediately after the white balance block
*/
enum c3_isp_params_awb_tap_points {
C3_ISP_AWB_STATS_TAP_OFE = 0,
C3_ISP_AWB_STATS_TAP_GE,
C3_ISP_AWB_STATS_TAP_BEFORE_WB,
C3_ISP_AWB_STATS_TAP_AFTER_WB,
};
/**
* struct c3_isp_params_awb_config - Stats settings for auto-white balance
*
* This struct allows the configuration of the statistics generated for auto
* white balance.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AWB_CONFIG
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @tap_point: the tap point from enum c3_isp_params_awb_tap_point
* @satur_vald: AWB statistic over saturation control
* value: 0: disable, 1: enable
* @horiz_zones_num: active number of hotizontal zones [0..32]
* @vert_zones_num: active number of vertical zones [0..24]
* @rg_min: minimum R/G ratio (Q4.8 format)
* @rg_max: maximum R/G ratio (Q4.8 format)
* @bg_min: minimum B/G ratio (Q4.8 format)
* @bg_max: maximum B/G ratio (Q4.8 format)
* @rg_low: R/G ratio trim low (Q4.8 format)
* @rg_high: R/G ratio trim hight (Q4.8 format)
* @bg_low: B/G ratio trim low (Q4.8 format)
* @bg_high: B/G ratio trim high (Q4.8 format)
* @zone_weight: array of weights for AWB statistics zones [0..15]
* @horiz_coord: the horizontal coordinate of points on the diagonal [0..2888]
* @vert_coord: the vertical coordinate of points on the diagonal [0..2240]
*/
struct c3_isp_params_awb_config {
struct c3_isp_params_block_header header;
__u8 tap_point;
__u8 satur_vald;
__u8 horiz_zones_num;
__u8 vert_zones_num;
__u16 rg_min;
__u16 rg_max;
__u16 bg_min;
__u16 bg_max;
__u16 rg_low;
__u16 rg_high;
__u16 bg_low;
__u16 bg_high;
__u8 zone_weight[C3_ISP_AWB_MAX_ZONES];
__u16 horiz_coord[C3_ISP_AWB_MAX_PT_NUM];
__u16 vert_coord[C3_ISP_AWB_MAX_PT_NUM];
} __attribute__((aligned(8)));
/**
* enum c3_isp_params_ae_tap_points - Tap points for the AE statistics
* @C3_ISP_AE_STATS_TAP_GE: immediately after the green equal block
* @C3_ISP_AE_STATS_TAP_MLS: immediately after the mesh lens shading block
*/
enum c3_isp_params_ae_tap_points {
C3_ISP_AE_STATS_TAP_GE = 0,
C3_ISP_AE_STATS_TAP_MLS,
};
/**
* struct c3_isp_params_ae_config - Stats settings for auto-exposure
*
* This struct allows the configuration of the statistics generated for
* auto exposure.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AE_CONFIG
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @horiz_zones_num: active number of horizontal zones [0..17]
* @vert_zones_num: active number of vertical zones [0..15]
* @tap_point: the tap point from enum c3_isp_params_ae_tap_point
* @zone_weight: array of weights for AE statistics zones [0..15]
* @horiz_coord: the horizontal coordinate of points on the diagonal [0..2888]
* @vert_coord: the vertical coordinate of points on the diagonal [0..2240]
* @reserved: applications must zero this array
*/
struct c3_isp_params_ae_config {
struct c3_isp_params_block_header header;
__u8 tap_point;
__u8 horiz_zones_num;
__u8 vert_zones_num;
__u8 zone_weight[C3_ISP_AE_MAX_ZONES];
__u16 horiz_coord[C3_ISP_AE_MAX_PT_NUM];
__u16 vert_coord[C3_ISP_AE_MAX_PT_NUM];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* enum c3_isp_params_af_tap_points - Tap points for the AF statistics
* @C3_ISP_AF_STATS_TAP_SNR: immediately after the spatial noise reduce block
* @C3_ISP_AF_STATS_TAP_DMS: immediately after the demosaic block
*/
enum c3_isp_params_af_tap_points {
C3_ISP_AF_STATS_TAP_SNR = 0,
C3_ISP_AF_STATS_TAP_DMS,
};
/**
* struct c3_isp_params_af_config - Stats settings for auto-focus
*
* This struct allows the configuration of the statistics generated for
* auto focus.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_AF_CONFIG
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @tap_point: the tap point from enum c3_isp_params_af_tap_point
* @horiz_zones_num: active number of hotizontal zones [0..17]
* @vert_zones_num: active number of vertical zones [0..15]
* @reserved: applications must zero this array
* @horiz_coord: the horizontal coordinate of points on the diagonal [0..2888]
* @vert_coord: the vertical coordinate of points on the diagonal [0..2240]
*/
struct c3_isp_params_af_config {
struct c3_isp_params_block_header header;
__u8 tap_point;
__u8 horiz_zones_num;
__u8 vert_zones_num;
__u8 reserved[5];
__u16 horiz_coord[C3_ISP_AF_MAX_PT_NUM];
__u16 vert_coord[C3_ISP_AF_MAX_PT_NUM];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_pst_gamma - Post gamma configuration
*
* This struct allows the configuration of the look up table for
* post gamma. The gamma curve consists of 129 points, so need to
* set lut[129].
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_PST_GAMMA
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @lut: lookup table for P-Stitch gamma [0..1023]
* @reserved: applications must zero this array
*/
struct c3_isp_params_pst_gamma {
struct c3_isp_params_block_header header;
__u16 lut[129];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_ccm - ISP CCM configuration
*
* This struct allows the configuration of the matrix for
* color correction. The matrix consists of 3 x 3 points,
* so need to set matrix[3][3].
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_CCM
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @matrix: a 3 x 3 matrix used for color correction,
* the value of matrix[x][y] is orig_value x 256. [-4096..4095]
* @reserved: applications must zero this array
*/
struct c3_isp_params_ccm {
struct c3_isp_params_block_header header;
__s16 matrix[3][3];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_csc - ISP Color Space Conversion configuration
*
* This struct allows the configuration of the matrix for color space
* conversion. The matrix consists of 3 x 3 points, so need to set matrix[3][3].
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_CSC
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @matrix: a 3x3 matrix used for the color space conversion,
* the value of matrix[x][y] is orig_value x 256. [-4096..4095]
* @reserved: applications must zero this array
*/
struct c3_isp_params_csc {
struct c3_isp_params_block_header header;
__s16 matrix[3][3];
__u16 reserved[3];
} __attribute__((aligned(8)));
/**
* struct c3_isp_params_blc - ISP Black Level Correction configuration
*
* This struct allows the configuration of the block level offset for each
* color channel.
*
* header.type should be set to C3_ISP_PARAMS_BLOCK_BLC
* from :c:type:`c3_isp_params_block_type`
*
* @header: the C3 ISP parameters block header
* @gr_ofst: Gr blc offset (Q4.12 format)
* @r_ofst: R blc offset (Q4.12 format)
* @b_ofst: B blc offset (Q4.12 format)
* @gb_ofst: Gb blc offset(Q4.12 format)
*/
struct c3_isp_params_blc {
struct c3_isp_params_block_header header;
__u16 gr_ofst;
__u16 r_ofst;
__u16 b_ofst;
__u16 gb_ofst;
};
/**
* define C3_ISP_PARAMS_MAX_SIZE - Maximum size of all C3 ISP Parameters
*
* Though the parameters for the C3 ISP are passed as optional blocks, the
* driver still needs to know the absolute maximum size so that it can allocate
* a buffer sized appropriately to accommodate userspace attempting to set all
* possible parameters in a single frame.
*/
#define C3_ISP_PARAMS_MAX_SIZE \
(sizeof(struct c3_isp_params_awb_gains) + \
sizeof(struct c3_isp_params_awb_config) + \
sizeof(struct c3_isp_params_ae_config) + \
sizeof(struct c3_isp_params_af_config) + \
sizeof(struct c3_isp_params_pst_gamma) + \
sizeof(struct c3_isp_params_ccm) + \
sizeof(struct c3_isp_params_csc) + \
sizeof(struct c3_isp_params_blc))
/**
* struct c3_isp_params_cfg - C3 ISP configuration parameters
*
* This struct contains the configuration parameters of the C3 ISP
* algorithms, serialized by userspace into an opaque data buffer. Each
* configuration parameter block is represented by a block-specific structure
* which contains a :c:type:`c3_isp_param_block_header` entry as first
* member. Userspace populates the @data buffer with configuration parameters
* for the blocks that it intends to configure. As a consequence, the data
* buffer effective size changes according to the number of ISP blocks that
* userspace intends to configure.
*
* The parameters buffer is versioned by the @version field to allow modifying
* and extending its definition. Userspace should populate the @version field to
* inform the driver about the version it intends to use. The driver will parse
* and handle the @data buffer according to the data layout specific to the
* indicated revision and return an error if the desired revision is not
* supported.
*
* For each ISP block that userspace wants to configure, a block-specific
* structure is appended to the @data buffer, one after the other without gaps
* in between nor overlaps. Userspace shall populate the @total_size field with
* the effective size, in bytes, of the @data buffer.
*
* The expected memory layout of the parameters buffer is::
*
* +-------------------- struct c3_isp_params_cfg ---- ------------------+
* | version = C3_ISP_PARAM_BUFFER_V0; |
* | data_size = sizeof(struct c3_isp_params_awb_gains) + |
* | sizeof(struct c3_isp_params_awb_config); |
* | +------------------------- data ---------------------------------+ |
* | | +------------ struct c3_isp_params_awb_gains) ------------------+ |
* | | | +--------- struct c3_isp_params_block_header header -----+ | | |
* | | | | type = C3_ISP_PARAMS_BLOCK_AWB_GAINS; | | | |
* | | | | flags = C3_ISP_PARAMS_BLOCK_FL_NONE; | | | |
* | | | | size = sizeof(struct c3_isp_params_awb_gains); | | | |
* | | | +---------------------------------------------------------+ | | |
* | | | gr_gain = ...; | | |
* | | | r_gain = ...; | | |
* | | | b_gain = ...; | | |
* | | | gb_gain = ...; | | |
* | | +------------------ struct c3_isp_params_awb_config ----------+ | |
* | | | +---------- struct c3_isp_param_block_header header ------+ | | |
* | | | | type = C3_ISP_PARAMS_BLOCK_AWB_CONFIG; | | | |
* | | | | flags = C3_ISP_PARAMS_BLOCK_FL_NONE; | | | |
* | | | | size = sizeof(struct c3_isp_params_awb_config) | | | |
* | | | +---------------------------------------------------------+ | | |
* | | | tap_point = ...; | | |
* | | | satur_vald = ...; | | |
* | | | horiz_zones_num = ...; | | |
* | | | vert_zones_num = ...; | | |
* | | +-------------------------------------------------------------+ | |
* | +-----------------------------------------------------------------+ |
* +---------------------------------------------------------------------+
*
* @version: The C3 ISP parameters buffer version
* @data_size: The C3 ISP configuration data effective size, excluding this
* header
* @data: The C3 ISP configuration blocks data
*/
struct c3_isp_params_cfg {
__u32 version;
__u32 data_size;
__u8 data[C3_ISP_PARAMS_MAX_SIZE];
};
#endif
+2 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __LINUX_NEIGHBOUR_H
#define __LINUX_NEIGHBOUR_H
#ifndef _UAPI__LINUX_NEIGHBOUR_H
#define _UAPI__LINUX_NEIGHBOUR_H
#include <linux/types.h>
#include <linux/netlink.h>
+2 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __NET_DROPMON_H
#define __NET_DROPMON_H
#ifndef _UAPI__NET_DROPMON_H
#define _UAPI__NET_DROPMON_H
#include <linux/types.h>
#include <linux/netlink.h>
+3 -3
View File
@@ -7,8 +7,8 @@
*
*/
#ifndef _NET_TIMESTAMPING_H
#define _NET_TIMESTAMPING_H
#ifndef _UAPI_NET_TIMESTAMPING_H
#define _UAPI_NET_TIMESTAMPING_H
#include <linux/types.h>
#include <linux/socket.h> /* for SO_TIMESTAMPING */
@@ -216,4 +216,4 @@ struct sock_txtime {
__u32 flags; /* as defined by enum txtime_flags */
};
#endif /* _NET_TIMESTAMPING_H */
#endif /* _UAPI_NET_TIMESTAMPING_H */
+1
View File
@@ -219,6 +219,7 @@ enum {
NETDEV_CMD_QSTATS_GET,
NETDEV_CMD_BIND_RX,
NETDEV_CMD_NAPI_SET,
NETDEV_CMD_BIND_TX,
__NETDEV_CMD_MAX,
NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1)
+22
View File
@@ -142,6 +142,8 @@ enum nf_tables_msg_types {
NFT_MSG_DESTROYOBJ,
NFT_MSG_DESTROYFLOWTABLE,
NFT_MSG_GETSETELEM_RESET,
NFT_MSG_NEWDEV,
NFT_MSG_DELDEV,
NFT_MSG_MAX,
};
@@ -394,6 +396,8 @@ enum nft_set_field_attributes {
* @NFTA_SET_HANDLE: set handle (NLA_U64)
* @NFTA_SET_EXPR: set expression (NLA_NESTED: nft_expr_attributes)
* @NFTA_SET_EXPRESSIONS: list of expressions (NLA_NESTED: nft_list_attributes)
* @NFTA_SET_TYPE: set backend type (NLA_STRING)
* @NFTA_SET_COUNT: number of set elements (NLA_U32)
*/
enum nft_set_attributes {
NFTA_SET_UNSPEC,
@@ -415,6 +419,8 @@ enum nft_set_attributes {
NFTA_SET_HANDLE,
NFTA_SET_EXPR,
NFTA_SET_EXPRESSIONS,
NFTA_SET_TYPE,
NFTA_SET_COUNT,
__NFTA_SET_MAX
};
#define NFTA_SET_MAX (__NFTA_SET_MAX - 1)
@@ -1780,10 +1786,18 @@ enum nft_synproxy_attributes {
* enum nft_device_attributes - nf_tables device netlink attributes
*
* @NFTA_DEVICE_NAME: name of this device (NLA_STRING)
* @NFTA_DEVICE_TABLE: table containing the flowtable or chain hooking into the device (NLA_STRING)
* @NFTA_DEVICE_FLOWTABLE: flowtable hooking into the device (NLA_STRING)
* @NFTA_DEVICE_CHAIN: chain hooking into the device (NLA_STRING)
* @NFTA_DEVICE_SPEC: hook spec matching the device (NLA_STRING)
*/
enum nft_devices_attributes {
NFTA_DEVICE_UNSPEC,
NFTA_DEVICE_NAME,
NFTA_DEVICE_TABLE,
NFTA_DEVICE_FLOWTABLE,
NFTA_DEVICE_CHAIN,
NFTA_DEVICE_SPEC,
__NFTA_DEVICE_MAX
};
#define NFTA_DEVICE_MAX (__NFTA_DEVICE_MAX - 1)
@@ -1837,6 +1851,10 @@ enum nft_xfrm_keys {
* @NFTA_TRACE_MARK: nfmark (NLA_U32)
* @NFTA_TRACE_NFPROTO: nf protocol processed (NLA_U32)
* @NFTA_TRACE_POLICY: policy that decided fate of packet (NLA_U32)
* @NFTA_TRACE_CT_ID: conntrack id (NLA_U32)
* @NFTA_TRACE_CT_DIRECTION: packets direction (NLA_U8)
* @NFTA_TRACE_CT_STATUS: conntrack status (NLA_U32)
* @NFTA_TRACE_CT_STATE: packet state (new, established, ...) (NLA_U32)
*/
enum nft_trace_attributes {
NFTA_TRACE_UNSPEC,
@@ -1857,6 +1875,10 @@ enum nft_trace_attributes {
NFTA_TRACE_NFPROTO,
NFTA_TRACE_POLICY,
NFTA_TRACE_PAD,
NFTA_TRACE_CT_ID,
NFTA_TRACE_CT_DIRECTION,
NFTA_TRACE_CT_STATUS,
NFTA_TRACE_CT_STATE,
__NFTA_TRACE_MAX
};
#define NFTA_TRACE_MAX (__NFTA_TRACE_MAX - 1)
+2
View File
@@ -25,6 +25,8 @@ enum nfnetlink_groups {
#define NFNLGRP_ACCT_QUOTA NFNLGRP_ACCT_QUOTA
NFNLGRP_NFTRACE,
#define NFNLGRP_NFTRACE NFNLGRP_NFTRACE
NFNLGRP_NFT_DEV,
#define NFNLGRP_NFT_DEV NFNLGRP_NFT_DEV
__NFNLGRP_MAX,
};
#define NFNLGRP_MAX (__NFNLGRP_MAX - 1)
+2 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __NETLINK_DIAG_H__
#define __NETLINK_DIAG_H__
#ifndef _UAPI__NETLINK_DIAG_H__
#define _UAPI__NETLINK_DIAG_H__
#include <linux/types.h>
+6
View File
@@ -8036,6 +8036,11 @@ enum nl80211_sar_specs_attrs {
* Setting this flag is permitted only if the driver advertises EMA support
* by setting wiphy->ema_max_profile_periodicity to non-zero.
*
* @NL80211_MBSSID_CONFIG_ATTR_TX_LINK_ID: Link ID of the transmitted profile.
* This parameter is mandatory when NL80211_ATTR_MBSSID_CONFIG attributes
* are sent for a non-transmitted profile and if the transmitted profile
* is part of an MLD. For all other cases this parameter is unnecessary.
*
* @__NL80211_MBSSID_CONFIG_ATTR_LAST: Internal
* @NL80211_MBSSID_CONFIG_ATTR_MAX: highest attribute
*/
@@ -8047,6 +8052,7 @@ enum nl80211_mbssid_config_attributes {
NL80211_MBSSID_CONFIG_ATTR_INDEX,
NL80211_MBSSID_CONFIG_ATTR_TX_IFINDEX,
NL80211_MBSSID_CONFIG_ATTR_EMA,
NL80211_MBSSID_CONFIG_ATTR_TX_LINK_ID,
/* keep last */
__NL80211_MBSSID_CONFIG_ATTR_LAST,
+109
View File
@@ -0,0 +1,109 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/ovpn.yaml */
/* YNL-GEN uapi header */
#ifndef _UAPI_LINUX_OVPN_H
#define _UAPI_LINUX_OVPN_H
#define OVPN_FAMILY_NAME "ovpn"
#define OVPN_FAMILY_VERSION 1
#define OVPN_NONCE_TAIL_SIZE 8
enum ovpn_cipher_alg {
OVPN_CIPHER_ALG_NONE,
OVPN_CIPHER_ALG_AES_GCM,
OVPN_CIPHER_ALG_CHACHA20_POLY1305,
};
enum ovpn_del_peer_reason {
OVPN_DEL_PEER_REASON_TEARDOWN,
OVPN_DEL_PEER_REASON_USERSPACE,
OVPN_DEL_PEER_REASON_EXPIRED,
OVPN_DEL_PEER_REASON_TRANSPORT_ERROR,
OVPN_DEL_PEER_REASON_TRANSPORT_DISCONNECT,
};
enum ovpn_key_slot {
OVPN_KEY_SLOT_PRIMARY,
OVPN_KEY_SLOT_SECONDARY,
};
enum {
OVPN_A_PEER_ID = 1,
OVPN_A_PEER_REMOTE_IPV4,
OVPN_A_PEER_REMOTE_IPV6,
OVPN_A_PEER_REMOTE_IPV6_SCOPE_ID,
OVPN_A_PEER_REMOTE_PORT,
OVPN_A_PEER_SOCKET,
OVPN_A_PEER_SOCKET_NETNSID,
OVPN_A_PEER_VPN_IPV4,
OVPN_A_PEER_VPN_IPV6,
OVPN_A_PEER_LOCAL_IPV4,
OVPN_A_PEER_LOCAL_IPV6,
OVPN_A_PEER_LOCAL_PORT,
OVPN_A_PEER_KEEPALIVE_INTERVAL,
OVPN_A_PEER_KEEPALIVE_TIMEOUT,
OVPN_A_PEER_DEL_REASON,
OVPN_A_PEER_VPN_RX_BYTES,
OVPN_A_PEER_VPN_TX_BYTES,
OVPN_A_PEER_VPN_RX_PACKETS,
OVPN_A_PEER_VPN_TX_PACKETS,
OVPN_A_PEER_LINK_RX_BYTES,
OVPN_A_PEER_LINK_TX_BYTES,
OVPN_A_PEER_LINK_RX_PACKETS,
OVPN_A_PEER_LINK_TX_PACKETS,
__OVPN_A_PEER_MAX,
OVPN_A_PEER_MAX = (__OVPN_A_PEER_MAX - 1)
};
enum {
OVPN_A_KEYCONF_PEER_ID = 1,
OVPN_A_KEYCONF_SLOT,
OVPN_A_KEYCONF_KEY_ID,
OVPN_A_KEYCONF_CIPHER_ALG,
OVPN_A_KEYCONF_ENCRYPT_DIR,
OVPN_A_KEYCONF_DECRYPT_DIR,
__OVPN_A_KEYCONF_MAX,
OVPN_A_KEYCONF_MAX = (__OVPN_A_KEYCONF_MAX - 1)
};
enum {
OVPN_A_KEYDIR_CIPHER_KEY = 1,
OVPN_A_KEYDIR_NONCE_TAIL,
__OVPN_A_KEYDIR_MAX,
OVPN_A_KEYDIR_MAX = (__OVPN_A_KEYDIR_MAX - 1)
};
enum {
OVPN_A_IFINDEX = 1,
OVPN_A_PEER,
OVPN_A_KEYCONF,
__OVPN_A_MAX,
OVPN_A_MAX = (__OVPN_A_MAX - 1)
};
enum {
OVPN_CMD_PEER_NEW = 1,
OVPN_CMD_PEER_SET,
OVPN_CMD_PEER_GET,
OVPN_CMD_PEER_DEL,
OVPN_CMD_PEER_DEL_NTF,
OVPN_CMD_KEY_NEW,
OVPN_CMD_KEY_GET,
OVPN_CMD_KEY_SWAP,
OVPN_CMD_KEY_SWAP_NTF,
OVPN_CMD_KEY_DEL,
__OVPN_CMD_MAX,
OVPN_CMD_MAX = (__OVPN_CMD_MAX - 1)
};
#define OVPN_MCGRP_PEERS "peers"
#endif /* _UAPI_LINUX_OVPN_H */
+11 -1
View File
@@ -750,7 +750,8 @@
#define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */
#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
#define PCI_EXT_CAP_ID_PL_64GT 0x31 /* Physical Layer 64.0 GT/s */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_64GT
#define PCI_EXT_CAP_DSN_SIZEOF 12
#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@@ -1144,12 +1145,21 @@
#define PCI_DLF_CAP 0x04 /* Capabilities Register */
#define PCI_DLF_EXCHANGE_ENABLE 0x80000000 /* Data Link Feature Exchange Enable */
/* Secondary PCIe Capability 8.0 GT/s */
#define PCI_SECPCI_LE_CTRL 0x0c /* Lane Equalization Control Register */
/* Physical Layer 16.0 GT/s */
#define PCI_PL_16GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
#define PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK 0x0000000F
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4
/* Physical Layer 32.0 GT/s */
#define PCI_PL_32GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
/* Physical Layer 64.0 GT/s */
#define PCI_PL_64GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
/* Native PCIe Enclosure Management */
#define PCI_NPEM_CAP 0x04 /* NPEM capability register */
#define PCI_NPEM_CAP_CAPABLE 0x00000001 /* NPEM Capable */
File diff suppressed because it is too large Load Diff
+17 -1
View File
@@ -12,7 +12,7 @@
#define PIDFD_THREAD O_EXCL
#ifdef __KERNEL__
#include <linux/sched.h>
#define PIDFD_CLONE CLONE_PIDFD
#define PIDFD_STALE CLONE_PIDFD
#endif
/* Flags for pidfd_send_signal(). */
@@ -25,9 +25,23 @@
#define PIDFD_INFO_CREDS (1UL << 1) /* Always returned, even if not requested */
#define PIDFD_INFO_CGROUPID (1UL << 2) /* Always returned if available, even if not requested */
#define PIDFD_INFO_EXIT (1UL << 3) /* Only returned if requested. */
#define PIDFD_INFO_COREDUMP (1UL << 4) /* Only returned if requested. */
#define PIDFD_INFO_SIZE_VER0 64 /* sizeof first published struct */
/*
* Values for @coredump_mask in pidfd_info.
* Only valid if PIDFD_INFO_COREDUMP is set in @mask.
*
* Note, the @PIDFD_COREDUMP_ROOT flag indicates that the generated
* coredump should be treated as sensitive and access should only be
* granted to privileged users.
*/
#define PIDFD_COREDUMPED (1U << 0) /* Did crash and... */
#define PIDFD_COREDUMP_SKIP (1U << 1) /* coredumping generation was skipped. */
#define PIDFD_COREDUMP_USER (1U << 2) /* coredump was done as the user. */
#define PIDFD_COREDUMP_ROOT (1U << 3) /* coredump was done as root. */
/*
* The concept of process and threads in userland and the kernel is a confusing
* one - within the kernel every thread is a 'task' with its own individual PID,
@@ -92,6 +106,8 @@ struct pidfd_info {
__u32 fsuid;
__u32 fsgid;
__s32 exit_code;
__u32 coredump_mask;
__u32 __spare1;
};
#define PIDFS_IOCTL_MAGIC 0xFF
+3 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __LINUX_PKT_CLS_H
#define __LINUX_PKT_CLS_H
#ifndef _UAPI__LINUX_PKT_CLS_H
#define _UAPI__LINUX_PKT_CLS_H
#include <linux/types.h>
#include <linux/pkt_sched.h>
@@ -697,6 +697,7 @@ enum {
};
#define TCA_FLOWER_KEY_CFM_OPT_MAX (__TCA_FLOWER_KEY_CFM_OPT_MAX - 1)
#define TCA_FLOWER_KEY_CFM_MAX (__TCA_FLOWER_KEY_CFM_OPT_MAX - 1)
#define TCA_FLOWER_MASK_FLAGS_RANGE (1 << 0) /* Range-based match */
+3 -2
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __LINUX_PKT_SCHED_H
#define __LINUX_PKT_SCHED_H
#ifndef _UAPI__LINUX_PKT_SCHED_H
#define _UAPI__LINUX_PKT_SCHED_H
#include <linux/const.h>
#include <linux/types.h>
@@ -1182,6 +1182,7 @@ enum {
TCA_TAPRIO_ATTR_SCHED_SINGLE_ENTRY, /* single entry */
TCA_TAPRIO_ATTR_SCHED_CLOCKID, /* s32 */
TCA_TAPRIO_PAD,
TCA_TAPRIO_ATTR_PAD = TCA_TAPRIO_PAD,
TCA_TAPRIO_ATTR_ADMIN_SCHED, /* The admin sched, only used in dump */
TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME, /* s64 */
TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME_EXTENSION, /* s64 */
+7
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@@ -364,4 +364,11 @@ struct prctl_mm_map {
# define PR_TIMER_CREATE_RESTORE_IDS_ON 1
# define PR_TIMER_CREATE_RESTORE_IDS_GET 2
/* FUTEX hash management */
#define PR_FUTEX_HASH 78
# define PR_FUTEX_HASH_SET_SLOTS 1
# define FH_FLAG_IMMUTABLE (1ULL << 0)
# define PR_FUTEX_HASH_GET_SLOTS 2
# define PR_FUTEX_HASH_GET_IMMUTABLE 3
#endif /* _LINUX_PRCTL_H */
+6 -1
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@@ -74,6 +74,7 @@ struct seccomp_metadata {
};
#define PTRACE_GET_SYSCALL_INFO 0x420e
#define PTRACE_SET_SYSCALL_INFO 0x4212
#define PTRACE_SYSCALL_INFO_NONE 0
#define PTRACE_SYSCALL_INFO_ENTRY 1
#define PTRACE_SYSCALL_INFO_EXIT 2
@@ -81,7 +82,8 @@ struct seccomp_metadata {
struct ptrace_syscall_info {
__u8 op; /* PTRACE_SYSCALL_INFO_* */
__u8 pad[3];
__u8 reserved;
__u16 flags;
__u32 arch;
__u64 instruction_pointer;
__u64 stack_pointer;
@@ -98,6 +100,7 @@ struct ptrace_syscall_info {
__u64 nr;
__u64 args[6];
__u32 ret_data;
__u32 reserved2;
} seccomp;
};
};
@@ -142,6 +145,8 @@ struct ptrace_sud_config {
__u64 len;
};
/* 0x4212 is PTRACE_SET_SYSCALL_INFO */
/*
* These values are stored in task->ptrace_message
* by ptrace_stop to describe the current syscall-stop.
+65 -12
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@@ -36,26 +36,33 @@ struct sockaddr_rxrpc {
#define RXRPC_MIN_SECURITY_LEVEL 4 /* minimum security level */
#define RXRPC_UPGRADEABLE_SERVICE 5 /* Upgrade service[0] -> service[1] */
#define RXRPC_SUPPORTED_CMSG 6 /* Get highest supported control message type */
#define RXRPC_MANAGE_RESPONSE 7 /* [clnt] Want to manage RESPONSE packets */
/*
* RxRPC control messages
* - If neither abort or accept are specified, the message is a data message.
* - terminal messages mean that a user call ID tag can be recycled
* - C/S/- indicate whether these are applicable to client, server or both
* - s/r/- indicate whether these are applicable to sendmsg() and/or recvmsg()
*/
enum rxrpc_cmsg_type {
RXRPC_USER_CALL_ID = 1, /* sr: user call ID specifier */
RXRPC_ABORT = 2, /* sr: abort request / notification [terminal] */
RXRPC_ACK = 3, /* -r: [Service] RPC op final ACK received [terminal] */
RXRPC_NET_ERROR = 5, /* -r: network error received [terminal] */
RXRPC_BUSY = 6, /* -r: server busy received [terminal] */
RXRPC_LOCAL_ERROR = 7, /* -r: local error generated [terminal] */
RXRPC_NEW_CALL = 8, /* -r: [Service] new incoming call notification */
RXRPC_EXCLUSIVE_CALL = 10, /* s-: Call should be on exclusive connection */
RXRPC_UPGRADE_SERVICE = 11, /* s-: Request service upgrade for client call */
RXRPC_TX_LENGTH = 12, /* s-: Total length of Tx data */
RXRPC_SET_CALL_TIMEOUT = 13, /* s-: Set one or more call timeouts */
RXRPC_CHARGE_ACCEPT = 14, /* s-: Charge the accept pool with a user call ID */
RXRPC_USER_CALL_ID = 1, /* -sr: User call ID specifier */
RXRPC_ABORT = 2, /* -sr: Abort request / notification [terminal] */
RXRPC_ACK = 3, /* S-r: RPC op final ACK received [terminal] */
RXRPC_NET_ERROR = 5, /* --r: Network error received [terminal] */
RXRPC_BUSY = 6, /* C-r: Server busy received [terminal] */
RXRPC_LOCAL_ERROR = 7, /* --r: Local error generated [terminal] */
RXRPC_NEW_CALL = 8, /* S-r: New incoming call notification */
RXRPC_EXCLUSIVE_CALL = 10, /* Cs-: Call should be on exclusive connection */
RXRPC_UPGRADE_SERVICE = 11, /* Cs-: Request service upgrade for client call */
RXRPC_TX_LENGTH = 12, /* -s-: Total length of Tx data */
RXRPC_SET_CALL_TIMEOUT = 13, /* -s-: Set one or more call timeouts */
RXRPC_CHARGE_ACCEPT = 14, /* Ss-: Charge the accept pool with a user call ID */
RXRPC_OOB_ID = 15, /* -sr: OOB message ID */
RXRPC_CHALLENGED = 16, /* C-r: Info on a received CHALLENGE */
RXRPC_RESPOND = 17, /* Cs-: Respond to a challenge */
RXRPC_RESPONDED = 18, /* S-r: Data received in RESPONSE */
RXRPC_RESP_RXGK_APPDATA = 19, /* Cs-: RESPONSE: RxGK app data to include */
RXRPC__SUPPORTED
};
@@ -73,6 +80,7 @@ enum rxrpc_cmsg_type {
#define RXRPC_SECURITY_RXKAD 2 /* kaserver or kerberos 4 */
#define RXRPC_SECURITY_RXGK 4 /* gssapi-based */
#define RXRPC_SECURITY_RXK5 5 /* kerberos 5 */
#define RXRPC_SECURITY_YFS_RXGK 6 /* YFS gssapi-based */
/*
* RxRPC-level abort codes
@@ -118,4 +126,49 @@ enum rxrpc_cmsg_type {
#define RXKADDATALEN 19270411 /* user data too long */
#define RXKADILLEGALLEVEL 19270412 /* caller not authorised to use encrypted conns */
/*
* RxGK GSSAPI security abort codes.
*/
#if 0 /* Original standard abort codes (used by OpenAFS) */
#define RXGK_INCONSISTENCY 1233242880 /* Security module structure inconsistent */
#define RXGK_PACKETSHORT 1233242881 /* Packet too short for security challenge */
#define RXGK_BADCHALLENGE 1233242882 /* Invalid security challenge */
#define RXGK_BADETYPE 1233242883 /* Invalid or impermissible encryption type */
#define RXGK_BADLEVEL 1233242884 /* Invalid or impermissible security level */
#define RXGK_BADKEYNO 1233242885 /* Key version number not found */
#define RXGK_EXPIRED 1233242886 /* Token has expired */
#define RXGK_NOTAUTH 1233242887 /* Caller not authorized */
#define RXGK_BAD_TOKEN 1233242888 /* Security object was passed a bad token */
#define RXGK_SEALED_INCON 1233242889 /* Sealed data inconsistent */
#define RXGK_DATA_LEN 1233242890 /* User data too long */
#define RXGK_BAD_QOP 1233242891 /* Inadequate quality of protection available */
#else /* Revised standard abort codes (used by YFS) */
#define RXGK_INCONSISTENCY 1233242880 /* Security module structure inconsistent */
#define RXGK_PACKETSHORT 1233242881 /* Packet too short for security challenge */
#define RXGK_BADCHALLENGE 1233242882 /* Security challenge/response failed */
#define RXGK_SEALEDINCON 1233242883 /* Sealed data is inconsistent */
#define RXGK_NOTAUTH 1233242884 /* Caller not authorised */
#define RXGK_EXPIRED 1233242885 /* Authentication expired */
#define RXGK_BADLEVEL 1233242886 /* Unsupported or not permitted security level */
#define RXGK_BADKEYNO 1233242887 /* Bad transport key number */
#define RXGK_NOTRXGK 1233242888 /* Security layer is not rxgk */
#define RXGK_UNSUPPORTED 1233242889 /* Endpoint does not support rxgk */
#define RXGK_GSSERROR 1233242890 /* GSSAPI mechanism error */
#endif
/*
* Challenge information in the RXRPC_CHALLENGED control message.
*/
struct rxrpc_challenge {
__u16 service_id; /* The service ID of the connection (may be upgraded) */
__u8 security_index; /* The security index of the connection */
__u8 pad; /* Round out to a multiple of 4 bytes. */
/* ... The security class gets to append extra information ... */
};
struct rxgk_challenge {
struct rxrpc_challenge base;
__u32 enctype; /* Krb5 encoding type */
};
#endif /* _UAPI_LINUX_RXRPC_H */
+1
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@@ -188,6 +188,7 @@ enum
LINUX_MIB_PAWSESTABREJECTED, /* PAWSEstabRejected */
LINUX_MIB_TSECRREJECTED, /* TSEcrRejected */
LINUX_MIB_PAWS_OLD_ACK, /* PAWSOldAck */
LINUX_MIB_PAWS_TW_REJECTED, /* PAWSTimewait */
LINUX_MIB_DELAYEDACKS, /* DelayedACKs */
LINUX_MIB_DELAYEDACKLOCKED, /* DelayedACKLocked */
LINUX_MIB_DELAYEDACKLOST, /* DelayedACKLost */
+6 -2
View File
@@ -182,8 +182,12 @@ struct statx {
/* File offset alignment for direct I/O reads */
__u32 stx_dio_read_offset_align;
/* 0xb8 */
__u64 __spare3[9]; /* Spare space for future expansion */
/* Optimised max atomic write unit in bytes */
__u32 stx_atomic_write_unit_max_opt;
__u32 __spare2[1];
/* 0xc0 */
__u64 __spare3[8]; /* Spare space for future expansion */
/* 0x100 */
};
+29 -18
View File
@@ -34,7 +34,7 @@
*/
#define TASKSTATS_VERSION 15
#define TASKSTATS_VERSION 16
#define TS_COMM_LEN 32 /* should be >= TASK_COMM_LEN
* in linux/sched.h */
@@ -72,8 +72,6 @@ struct taskstats {
*/
__u64 cpu_count __attribute__((aligned(8)));
__u64 cpu_delay_total;
__u64 cpu_delay_max;
__u64 cpu_delay_min;
/* Following four fields atomically updated using task->delays->lock */
@@ -82,14 +80,10 @@ struct taskstats {
*/
__u64 blkio_count;
__u64 blkio_delay_total;
__u64 blkio_delay_max;
__u64 blkio_delay_min;
/* Delay waiting for page fault I/O (swap in only) */
__u64 swapin_count;
__u64 swapin_delay_total;
__u64 swapin_delay_max;
__u64 swapin_delay_min;
/* cpu "wall-clock" running time
* On some architectures, value will adjust for cpu time stolen
@@ -172,14 +166,11 @@ struct taskstats {
/* Delay waiting for memory reclaim */
__u64 freepages_count;
__u64 freepages_delay_total;
__u64 freepages_delay_max;
__u64 freepages_delay_min;
/* Delay waiting for thrashing page */
__u64 thrashing_count;
__u64 thrashing_delay_total;
__u64 thrashing_delay_max;
__u64 thrashing_delay_min;
/* v10: 64-bit btime to avoid overflow */
__u64 ac_btime64; /* 64-bit begin time */
@@ -187,8 +178,6 @@ struct taskstats {
/* v11: Delay waiting for memory compact */
__u64 compact_count;
__u64 compact_delay_total;
__u64 compact_delay_max;
__u64 compact_delay_min;
/* v12 begin */
__u32 ac_tgid; /* thread group ID */
@@ -210,15 +199,37 @@ struct taskstats {
/* v13: Delay waiting for write-protect copy */
__u64 wpcopy_count;
__u64 wpcopy_delay_total;
__u64 wpcopy_delay_max;
__u64 wpcopy_delay_min;
/* v14: Delay waiting for IRQ/SOFTIRQ */
__u64 irq_count;
__u64 irq_delay_total;
__u64 irq_delay_max;
__u64 irq_delay_min;
/* v15: add Delay max */
/* v15: add Delay max and Delay min */
/* v16: move Delay max and Delay min to the end of taskstat */
__u64 cpu_delay_max;
__u64 cpu_delay_min;
__u64 blkio_delay_max;
__u64 blkio_delay_min;
__u64 swapin_delay_max;
__u64 swapin_delay_min;
__u64 freepages_delay_max;
__u64 freepages_delay_min;
__u64 thrashing_delay_max;
__u64 thrashing_delay_min;
__u64 compact_delay_max;
__u64 compact_delay_min;
__u64 wpcopy_delay_max;
__u64 wpcopy_delay_min;
__u64 irq_delay_max;
__u64 irq_delay_min;
};
+1
View File
@@ -184,6 +184,7 @@ enum tcp_fastopen_client_fail {
#define TCPI_OPT_ECN_SEEN 16 /* we received at least one packet with ECT */
#define TCPI_OPT_SYN_DATA 32 /* SYN-ACK acked data in SYN sent or rcvd */
#define TCPI_OPT_USEC_TS 64 /* usec timestamps */
#define TCPI_OPT_TFO_CHILD 128 /* child from a Fast Open option on SYN */
/*
* Sender's congestion state indicating normal or abnormal situations
+1
View File
@@ -36,5 +36,6 @@ struct tiocl_selection {
#define TIOCL_BLANKSCREEN 14 /* keep screen blank even if a key is pressed */
#define TIOCL_BLANKEDSCREEN 15 /* return which vt was blanked */
#define TIOCL_GETKMSGREDIRECT 17 /* get the vt the kernel messages are restricted to */
#define TIOCL_GETBRACKETEDPASTE 18 /* get whether paste may be bracketed */
#endif /* _LINUX_TIOCL_H */
+137
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@@ -51,6 +51,10 @@
_IOR('u', 0x13, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_DEL_DEV_ASYNC \
_IOR('u', 0x14, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_UPDATE_SIZE \
_IOWR('u', 0x15, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_QUIESCE_DEV \
_IOWR('u', 0x16, struct ublksrv_ctrl_cmd)
/*
* 64bits are enough now, and it should be easy to extend in case of
@@ -211,6 +215,72 @@
*/
#define UBLK_F_USER_RECOVERY_FAIL_IO (1ULL << 9)
/*
* Resizing a block device is possible with UBLK_U_CMD_UPDATE_SIZE
* New size is passed in cmd->data[0] and is in units of sectors
*/
#define UBLK_F_UPDATE_SIZE (1ULL << 10)
/*
* request buffer is registered automatically to uring_cmd's io_uring
* context before delivering this io command to ublk server, meantime
* it is un-registered automatically when completing this io command.
*
* For using this feature:
*
* - ublk server has to create sparse buffer table on the same `io_ring_ctx`
* for issuing `UBLK_IO_FETCH_REQ` and `UBLK_IO_COMMIT_AND_FETCH_REQ`.
* If uring_cmd isn't issued on same `io_ring_ctx`, it is ublk server's
* responsibility to unregister the buffer by issuing `IO_UNREGISTER_IO_BUF`
* manually, otherwise this ublk request won't complete.
*
* - ublk server passes auto buf register data via uring_cmd's sqe->addr,
* `struct ublk_auto_buf_reg` is populated from sqe->addr, please see
* the definition of ublk_sqe_addr_to_auto_buf_reg()
*
* - pass buffer index from `ublk_auto_buf_reg.index`
*
* - all reserved fields in `ublk_auto_buf_reg` need to be zeroed
*
* - pass flags from `ublk_auto_buf_reg.flags` if needed
*
* This way avoids extra cost from two uring_cmd, but also simplifies backend
* implementation, such as, the dependency on IO_REGISTER_IO_BUF and
* IO_UNREGISTER_IO_BUF becomes not necessary.
*
* If wrong data or flags are provided, both IO_FETCH_REQ and
* IO_COMMIT_AND_FETCH_REQ are failed, for the latter, the ublk IO request
* won't be completed until new IO_COMMIT_AND_FETCH_REQ command is issued
* successfully
*/
#define UBLK_F_AUTO_BUF_REG (1ULL << 11)
/*
* Control command `UBLK_U_CMD_QUIESCE_DEV` is added for quiescing device,
* which state can be transitioned to `UBLK_S_DEV_QUIESCED` or
* `UBLK_S_DEV_FAIL_IO` finally, and it needs ublk server cooperation for
* handling `UBLK_IO_RES_ABORT` correctly.
*
* Typical use case is for supporting to upgrade ublk server application,
* meantime keep ublk block device persistent during the period.
*
* This feature is only available when UBLK_F_USER_RECOVERY is enabled.
*
* Note, this command returns -EBUSY in case that all IO commands are being
* handled by ublk server and not completed in specified time period which
* is passed from the control command parameter.
*/
#define UBLK_F_QUIESCE (1ULL << 12)
/*
* If this feature is set, ublk_drv supports each (qid,tag) pair having
* its own independent daemon task that is responsible for handling it.
* If it is not set, daemons are per-queue instead, so for two pairs
* (qid1,tag1) and (qid2,tag2), if qid1 == qid2, then the same task must
* be responsible for handling (qid1,tag1) and (qid2,tag2).
*/
#define UBLK_F_PER_IO_DAEMON (1ULL << 13)
/* device state */
#define UBLK_S_DEV_DEAD 0
#define UBLK_S_DEV_LIVE 1
@@ -297,6 +367,17 @@ struct ublksrv_ctrl_dev_info {
#define UBLK_IO_F_FUA (1U << 13)
#define UBLK_IO_F_NOUNMAP (1U << 15)
#define UBLK_IO_F_SWAP (1U << 16)
/*
* For UBLK_F_AUTO_BUF_REG & UBLK_AUTO_BUF_REG_FALLBACK only.
*
* This flag is set if auto buffer register is failed & ublk server passes
* UBLK_AUTO_BUF_REG_FALLBACK, and ublk server need to register buffer
* manually for handling the delivered IO command if this flag is observed
*
* ublk server has to check this flag if UBLK_AUTO_BUF_REG_FALLBACK is
* passed in.
*/
#define UBLK_IO_F_NEED_REG_BUF (1U << 17)
/*
* io cmd is described by this structure, and stored in share memory, indexed
@@ -331,6 +412,62 @@ static inline __u32 ublksrv_get_flags(const struct ublksrv_io_desc *iod)
return iod->op_flags >> 8;
}
/*
* If this flag is set, fallback by completing the uring_cmd and setting
* `UBLK_IO_F_NEED_REG_BUF` in case of auto-buf-register failure;
* otherwise the client ublk request is failed silently
*
* If ublk server passes this flag, it has to check if UBLK_IO_F_NEED_REG_BUF
* is set in `ublksrv_io_desc.op_flags`. If UBLK_IO_F_NEED_REG_BUF is set,
* ublk server needs to register io buffer manually for handling IO command.
*/
#define UBLK_AUTO_BUF_REG_FALLBACK (1 << 0)
#define UBLK_AUTO_BUF_REG_F_MASK UBLK_AUTO_BUF_REG_FALLBACK
struct ublk_auto_buf_reg {
/* index for registering the delivered request buffer */
__u16 index;
__u8 flags;
__u8 reserved0;
/*
* io_ring FD can be passed via the reserve field in future for
* supporting to register io buffer to external io_uring
*/
__u32 reserved1;
};
/*
* For UBLK_F_AUTO_BUF_REG, auto buffer register data is carried via
* uring_cmd's sqe->addr:
*
* - bit0 ~ bit15: buffer index
* - bit16 ~ bit23: flags
* - bit24 ~ bit31: reserved0
* - bit32 ~ bit63: reserved1
*/
static inline struct ublk_auto_buf_reg ublk_sqe_addr_to_auto_buf_reg(
__u64 sqe_addr)
{
struct ublk_auto_buf_reg reg = {
.index = sqe_addr & 0xffff,
.flags = (sqe_addr >> 16) & 0xff,
.reserved0 = (sqe_addr >> 24) & 0xff,
.reserved1 = sqe_addr >> 32,
};
return reg;
}
static inline __u64
ublk_auto_buf_reg_to_sqe_addr(const struct ublk_auto_buf_reg *buf)
{
__u64 addr = buf->index | (__u64)buf->flags << 16 | (__u64)buf->reserved0 << 24 |
(__u64)buf->reserved1 << 32;
return addr;
}
/* issued to ublk driver via /dev/ublkcN */
struct ublksrv_io_cmd {
__u16 q_id;
+1
View File
@@ -43,5 +43,6 @@ struct udphdr {
#define UDP_ENCAP_GTP1U 5 /* 3GPP TS 29.060 */
#define UDP_ENCAP_RXRPC 6
#define TCP_ENCAP_ESPINTCP 7 /* Yikes, this is really xfrm encap types. */
#define UDP_ENCAP_OVPNINUDP 8 /* OpenVPN traffic */
#endif /* _UAPI_LINUX_UDP_H */
+16 -2
View File
@@ -153,10 +153,18 @@ enum v4l2_buf_type {
V4L2_BUF_TYPE_SDR_OUTPUT = 12,
V4L2_BUF_TYPE_META_CAPTURE = 13,
V4L2_BUF_TYPE_META_OUTPUT = 14,
/*
* Note: V4L2_TYPE_IS_VALID and V4L2_TYPE_IS_OUTPUT must
* be updated if a new type is added.
*/
/* Deprecated, do not use */
V4L2_BUF_TYPE_PRIVATE = 0x80,
};
#define V4L2_TYPE_IS_VALID(type) \
((type) >= V4L2_BUF_TYPE_VIDEO_CAPTURE &&\
(type) <= V4L2_BUF_TYPE_META_OUTPUT)
#define V4L2_TYPE_IS_MULTIPLANAR(type) \
((type) == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE \
|| (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
@@ -164,14 +172,14 @@ enum v4l2_buf_type {
#define V4L2_TYPE_IS_OUTPUT(type) \
((type) == V4L2_BUF_TYPE_VIDEO_OUTPUT \
|| (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE \
|| (type) == V4L2_BUF_TYPE_VIDEO_OVERLAY \
|| (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY \
|| (type) == V4L2_BUF_TYPE_VBI_OUTPUT \
|| (type) == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT \
|| (type) == V4L2_BUF_TYPE_SDR_OUTPUT \
|| (type) == V4L2_BUF_TYPE_META_OUTPUT)
#define V4L2_TYPE_IS_CAPTURE(type) (!V4L2_TYPE_IS_OUTPUT(type))
#define V4L2_TYPE_IS_CAPTURE(type) \
(V4L2_TYPE_IS_VALID(type) && !V4L2_TYPE_IS_OUTPUT(type))
enum v4l2_tuner_type {
V4L2_TUNER_RADIO = 1,
@@ -643,8 +651,10 @@ struct v4l2_pix_format {
/* two planes -- one Y, one Cr + Cb interleaved */
#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */
#define V4L2_PIX_FMT_NV15 v4l2_fourcc('N', 'V', '1', '5') /* 15 Y/CbCr 4:2:0 10-bit packed */
#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */
#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */
#define V4L2_PIX_FMT_NV20 v4l2_fourcc('N', 'V', '2', '0') /* 20 Y/CbCr 4:2:2 10-bit packed */
#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
#define V4L2_PIX_FMT_P010 v4l2_fourcc('P', '0', '1', '0') /* 24 Y/CbCr 4:2:0 10-bit per component */
@@ -858,6 +868,10 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_RK_ISP1_STAT_3A v4l2_fourcc('R', 'K', '1', 'S') /* Rockchip ISP1 3A Statistics */
#define V4L2_META_FMT_RK_ISP1_EXT_PARAMS v4l2_fourcc('R', 'K', '1', 'E') /* Rockchip ISP1 3a Extensible Parameters */
/* Vendor specific - used for C3_ISP */
#define V4L2_META_FMT_C3ISP_PARAMS v4l2_fourcc('C', '3', 'P', 'M') /* Amlogic C3 ISP Parameters */
#define V4L2_META_FMT_C3ISP_STATS v4l2_fourcc('C', '3', 'S', 'T') /* Amlogic C3 ISP Statistics */
/* Vendor specific - used for RaspberryPi PiSP */
#define V4L2_META_FMT_RPI_BE_CFG v4l2_fourcc('R', 'P', 'B', 'C') /* PiSP BE configuration */
#define V4L2_META_FMT_RPI_FE_CFG v4l2_fourcc('R', 'P', 'F', 'C') /* PiSP FE configuration */
+2 -1
View File
@@ -309,8 +309,9 @@ struct virtio_gpu_cmd_submit {
#define VIRTIO_GPU_CAPSET_VIRGL 1
#define VIRTIO_GPU_CAPSET_VIRGL2 2
/* 3 is reserved for gfxstream */
#define VIRTIO_GPU_CAPSET_GFXSTREAM_VULKAN 3
#define VIRTIO_GPU_CAPSET_VENUS 4
#define VIRTIO_GPU_CAPSET_CROSS_DOMAIN 5
#define VIRTIO_GPU_CAPSET_DRM 6
/* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
+237
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@@ -0,0 +1,237 @@
/* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
/*
* Copyright (C) 2022-2024 OpenSynergy GmbH
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _LINUX_VIRTIO_RTC_H
#define _LINUX_VIRTIO_RTC_H
#include <linux/types.h>
/* alarm feature */
#define VIRTIO_RTC_F_ALARM 0
/* read request message types */
#define VIRTIO_RTC_REQ_READ 0x0001
#define VIRTIO_RTC_REQ_READ_CROSS 0x0002
/* control request message types */
#define VIRTIO_RTC_REQ_CFG 0x1000
#define VIRTIO_RTC_REQ_CLOCK_CAP 0x1001
#define VIRTIO_RTC_REQ_CROSS_CAP 0x1002
#define VIRTIO_RTC_REQ_READ_ALARM 0x1003
#define VIRTIO_RTC_REQ_SET_ALARM 0x1004
#define VIRTIO_RTC_REQ_SET_ALARM_ENABLED 0x1005
/* alarmq message types */
#define VIRTIO_RTC_NOTIF_ALARM 0x2000
/* Message headers */
/** common request header */
struct virtio_rtc_req_head {
__le16 msg_type;
__u8 reserved[6];
};
/** common response header */
struct virtio_rtc_resp_head {
#define VIRTIO_RTC_S_OK 0
#define VIRTIO_RTC_S_EOPNOTSUPP 2
#define VIRTIO_RTC_S_ENODEV 3
#define VIRTIO_RTC_S_EINVAL 4
#define VIRTIO_RTC_S_EIO 5
__u8 status;
__u8 reserved[7];
};
/** common notification header */
struct virtio_rtc_notif_head {
__le16 msg_type;
__u8 reserved[6];
};
/* read requests */
/* VIRTIO_RTC_REQ_READ message */
struct virtio_rtc_req_read {
struct virtio_rtc_req_head head;
__le16 clock_id;
__u8 reserved[6];
};
struct virtio_rtc_resp_read {
struct virtio_rtc_resp_head head;
__le64 clock_reading;
};
/* VIRTIO_RTC_REQ_READ_CROSS message */
struct virtio_rtc_req_read_cross {
struct virtio_rtc_req_head head;
__le16 clock_id;
/* Arm Generic Timer Counter-timer Virtual Count Register (CNTVCT_EL0) */
#define VIRTIO_RTC_COUNTER_ARM_VCT 0
/* x86 Time-Stamp Counter */
#define VIRTIO_RTC_COUNTER_X86_TSC 1
/* Invalid */
#define VIRTIO_RTC_COUNTER_INVALID 0xFF
__u8 hw_counter;
__u8 reserved[5];
};
struct virtio_rtc_resp_read_cross {
struct virtio_rtc_resp_head head;
__le64 clock_reading;
__le64 counter_cycles;
};
/* control requests */
/* VIRTIO_RTC_REQ_CFG message */
struct virtio_rtc_req_cfg {
struct virtio_rtc_req_head head;
/* no request params */
};
struct virtio_rtc_resp_cfg {
struct virtio_rtc_resp_head head;
/** # of clocks -> clock ids < num_clocks are valid */
__le16 num_clocks;
__u8 reserved[6];
};
/* VIRTIO_RTC_REQ_CLOCK_CAP message */
struct virtio_rtc_req_clock_cap {
struct virtio_rtc_req_head head;
__le16 clock_id;
__u8 reserved[6];
};
struct virtio_rtc_resp_clock_cap {
struct virtio_rtc_resp_head head;
#define VIRTIO_RTC_CLOCK_UTC 0
#define VIRTIO_RTC_CLOCK_TAI 1
#define VIRTIO_RTC_CLOCK_MONOTONIC 2
#define VIRTIO_RTC_CLOCK_UTC_SMEARED 3
#define VIRTIO_RTC_CLOCK_UTC_MAYBE_SMEARED 4
__u8 type;
#define VIRTIO_RTC_SMEAR_UNSPECIFIED 0
#define VIRTIO_RTC_SMEAR_NOON_LINEAR 1
#define VIRTIO_RTC_SMEAR_UTC_SLS 2
__u8 leap_second_smearing;
#define VIRTIO_RTC_FLAG_ALARM_CAP (1 << 0)
__u8 flags;
__u8 reserved[5];
};
/* VIRTIO_RTC_REQ_CROSS_CAP message */
struct virtio_rtc_req_cross_cap {
struct virtio_rtc_req_head head;
__le16 clock_id;
__u8 hw_counter;
__u8 reserved[5];
};
struct virtio_rtc_resp_cross_cap {
struct virtio_rtc_resp_head head;
#define VIRTIO_RTC_FLAG_CROSS_CAP (1 << 0)
__u8 flags;
__u8 reserved[7];
};
/* VIRTIO_RTC_REQ_READ_ALARM message */
struct virtio_rtc_req_read_alarm {
struct virtio_rtc_req_head head;
__le16 clock_id;
__u8 reserved[6];
};
struct virtio_rtc_resp_read_alarm {
struct virtio_rtc_resp_head head;
__le64 alarm_time;
#define VIRTIO_RTC_FLAG_ALARM_ENABLED (1 << 0)
__u8 flags;
__u8 reserved[7];
};
/* VIRTIO_RTC_REQ_SET_ALARM message */
struct virtio_rtc_req_set_alarm {
struct virtio_rtc_req_head head;
__le64 alarm_time;
__le16 clock_id;
/* flag VIRTIO_RTC_FLAG_ALARM_ENABLED */
__u8 flags;
__u8 reserved[5];
};
struct virtio_rtc_resp_set_alarm {
struct virtio_rtc_resp_head head;
/* no response params */
};
/* VIRTIO_RTC_REQ_SET_ALARM_ENABLED message */
struct virtio_rtc_req_set_alarm_enabled {
struct virtio_rtc_req_head head;
__le16 clock_id;
/* flag VIRTIO_RTC_ALARM_ENABLED */
__u8 flags;
__u8 reserved[5];
};
struct virtio_rtc_resp_set_alarm_enabled {
struct virtio_rtc_resp_head head;
/* no response params */
};
/** Union of request types for requestq */
union virtio_rtc_req_requestq {
struct virtio_rtc_req_read read;
struct virtio_rtc_req_read_cross read_cross;
struct virtio_rtc_req_cfg cfg;
struct virtio_rtc_req_clock_cap clock_cap;
struct virtio_rtc_req_cross_cap cross_cap;
struct virtio_rtc_req_read_alarm read_alarm;
struct virtio_rtc_req_set_alarm set_alarm;
struct virtio_rtc_req_set_alarm_enabled set_alarm_enabled;
};
/** Union of response types for requestq */
union virtio_rtc_resp_requestq {
struct virtio_rtc_resp_read read;
struct virtio_rtc_resp_read_cross read_cross;
struct virtio_rtc_resp_cfg cfg;
struct virtio_rtc_resp_clock_cap clock_cap;
struct virtio_rtc_resp_cross_cap cross_cap;
struct virtio_rtc_resp_read_alarm read_alarm;
struct virtio_rtc_resp_set_alarm set_alarm;
struct virtio_rtc_resp_set_alarm_enabled set_alarm_enabled;
};
/* alarmq notifications */
/* VIRTIO_RTC_NOTIF_ALARM notification */
struct virtio_rtc_notif_alarm {
struct virtio_rtc_notif_head head;
__le16 clock_id;
__u8 reserved[6];
};
/** Union of notification types for alarmq */
union virtio_rtc_notif_alarmq {
struct virtio_rtc_notif_alarm alarm;
};
#endif /* _LINUX_VIRTIO_RTC_H */
+11
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@@ -2,6 +2,8 @@
#ifndef _UAPI_LINUX_VT_H
#define _UAPI_LINUX_VT_H
#include <linux/ioctl.h>
#include <linux/types.h>
/*
* These constants are also useful for user-level apps (e.g., VC
@@ -84,4 +86,13 @@ struct vt_setactivate {
#define VT_SETACTIVATE 0x560F /* Activate and set the mode of a console */
/* get console size and cursor position */
struct vt_consizecsrpos {
__u16 con_rows; /* number of console rows */
__u16 con_cols; /* number of console columns */
__u16 csr_row; /* current cursor's row */
__u16 csr_col; /* current cursor's column */
};
#define VT_GETCONSIZECSRPOS _IOR('V', 0x10, struct vt_consizecsrpos)
#endif /* _UAPI_LINUX_VT_H */
+9
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@@ -101,6 +101,10 @@
* WGALLOWEDIP_A_FAMILY: NLA_U16
* WGALLOWEDIP_A_IPADDR: struct in_addr or struct in6_addr
* WGALLOWEDIP_A_CIDR_MASK: NLA_U8
* WGALLOWEDIP_A_FLAGS: NLA_U32, WGALLOWEDIP_F_REMOVE_ME if
* the specified IP should be removed;
* otherwise, this IP will be added if
* it is not already present.
* 0: NLA_NESTED
* ...
* 0: NLA_NESTED
@@ -184,11 +188,16 @@ enum wgpeer_attribute {
};
#define WGPEER_A_MAX (__WGPEER_A_LAST - 1)
enum wgallowedip_flag {
WGALLOWEDIP_F_REMOVE_ME = 1U << 0,
__WGALLOWEDIP_F_ALL = WGALLOWEDIP_F_REMOVE_ME
};
enum wgallowedip_attribute {
WGALLOWEDIP_A_UNSPEC,
WGALLOWEDIP_A_FAMILY,
WGALLOWEDIP_A_IPADDR,
WGALLOWEDIP_A_CIDR_MASK,
WGALLOWEDIP_A_FLAGS,
__WGALLOWEDIP_A_LAST
};
#define WGALLOWEDIP_A_MAX (__WGALLOWEDIP_A_LAST - 1)
+152
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@@ -0,0 +1,152 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (C) 2021-2024 Advanced Micro Devices, Inc.
*/
#ifndef _AMD_APML_H_
#define _AMD_APML_H_
#include <linux/types.h>
/* Mailbox data size for data_in and data_out */
#define AMD_SBI_MB_DATA_SIZE 4
struct apml_mbox_msg {
/*
* Mailbox Message ID
*/
__u32 cmd;
/*
* [0]...[3] mailbox 32bit input/output data
*/
__u32 mb_in_out;
/*
* Error code is returned in case of soft mailbox error
*/
__u32 fw_ret_code;
};
struct apml_cpuid_msg {
/*
* CPUID input
* [0]...[3] cpuid func,
* [4][5] cpuid: thread
* [6] cpuid: ext function & read eax/ebx or ecx/edx
* [7:0] -> bits [7:4] -> ext function &
* bit [0] read eax/ebx or ecx/edx
* CPUID output
*/
__u64 cpu_in_out;
/*
* Status code for CPUID read
*/
__u32 fw_ret_code;
__u32 pad;
};
struct apml_mcamsr_msg {
/*
* MCAMSR input
* [0]...[3] mca msr func,
* [4][5] thread
* MCAMSR output
*/
__u64 mcamsr_in_out;
/*
* Status code for MCA/MSR access
*/
__u32 fw_ret_code;
__u32 pad;
};
struct apml_reg_xfer_msg {
/*
* RMI register address offset
*/
__u16 reg_addr;
/*
* Register data for read/write
*/
__u8 data_in_out;
/*
* Register read or write
*/
__u8 rflag;
};
/*
* AMD sideband interface base IOCTL
*/
#define SB_BASE_IOCTL_NR 0xF9
/**
* DOC: SBRMI_IOCTL_MBOX_CMD
*
* @Parameters
*
* @struct apml_mbox_msg
* Pointer to the &struct apml_mbox_msg that will contain the protocol
* information
*
* @Description
* IOCTL command for APML messages using generic _IOWR
* The IOCTL provides userspace access to AMD sideband mailbox protocol
* - Mailbox message read/write(0x0~0xFF)
* - returning "-EFAULT" if none of the above
* "-EPROTOTYPE" error is returned to provide additional error details
*/
#define SBRMI_IOCTL_MBOX_CMD _IOWR(SB_BASE_IOCTL_NR, 0, struct apml_mbox_msg)
/**
* DOC: SBRMI_IOCTL_CPUID_CMD
*
* @Parameters
*
* @struct apml_cpuid_msg
* Pointer to the &struct apml_cpuid_msg that will contain the protocol
* information
*
* @Description
* IOCTL command for APML messages using generic _IOWR
* The IOCTL provides userspace access to AMD sideband cpuid protocol
* - CPUID protocol to get CPU details for Function/Ext Function
* at thread level
* - returning "-EFAULT" if none of the above
* "-EPROTOTYPE" error is returned to provide additional error details
*/
#define SBRMI_IOCTL_CPUID_CMD _IOWR(SB_BASE_IOCTL_NR, 1, struct apml_cpuid_msg)
/**
* DOC: SBRMI_IOCTL_MCAMSR_CMD
*
* @Parameters
*
* @struct apml_mcamsr_msg
* Pointer to the &struct apml_mcamsr_msg that will contain the protocol
* information
*
* @Description
* IOCTL command for APML messages using generic _IOWR
* The IOCTL provides userspace access to AMD sideband MCAMSR protocol
* - MCAMSR protocol to get MCA bank details for Function at thread level
* - returning "-EFAULT" if none of the above
* "-EPROTOTYPE" error is returned to provide additional error details
*/
#define SBRMI_IOCTL_MCAMSR_CMD _IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mcamsr_msg)
/**
* DOC: SBRMI_IOCTL_REG_XFER_CMD
*
* @Parameters
*
* @struct apml_reg_xfer_msg
* Pointer to the &struct apml_reg_xfer_msg that will contain the protocol
* information
*
* @Description
* IOCTL command for APML messages using generic _IOWR
* The IOCTL provides userspace access to AMD sideband register xfer protocol
* - Register xfer protocol to get/set hardware register for given offset
*/
#define SBRMI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 3, struct apml_reg_xfer_msg)
#endif /*_AMD_APML_H_*/
+16
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@@ -233,6 +233,22 @@ struct ib_uverbs_ex_query_device {
__u32 reserved;
};
enum ib_uverbs_odp_general_cap_bits {
IB_UVERBS_ODP_SUPPORT = 1 << 0,
IB_UVERBS_ODP_SUPPORT_IMPLICIT = 1 << 1,
};
enum ib_uverbs_odp_transport_cap_bits {
IB_UVERBS_ODP_SUPPORT_SEND = 1 << 0,
IB_UVERBS_ODP_SUPPORT_RECV = 1 << 1,
IB_UVERBS_ODP_SUPPORT_WRITE = 1 << 2,
IB_UVERBS_ODP_SUPPORT_READ = 1 << 3,
IB_UVERBS_ODP_SUPPORT_ATOMIC = 1 << 4,
IB_UVERBS_ODP_SUPPORT_SRQ_RECV = 1 << 5,
IB_UVERBS_ODP_SUPPORT_FLUSH = 1 << 6,
IB_UVERBS_ODP_SUPPORT_ATOMIC_WRITE = 1 << 7,
};
struct ib_uverbs_odp_caps {
__aligned_u64 general_caps;
struct {