Merge tag 'misc-habanalabs-next-2020-09-22' of git://people.freedesktop.org/~gabbayo/linux into char-misc-next
Oded writes: This tag contains the following changes for kernel 5.10-rc1: - Stop using the DRM's dma-fence module and instead use kernel completions. - Support PCIe AER - Use dma_mmap_coherent for memory allocated using dma_alloc_coherent - Use smallest possible alignment when allocating virtual addresses in our MMU driver. - Refactor MMU driver code to be device-oriented - Allow user to check CS status without any sleep - Add an option to map a Command Buffer to the Device's MMU - Expose sync manager resource allocation to user through INFO IOCTL - Convert code to use standard BIT(), GENMASK() and FIELD_PREP() - Many small fixes (casting, better error messages, remove unused defines, h/w configuration fixes, etc.) * tag 'misc-habanalabs-next-2020-09-22' of git://people.freedesktop.org/~gabbayo/linux: (46 commits) habanalabs: update scratchpad register map habanalabs: add indication of security-enabled F/W habanalabs/gaudi: fix DMA completions max outstanding to 15 habanalabs/gaudi: remove axi drain support habanalabs: update firmware interface file habanalabs: Add an option to map CB to device MMU habanalabs: Save context in a command buffer object habanalabs: no need for DMA_SHARED_BUFFER habanalabs: allow to wait on CS without sleep habanalabs/gaudi: increase timeout for boot fit load habanalabs: add debugfs support for MMU with 6 HOPs habanalabs: add num_hops to hl_mmu_properties habanalabs: refactor MMU as device-oriented habanalabs: rename mmu.c to mmu_v1.c habanalabs: use smallest possible alignment for virtual addresses habanalabs: check flag before reset because of f/w event habanalabs: increase PQ COMP_OFFSET by one nibble habanalabs: Fix alignment issue in cpucp_info structure habanalabs: remove unused define habanalabs: remove unused ASIC function pointer ...
This commit is contained in:
@@ -264,6 +264,10 @@ enum hl_device_status {
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* HL_INFO_TIME_SYNC - Retrieve the device's time alongside the host's time
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* for synchronization.
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* HL_INFO_CS_COUNTERS - Retrieve command submission counters
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* HL_INFO_PCI_COUNTERS - Retrieve PCI counters
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* HL_INFO_CLK_THROTTLE_REASON - Retrieve clock throttling reason
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* HL_INFO_SYNC_MANAGER - Retrieve sync manager info per dcore
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* HL_INFO_TOTAL_ENERGY - Retrieve total energy consumption
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*/
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#define HL_INFO_HW_IP_INFO 0
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#define HL_INFO_HW_EVENTS 1
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@@ -276,6 +280,10 @@ enum hl_device_status {
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#define HL_INFO_RESET_COUNT 9
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#define HL_INFO_TIME_SYNC 10
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#define HL_INFO_CS_COUNTERS 11
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#define HL_INFO_PCI_COUNTERS 12
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#define HL_INFO_CLK_THROTTLE_REASON 13
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#define HL_INFO_SYNC_MANAGER 14
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#define HL_INFO_TOTAL_ENERGY 15
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#define HL_INFO_VERSION_MAX_LEN 128
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#define HL_INFO_CARD_NAME_MAX_LEN 16
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@@ -289,7 +297,7 @@ struct hl_info_hw_ip_info {
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__u32 device_id; /* PCI Device ID */
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__u32 module_id; /* For mezzanine cards in servers (From OCP spec.) */
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__u32 reserved[2];
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__u32 armcp_cpld_version;
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__u32 cpld_version;
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__u32 psoc_pci_pll_nr;
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__u32 psoc_pci_pll_nf;
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__u32 psoc_pci_pll_od;
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@@ -297,7 +305,7 @@ struct hl_info_hw_ip_info {
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__u8 tpc_enabled_mask;
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__u8 dram_enabled;
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__u8 pad[2];
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__u8 armcp_version[HL_INFO_VERSION_MAX_LEN];
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__u8 cpucp_version[HL_INFO_VERSION_MAX_LEN];
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__u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
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};
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@@ -313,6 +321,12 @@ struct hl_info_hw_idle {
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* Bits definition is according to `enum <chip>_enging_id'.
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*/
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__u32 busy_engines_mask;
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/*
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* Extended Bitmask of busy engines.
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* Bits definition is according to `enum <chip>_enging_id'.
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*/
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__u64 busy_engines_mask_ext;
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};
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struct hl_info_device_status {
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@@ -340,18 +354,61 @@ struct hl_info_time_sync {
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__u64 host_time;
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};
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/**
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* struct hl_info_pci_counters - pci counters
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* @rx_throughput: PCI rx throughput KBps
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* @tx_throughput: PCI tx throughput KBps
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* @replay_cnt: PCI replay counter
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*/
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struct hl_info_pci_counters {
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__u64 rx_throughput;
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__u64 tx_throughput;
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__u64 replay_cnt;
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};
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#define HL_CLK_THROTTLE_POWER 0x1
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#define HL_CLK_THROTTLE_THERMAL 0x2
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/**
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* struct hl_info_clk_throttle - clock throttling reason
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* @clk_throttling_reason: each bit represents a clk throttling reason
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*/
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struct hl_info_clk_throttle {
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__u32 clk_throttling_reason;
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};
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/**
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* struct hl_info_energy - device energy information
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* @total_energy_consumption: total device energy consumption
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*/
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struct hl_info_energy {
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__u64 total_energy_consumption;
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};
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/**
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* struct hl_info_sync_manager - sync manager information
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* @first_available_sync_object: first available sob
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* @first_available_monitor: first available monitor
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*/
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struct hl_info_sync_manager {
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__u32 first_available_sync_object;
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__u32 first_available_monitor;
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};
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/**
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* struct hl_info_cs_counters - command submission counters
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* @out_of_mem_drop_cnt: dropped due to memory allocation issue
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* @parsing_drop_cnt: dropped due to error in packet parsing
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* @queue_full_drop_cnt: dropped due to queue full
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* @device_in_reset_drop_cnt: dropped due to device in reset
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* @max_cs_in_flight_drop_cnt: dropped due to maximum CS in-flight
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*/
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struct hl_cs_counters {
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__u64 out_of_mem_drop_cnt;
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__u64 parsing_drop_cnt;
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__u64 queue_full_drop_cnt;
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__u64 device_in_reset_drop_cnt;
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__u64 max_cs_in_flight_drop_cnt;
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};
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struct hl_info_cs_counters {
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@@ -359,6 +416,13 @@ struct hl_info_cs_counters {
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struct hl_cs_counters ctx_cs_counters;
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};
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enum gaudi_dcores {
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HL_GAUDI_WS_DCORE,
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HL_GAUDI_WN_DCORE,
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HL_GAUDI_EN_DCORE,
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HL_GAUDI_ES_DCORE
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};
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struct hl_info_args {
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/* Location of relevant struct in userspace */
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__u64 return_pointer;
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@@ -375,6 +439,10 @@ struct hl_info_args {
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__u32 op;
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union {
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/* Dcore id for which the information is relevant.
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* For Gaudi refer to 'enum gaudi_dcores'
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*/
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__u32 dcore_id;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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/* Period value for utilization rate (100ms - 1000ms, in 100ms
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@@ -394,6 +462,9 @@ struct hl_info_args {
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/* 2MB minus 32 bytes for 2xMSG_PROT */
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#define HL_MAX_CB_SIZE (0x200000 - 32)
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/* Indicates whether the command buffer should be mapped to the device's MMU */
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#define HL_CB_FLAGS_MAP 0x1
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struct hl_cb_in {
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/* Handle of CB or 0 if we want to create one */
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__u64 cb_handle;
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@@ -405,7 +476,8 @@ struct hl_cb_in {
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__u32 cb_size;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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__u32 pad;
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/* HL_CB_FLAGS_* */
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__u32 flags;
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};
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struct hl_cb_out {
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@@ -788,6 +860,12 @@ struct hl_debug_args {
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* When creating a new CB, the IOCTL returns a handle of it, and the user-space
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* process needs to use that handle to mmap the buffer so it can access them.
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*
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* In some instances, the device must access the command buffer through the
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* device's MMU, and thus its memory should be mapped. In these cases, user can
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* indicate the driver that such a mapping is required.
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* The resulting device virtual address will be used internally by the driver,
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* and won't be returned to user.
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*
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*/
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#define HL_IOCTL_CB \
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_IOWR('H', 0x02, union hl_cb_args)
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@@ -846,6 +924,9 @@ struct hl_debug_args {
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* inside the kernel until the CS has finished or until the user-requested
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* timeout has expired.
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*
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* If the timeout value is 0, the driver won't sleep at all. It will check
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* the status of the CS and return immediately
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*
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* The return value of the IOCTL is a standard Linux error code. The possible
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* values are:
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*
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