[PATCH] x86: rewrite SMP TSC sync code
make the TSC synchronization code more robust, and unify it between x86_64 and i386. The biggest change is the removal of the 'fix up TSCs' code on x86_64 and i386, in some rare cases it was /causing/ time-warps on SMP systems. The new code only checks for TSC asynchronity - and if it can prove a time-warp (if it can observe the TSC going backwards when going from one CPU to another within a critical section), then the TSC clock-source is turned off. The TSC synchronization-checking code also got moved into a separate file. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: john stultz <johnstul@us.ibm.com> Cc: Roman Zippel <zippel@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Ingo Molnar
committed by
Linus Torvalds
Linus Torvalds
parent
92c7e00254
commit
95492e4646
+1
-48
@@ -1,48 +1 @@
|
||||
/*
|
||||
* linux/include/asm-i386/tsc.h
|
||||
*
|
||||
* i386 TSC related functions
|
||||
*/
|
||||
#ifndef _ASM_i386_TSC_H
|
||||
#define _ASM_i386_TSC_H
|
||||
|
||||
#include <asm/processor.h>
|
||||
|
||||
/*
|
||||
* Standard way to access the cycle counter on i586+ CPUs.
|
||||
* Currently only used on SMP.
|
||||
*
|
||||
* If you really have a SMP machine with i486 chips or older,
|
||||
* compile for that, and this will just always return zero.
|
||||
* That's ok, it just means that the nicer scheduling heuristics
|
||||
* won't work for you.
|
||||
*
|
||||
* We only use the low 32 bits, and we'd simply better make sure
|
||||
* that we reschedule before that wraps. Scheduling at least every
|
||||
* four billion cycles just basically sounds like a good idea,
|
||||
* regardless of how fast the machine is.
|
||||
*/
|
||||
typedef unsigned long long cycles_t;
|
||||
|
||||
extern unsigned int cpu_khz;
|
||||
extern unsigned int tsc_khz;
|
||||
|
||||
static inline cycles_t get_cycles(void)
|
||||
{
|
||||
unsigned long long ret = 0;
|
||||
|
||||
#ifndef CONFIG_X86_TSC
|
||||
if (!cpu_has_tsc)
|
||||
return 0;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
|
||||
rdtscll(ret);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern void tsc_init(void);
|
||||
extern void mark_tsc_unstable(void);
|
||||
|
||||
#endif
|
||||
#include <asm-x86_64/tsc.h>
|
||||
|
||||
@@ -91,8 +91,6 @@ extern void check_efer(void);
|
||||
|
||||
extern int unhandled_signal(struct task_struct *tsk, int sig);
|
||||
|
||||
extern int unsynchronized_tsc(void);
|
||||
|
||||
extern void select_idle_routine(const struct cpuinfo_x86 *c);
|
||||
|
||||
extern unsigned long table_start, table_end;
|
||||
|
||||
@@ -12,35 +12,11 @@
|
||||
#include <asm/hpet.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/tsc.h>
|
||||
#include <linux/compiler.h>
|
||||
|
||||
#define CLOCK_TICK_RATE PIT_TICK_RATE /* Underlying HZ */
|
||||
|
||||
typedef unsigned long long cycles_t;
|
||||
|
||||
static inline cycles_t get_cycles (void)
|
||||
{
|
||||
unsigned long long ret;
|
||||
|
||||
rdtscll(ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Like get_cycles, but make sure the CPU is synchronized. */
|
||||
static __always_inline cycles_t get_cycles_sync(void)
|
||||
{
|
||||
unsigned long long ret;
|
||||
unsigned eax;
|
||||
/* Don't do an additional sync on CPUs where we know
|
||||
RDTSC is already synchronous. */
|
||||
alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
|
||||
"=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
|
||||
rdtscll(ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern unsigned int cpu_khz;
|
||||
|
||||
extern int read_current_timer(unsigned long *timer_value);
|
||||
#define ARCH_HAS_READ_CURRENT_TIMER 1
|
||||
|
||||
|
||||
@@ -0,0 +1,66 @@
|
||||
/*
|
||||
* linux/include/asm-x86_64/tsc.h
|
||||
*
|
||||
* x86_64 TSC related functions
|
||||
*/
|
||||
#ifndef _ASM_x86_64_TSC_H
|
||||
#define _ASM_x86_64_TSC_H
|
||||
|
||||
#include <asm/processor.h>
|
||||
|
||||
/*
|
||||
* Standard way to access the cycle counter.
|
||||
*/
|
||||
typedef unsigned long long cycles_t;
|
||||
|
||||
extern unsigned int cpu_khz;
|
||||
extern unsigned int tsc_khz;
|
||||
|
||||
static inline cycles_t get_cycles(void)
|
||||
{
|
||||
unsigned long long ret = 0;
|
||||
|
||||
#ifndef CONFIG_X86_TSC
|
||||
if (!cpu_has_tsc)
|
||||
return 0;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
|
||||
rdtscll(ret);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Like get_cycles, but make sure the CPU is synchronized. */
|
||||
static __always_inline cycles_t get_cycles_sync(void)
|
||||
{
|
||||
unsigned long long ret;
|
||||
#ifdef X86_FEATURE_SYNC_RDTSC
|
||||
unsigned eax;
|
||||
|
||||
/*
|
||||
* Don't do an additional sync on CPUs where we know
|
||||
* RDTSC is already synchronous:
|
||||
*/
|
||||
alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
|
||||
"=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
|
||||
#else
|
||||
sync_core();
|
||||
#endif
|
||||
rdtscll(ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern void tsc_init(void);
|
||||
extern void mark_tsc_unstable(void);
|
||||
extern int unsynchronized_tsc(void);
|
||||
|
||||
/*
|
||||
* Boot-time check whether the TSCs are synchronized across
|
||||
* all CPUs/cores:
|
||||
*/
|
||||
extern void check_tsc_sync_source(int cpu);
|
||||
extern void check_tsc_sync_target(void);
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user