net/mlx5: Introduce API for bulk request and release of IRQs
Currently IRQs are requested one by one. To balance spreading IRQs among cpus using such scheme requires remembering cpu mask for the cpus used for a given device. This complicates the IRQ allocation scheme in subsequent patch. Hence, prepare the code for bulk IRQs allocation. This enables spreading IRQs among cpus in subsequent patch. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Saeed Mahameed
parent
424544df97
commit
79b60ca83b
@@ -1541,16 +1541,10 @@ int mlx5r_odp_create_eq(struct mlx5_ib_dev *dev, struct mlx5_ib_pf_eq *eq)
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eq->irq_nb.notifier_call = mlx5_ib_eq_pf_int;
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param = (struct mlx5_eq_param) {
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.irq_index = MLX5_IRQ_EQ_CTRL,
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.nent = MLX5_IB_NUM_PF_EQE,
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};
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param.mask[0] = 1ull << MLX5_EVENT_TYPE_PAGE_FAULT;
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if (!zalloc_cpumask_var(¶m.affinity, GFP_KERNEL)) {
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err = -ENOMEM;
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goto err_wq;
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}
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eq->core = mlx5_eq_create_generic(dev->mdev, ¶m);
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free_cpumask_var(param.affinity);
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if (IS_ERR(eq->core)) {
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err = PTR_ERR(eq->core);
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goto err_wq;
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