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Merge tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

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Pull char/misc driver updates from Greg KH:
 "Here is the big set of char and misc and other tiny driver subsystem
  updates for 5.16-rc1.

  Loads of things in here, all of which have been in linux-next for a
  while with no reported problems (except for one called out below.)

  Included are:

   - habanana labs driver updates, including dma_buf usage, reviewed and
     acked by the dma_buf maintainers

   - iio driver update (going through this tree not staging as they
     really do not belong going through that tree anymore)

   - counter driver updates

   - hwmon driver updates that the counter drivers needed, acked by the
     hwmon maintainer

   - xillybus driver updates

   - binder driver updates

   - extcon driver updates

   - dma_buf module namespaces added (will cause a build error in arm64
     for allmodconfig, but that change is on its way through the drm
     tree)

   - lkdtm driver updates

   - pvpanic driver updates

   - phy driver updates

   - virt acrn and nitr_enclaves driver updates

   - smaller char and misc driver updates"

* tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (386 commits)
  comedi: dt9812: fix DMA buffers on stack
  comedi: ni_usb6501: fix NULL-deref in command paths
  arm64: errata: Enable TRBE workaround for write to out-of-range address
  arm64: errata: Enable workaround for TRBE overwrite in FILL mode
  coresight: trbe: Work around write to out of range
  coresight: trbe: Make sure we have enough space
  coresight: trbe: Add a helper to determine the minimum buffer size
  coresight: trbe: Workaround TRBE errata overwrite in FILL mode
  coresight: trbe: Add infrastructure for Errata handling
  coresight: trbe: Allow driver to choose a different alignment
  coresight: trbe: Decouple buffer base from the hardware base
  coresight: trbe: Add a helper to pad a given buffer area
  coresight: trbe: Add a helper to calculate the trace generated
  coresight: trbe: Defer the probe on offline CPUs
  coresight: trbe: Fix incorrect access of the sink specific data
  coresight: etm4x: Add ETM PID for Kryo-5XX
  coresight: trbe: Prohibit trace before disabling TRBE
  coresight: trbe: End the AUX handle on truncation
  coresight: trbe: Do not truncate buffer on IRQ
  coresight: trbe: Fix handling of spurious interrupts
  ...
This commit is contained in:
Linus Torvalds
2021-11-04 08:21:47 -07:00
parent 5cd4dc44b8 536de747bc
commit 5c904c66ed
393 changed files with 22130 additions and 6915 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/uapi/linux/acrn.h
+70
View File
@@ -396,6 +396,7 @@ struct acrn_ptdev_irq {
/* Type of PCI device assignment */
#define ACRN_PTDEV_QUIRK_ASSIGN (1U << 0)
#define ACRN_MMIODEV_RES_NUM 3
#define ACRN_PCI_NUM_BARS 6
/**
* struct acrn_pcidev - Info for assigning or de-assigning a PCI device
@@ -417,6 +418,67 @@ struct acrn_pcidev {
__u32 bar[ACRN_PCI_NUM_BARS];
};
/**
* struct acrn_mmiodev - Info for assigning or de-assigning a MMIO device
* @name: Name of the MMIO device.
* @res[].user_vm_pa: Physical address of User VM of the MMIO region
* for the MMIO device.
* @res[].service_vm_pa: Physical address of Service VM of the MMIO
* region for the MMIO device.
* @res[].size: Size of the MMIO region for the MMIO device.
* @res[].mem_type: Memory type of the MMIO region for the MMIO
* device.
*
* This structure will be passed to hypervisor directly.
*/
struct acrn_mmiodev {
__u8 name[8];
struct {
__u64 user_vm_pa;
__u64 service_vm_pa;
__u64 size;
__u64 mem_type;
} res[ACRN_MMIODEV_RES_NUM];
};
/**
* struct acrn_vdev - Info for creating or destroying a virtual device
* @id: Union of identifier of the virtual device
* @id.value: Raw data of the identifier
* @id.fields.vendor: Vendor id of the virtual PCI device
* @id.fields.device: Device id of the virtual PCI device
* @id.fields.legacy_id: ID of the virtual device if not a PCI device
* @slot: Virtual Bus/Device/Function of the virtual
* device
* @io_base: IO resource base address of the virtual device
* @io_size: IO resource size of the virtual device
* @args: Arguments for the virtual device creation
*
* The created virtual device can be a PCI device or a legacy device (e.g.
* a virtual UART controller) and it is emulated by the hypervisor. This
* structure will be passed to hypervisor directly.
*/
struct acrn_vdev {
/*
* the identifier of the device, the low 32 bits represent the vendor
* id and device id of PCI device and the high 32 bits represent the
* device number of the legacy device
*/
union {
__u64 value;
struct {
__le16 vendor;
__le16 device;
__le32 legacy_id;
} fields;
} id;
__u64 slot;
__u32 io_addr[ACRN_PCI_NUM_BARS];
__u32 io_size[ACRN_PCI_NUM_BARS];
__u8 args[128];
};
/**
* struct acrn_msi_entry - Info for injecting a MSI interrupt to a VM
* @msi_addr: MSI addr[19:12] with dest vCPU ID
@@ -568,6 +630,14 @@ struct acrn_irqfd {
_IOW(ACRN_IOCTL_TYPE, 0x55, struct acrn_pcidev)
#define ACRN_IOCTL_DEASSIGN_PCIDEV \
_IOW(ACRN_IOCTL_TYPE, 0x56, struct acrn_pcidev)
#define ACRN_IOCTL_ASSIGN_MMIODEV \
_IOW(ACRN_IOCTL_TYPE, 0x57, struct acrn_mmiodev)
#define ACRN_IOCTL_DEASSIGN_MMIODEV \
_IOW(ACRN_IOCTL_TYPE, 0x58, struct acrn_mmiodev)
#define ACRN_IOCTL_CREATE_VDEV \
_IOW(ACRN_IOCTL_TYPE, 0x59, struct acrn_vdev)
#define ACRN_IOCTL_DESTROY_VDEV \
_IOW(ACRN_IOCTL_TYPE, 0x5A, struct acrn_vdev)
#define ACRN_IOCTL_PM_GET_CPU_STATE \
_IOWR(ACRN_IOCTL_TYPE, 0x60, __u64)
include/uapi/linux/counter.h
+154
View File
@@ -0,0 +1,154 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Userspace ABI for Counter character devices
* Copyright (C) 2020 William Breathitt Gray
*/
#ifndef _UAPI_COUNTER_H_
#define _UAPI_COUNTER_H_
#include <linux/ioctl.h>
#include <linux/types.h>
/* Component type definitions */
enum counter_component_type {
COUNTER_COMPONENT_NONE,
COUNTER_COMPONENT_SIGNAL,
COUNTER_COMPONENT_COUNT,
COUNTER_COMPONENT_FUNCTION,
COUNTER_COMPONENT_SYNAPSE_ACTION,
COUNTER_COMPONENT_EXTENSION,
};
/* Component scope definitions */
enum counter_scope {
COUNTER_SCOPE_DEVICE,
COUNTER_SCOPE_SIGNAL,
COUNTER_SCOPE_COUNT,
};
/**
* struct counter_component - Counter component identification
* @type: component type (one of enum counter_component_type)
* @scope: component scope (one of enum counter_scope)
* @parent: parent ID (matching the ID suffix of the respective parent sysfs
* path as described by the ABI documentation file
* Documentation/ABI/testing/sysfs-bus-counter)
* @id: component ID (matching the ID provided by the respective *_component_id
* sysfs attribute of the desired component)
*
* For example, if the Count 2 ceiling extension of Counter device 4 is desired,
* set type equal to COUNTER_COMPONENT_EXTENSION, scope equal to
* COUNTER_COUNT_SCOPE, parent equal to 2, and id equal to the value provided by
* the respective /sys/bus/counter/devices/counter4/count2/ceiling_component_id
* sysfs attribute.
*/
struct counter_component {
__u8 type;
__u8 scope;
__u8 parent;
__u8 id;
};
/* Event type definitions */
enum counter_event_type {
/* Count value increased past ceiling */
COUNTER_EVENT_OVERFLOW,
/* Count value decreased past floor */
COUNTER_EVENT_UNDERFLOW,
/* Count value increased past ceiling, or decreased past floor */
COUNTER_EVENT_OVERFLOW_UNDERFLOW,
/* Count value reached threshold */
COUNTER_EVENT_THRESHOLD,
/* Index signal detected */
COUNTER_EVENT_INDEX,
};
/**
* struct counter_watch - Counter component watch configuration
* @component: component to watch when event triggers
* @event: event that triggers (one of enum counter_event_type)
* @channel: event channel (typically 0 unless the device supports concurrent
* events of the same type)
*/
struct counter_watch {
struct counter_component component;
__u8 event;
__u8 channel;
};
/*
* Queues a Counter watch for the specified event.
*
* The queued watches will not be applied until COUNTER_ENABLE_EVENTS_IOCTL is
* called.
*/
#define COUNTER_ADD_WATCH_IOCTL _IOW(0x3E, 0x00, struct counter_watch)
/*
* Enables monitoring the events specified by the Counter watches that were
* queued by COUNTER_ADD_WATCH_IOCTL.
*
* If events are already enabled, the new set of watches replaces the old one.
* Calling this ioctl also has the effect of clearing the queue of watches added
* by COUNTER_ADD_WATCH_IOCTL.
*/
#define COUNTER_ENABLE_EVENTS_IOCTL _IO(0x3E, 0x01)
/*
* Stops monitoring the previously enabled events.
*/
#define COUNTER_DISABLE_EVENTS_IOCTL _IO(0x3E, 0x02)
/**
* struct counter_event - Counter event data
* @timestamp: best estimate of time of event occurrence, in nanoseconds
* @value: component value
* @watch: component watch configuration
* @status: return status (system error number)
*/
struct counter_event {
__aligned_u64 timestamp;
__aligned_u64 value;
struct counter_watch watch;
__u8 status;
};
/* Count direction values */
enum counter_count_direction {
COUNTER_COUNT_DIRECTION_FORWARD,
COUNTER_COUNT_DIRECTION_BACKWARD,
};
/* Count mode values */
enum counter_count_mode {
COUNTER_COUNT_MODE_NORMAL,
COUNTER_COUNT_MODE_RANGE_LIMIT,
COUNTER_COUNT_MODE_NON_RECYCLE,
COUNTER_COUNT_MODE_MODULO_N,
};
/* Count function values */
enum counter_function {
COUNTER_FUNCTION_INCREASE,
COUNTER_FUNCTION_DECREASE,
COUNTER_FUNCTION_PULSE_DIRECTION,
COUNTER_FUNCTION_QUADRATURE_X1_A,
COUNTER_FUNCTION_QUADRATURE_X1_B,
COUNTER_FUNCTION_QUADRATURE_X2_A,
COUNTER_FUNCTION_QUADRATURE_X2_B,
COUNTER_FUNCTION_QUADRATURE_X4,
};
/* Signal values */
enum counter_signal_level {
COUNTER_SIGNAL_LEVEL_LOW,
COUNTER_SIGNAL_LEVEL_HIGH,
};
/* Action mode values */
enum counter_synapse_action {
COUNTER_SYNAPSE_ACTION_NONE,
COUNTER_SYNAPSE_ACTION_RISING_EDGE,
COUNTER_SYNAPSE_ACTION_FALLING_EDGE,
COUNTER_SYNAPSE_ACTION_BOTH_EDGES,
};
#endif /* _UAPI_COUNTER_H_ */
include/uapi/linux/nitro_enclaves.h
+5 -5
View File
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
* Copyright 2020-2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*/
#ifndef _UAPI_LINUX_NITRO_ENCLAVES_H_
@@ -60,7 +60,7 @@
*
* Context: Process context.
* Return:
* * 0 - Logic succesfully completed.
* * 0 - Logic successfully completed.
* * -1 - There was a failure in the ioctl logic.
* On failure, errno is set to:
* * EFAULT - copy_from_user() / copy_to_user() failure.
@@ -95,7 +95,7 @@
*
* Context: Process context.
* Return:
* * 0 - Logic succesfully completed.
* * 0 - Logic successfully completed.
* * -1 - There was a failure in the ioctl logic.
* On failure, errno is set to:
* * EFAULT - copy_from_user() / copy_to_user() failure.
@@ -118,7 +118,7 @@
*
* Context: Process context.
* Return:
* * 0 - Logic succesfully completed.
* * 0 - Logic successfully completed.
* * -1 - There was a failure in the ioctl logic.
* On failure, errno is set to:
* * EFAULT - copy_from_user() failure.
@@ -161,7 +161,7 @@
*
* Context: Process context.
* Return:
* * 0 - Logic succesfully completed.
* * 0 - Logic successfully completed.
* * -1 - There was a failure in the ioctl logic.
* On failure, errno is set to:
* * EFAULT - copy_from_user() / copy_to_user() failure.
include/uapi/misc/habanalabs.h
+59 -25
View File
@@ -272,6 +272,16 @@ enum hl_gaudi_pll_index {
HL_GAUDI_PLL_MAX
};
/**
* enum hl_device_status - Device status information.
* @HL_DEVICE_STATUS_OPERATIONAL: Device is operational.
* @HL_DEVICE_STATUS_IN_RESET: Device is currently during reset.
* @HL_DEVICE_STATUS_MALFUNCTION: Device is unusable.
* @HL_DEVICE_STATUS_NEEDS_RESET: Device needs reset because auto reset was disabled.
* @HL_DEVICE_STATUS_IN_DEVICE_CREATION: Device is operational but its creation is still in
* progress.
* @HL_DEVICE_STATUS_LAST: Last status.
*/
enum hl_device_status {
HL_DEVICE_STATUS_OPERATIONAL,
HL_DEVICE_STATUS_IN_RESET,
@@ -556,33 +566,30 @@ enum gaudi_dcores {
HL_GAUDI_ES_DCORE
};
/**
* struct hl_info_args - Main structure to retrieve device related information.
* @return_pointer: User space address of the relevant structure related to HL_INFO_* operation
* mentioned in @op.
* @return_size: Size of the structure used in @return_pointer, just like "size" in "snprintf", it
* limits how many bytes the kernel can write. For hw_events array, the size should be
* hl_info_hw_ip_info.num_of_events * sizeof(__u32).
* @op: Defines which type of information to be retrieved. Refer HL_INFO_* for details.
* @dcore_id: DCORE id for which the information is relevant (for Gaudi refer to enum gaudi_dcores).
* @ctx_id: Context ID of the user. Currently not in use.
* @period_ms: Period value, in milliseconds, for utilization rate in range 100ms - 1000ms in 100 ms
* resolution. Currently not in use.
* @pll_index: Index as defined in hl_<asic type>_pll_index enumeration.
* @pad: Padding to 64 bit.
*/
struct hl_info_args {
/* Location of relevant struct in userspace */
__u64 return_pointer;
/*
* The size of the return value. Just like "size" in "snprintf",
* it limits how many bytes the kernel can write
*
* For hw_events array, the size should be
* hl_info_hw_ip_info.num_of_events * sizeof(__u32)
*/
__u32 return_size;
/* HL_INFO_* */
__u32 op;
union {
/* Dcore id for which the information is relevant.
* For Gaudi refer to 'enum gaudi_dcores'
*/
__u32 dcore_id;
/* Context ID - Currently not in use */
__u32 ctx_id;
/* Period value for utilization rate (100ms - 1000ms, in 100ms
* resolution.
*/
__u32 period_ms;
/* PLL frequency retrieval */
__u32 pll_index;
};
@@ -890,11 +897,7 @@ struct hl_wait_cs_in {
*/
__u64 addr;
/* Target value for completion comparison */
__u32 target;
/* Absolute timeout to wait for interrupt
* in microseconds
*/
__u32 interrupt_timeout_us;
__u64 target;
};
};
@@ -910,7 +913,12 @@ struct hl_wait_cs_in {
/* Multi CS API info- valid entries in multi-CS array */
__u8 seq_arr_len;
__u8 pad[7];
__u8 pad[3];
/* Absolute timeout to wait for an interrupt in microseconds.
* Relevant only when HL_WAIT_CS_FLAGS_INTERRUPT is set
*/
__u32 interrupt_timeout_us;
};
#define HL_WAIT_CS_STATUS_COMPLETED 0
@@ -952,6 +960,10 @@ union hl_wait_cs_args {
#define HL_MEM_OP_UNMAP 3
/* Opcode to map a hw block */
#define HL_MEM_OP_MAP_BLOCK 4
/* Opcode to create DMA-BUF object for an existing device memory allocation
* and to export an FD of that DMA-BUF back to the caller
*/
#define HL_MEM_OP_EXPORT_DMABUF_FD 5
/* Memory flags */
#define HL_MEM_CONTIGUOUS 0x1
@@ -1023,11 +1035,26 @@ struct hl_mem_in {
/* Virtual address returned from HL_MEM_OP_MAP */
__u64 device_virt_addr;
} unmap;
/* HL_MEM_OP_EXPORT_DMABUF_FD */
struct {
/* Handle returned from HL_MEM_OP_ALLOC. In Gaudi,
* where we don't have MMU for the device memory, the
* driver expects a physical address (instead of
* a handle) in the device memory space.
*/
__u64 handle;
/* Size of memory allocation. Relevant only for GAUDI */
__u64 mem_size;
} export_dmabuf_fd;
};
/* HL_MEM_OP_* */
__u32 op;
/* HL_MEM_* flags */
/* HL_MEM_* flags.
* For the HL_MEM_OP_EXPORT_DMABUF_FD opcode, this field holds the
* DMA-BUF file/FD flags.
*/
__u32 flags;
/* Context ID - Currently not in use */
__u32 ctx_id;
@@ -1064,6 +1091,13 @@ struct hl_mem_out {
__u32 pad;
};
/* Returned in HL_MEM_OP_EXPORT_DMABUF_FD. Represents the
* DMA-BUF object that was created to describe a memory
* allocation on the device's memory space. The FD should be
* passed to the importer driver
*/
__s32 fd;
};
};