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Merge branch 'linus' into cpus4096

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This commit is contained in:
Ingo Molnar
2008-07-28 21:14:43 +02:00
parent 5a7a201c51 c9272c4f9f
commit 414f746d23
1107 changed files with 46490 additions and 11252 deletions
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include/Kbuild
+3 -2
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@@ -1,3 +1,6 @@
# Top-level Makefile calls into asm-$(ARCH)
# List only non-arch directories below
header-y += asm-generic/
header-y += linux/
header-y += sound/
@@ -5,5 +8,3 @@ header-y += mtd/
header-y += rdma/
header-y += video/
header-y += drm/
header-y += asm-$(ARCH)/
include/asm-alpha/dma-mapping.h
+3 -3
View File
@@ -24,8 +24,8 @@
pci_unmap_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
#define dma_supported(dev, mask) \
pci_dma_supported(alpha_gendev_to_pci(dev), mask)
#define dma_mapping_error(addr) \
pci_dma_mapping_error(addr)
#define dma_mapping_error(dev, addr) \
pci_dma_mapping_error(alpha_gendev_to_pci(dev), addr)
#else /* no PCI - no IOMMU. */
@@ -45,7 +45,7 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
#define dma_unmap_page(dev, addr, size, dir) ((void)0)
#define dma_unmap_sg(dev, sg, nents, dir) ((void)0)
#define dma_mapping_error(addr) (0)
#define dma_mapping_error(dev, addr) (0)
#endif /* !CONFIG_PCI */
include/asm-alpha/namei.h
-17
View File
@@ -1,17 +0,0 @@
/* $Id: namei.h,v 1.1 1996/12/13 14:48:21 jj Exp $
* linux/include/asm-alpha/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __ALPHA_NAMEI_H
#define __ALPHA_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* __ALPHA_NAMEI_H */
include/asm-alpha/pci.h
+1 -1
View File
@@ -106,7 +106,7 @@ extern dma_addr_t pci_map_page(struct pci_dev *, struct page *,
/* Test for pci_map_single or pci_map_page having generated an error. */
static inline int
pci_dma_mapping_error(dma_addr_t dma_addr)
pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
{
return dma_addr == 0;
}
include/asm-arm/arch-at91/at91_ecc.h
-38
View File
@@ -1,38 +0,0 @@
/*
* include/asm-arm/arch-at91/at91_ecc.h
*
* Error Corrected Code Controller (ECC) - System peripherals regsters.
* Based on AT91SAM9260 datasheet revision B.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef AT91_ECC_H
#define AT91_ECC_H
#define AT91_ECC_CR 0x00 /* Control register */
#define AT91_ECC_RST (1 << 0) /* Reset parity */
#define AT91_ECC_MR 0x04 /* Mode register */
#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */
#define AT91_ECC_PAGESIZE_528 (0)
#define AT91_ECC_PAGESIZE_1056 (1)
#define AT91_ECC_PAGESIZE_2112 (2)
#define AT91_ECC_PAGESIZE_4224 (3)
#define AT91_ECC_SR 0x08 /* Status register */
#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */
#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */
#define AT91_ECC_PR 0x0c /* Parity register */
#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */
#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
#define AT91_ECC_NPR 0x10 /* NParity register */
#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */
#endif
include/asm-arm/arch-at91/board.h
+2 -2
View File
@@ -89,7 +89,7 @@ struct at91_usbh_data {
extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
/* NAND / SmartMedia */
struct at91_nand_data {
struct atmel_nand_data {
u8 enable_pin; /* chip enable */
u8 det_pin; /* card detect */
u8 rdy_pin; /* ready/busy */
@@ -98,7 +98,7 @@ struct at91_nand_data {
u8 bus_width_16; /* buswidth is 16 bit */
struct mtd_partition* (*partition_info)(int, int*);
};
extern void __init at91_add_device_nand(struct at91_nand_data *data);
extern void __init at91_add_device_nand(struct atmel_nand_data *data);
/* I2C*/
extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices);
include/asm-arm/arch-pnx4008/irqs.h
+24 -24
View File
@@ -135,30 +135,30 @@
#define PNX4008_IRQ_TYPES \
{ /*IRQ #'s: */ \
IRQT_LOW, IRQT_LOW, IRQT_LOW, IRQT_HIGH, /* 0, 1, 2, 3 */ \
IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 4, 5, 6, 7 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 8, 9,10,11 */ \
IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 28,29,30,31 */ \
IRQT_HIGH, IRQT_LOW, IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 48,49,50,51 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_HIGH, /* 56,57,58,59 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */ \
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */ \
IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 0, 1, 2, 3 */ \
IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 4, 5, 6, 7 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 8, 9,10,11 */ \
IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 28,29,30,31 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 48,49,50,51 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */ \
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */ \
}
/* Start Enable Pin Interrupts - table 58 page 66 */
include/asm-arm/arch-pxa/idp.h
+5 -5
View File
@@ -138,18 +138,18 @@
#define TOUCH_PANEL_IRQ IRQ_GPIO(5)
#define IDE_IRQ IRQ_GPIO(21)
#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING
#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
#define ETHERNET_IRQ IRQ_GPIO(4)
#define ETHERNET_IRQ_EDGE IRQT_RISING
#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define IDE_IRQ_EDGE IRQT_RISING
#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCMCIA_S0_CD_VALID IRQ_GPIO(7)
#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE
#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
#define PCMCIA_S1_CD_VALID IRQ_GPIO(8)
#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE
#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
#define PCMCIA_S0_RDYINT IRQ_GPIO(19)
#define PCMCIA_S1_RDYINT IRQ_GPIO(22)
include/asm-arm/arch-pxa/pcm990_baseboard.h
+7 -7
View File
@@ -29,14 +29,14 @@
/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
#define PCM990_CTRL_INT_IRQ_GPIO 9
#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
#define PCM990_CTRL_INT_IRQ_EDGE IRQT_RISING
#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
#define PCM990_CTRL_BASE 0xea000000
#define PCM990_CTRL_SIZE (1*1024*1024)
#define PCM990_CTRL_PWR_IRQ_GPIO 14
#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
#define PCM990_CTRL_PWR_IRQ_EDGE IRQT_RISING
#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
/* visible CPLD (U7) registers */
#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */
@@ -133,7 +133,7 @@
*/
#define PCM990_IDE_IRQ_GPIO 13
#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
#define PCM990_IDE_IRQ_EDGE IRQT_RISING
#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
#define PCM990_IDE_PLD_BASE 0xee000000
#define PCM990_IDE_PLD_SIZE (1*1024*1024)
@@ -189,11 +189,11 @@
*/
#define PCM990_CF_IRQ_GPIO 11
#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO)
#define PCM990_CF_IRQ_EDGE IRQT_RISING
#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CF_CD_GPIO 12
#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO)
#define PCM990_CF_CD_EDGE IRQT_RISING
#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
#define PCM990_CF_PLD_BASE 0xef000000
@@ -259,14 +259,14 @@
*/
#define PCM990_AC97_IRQ_GPIO 10
#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
#define PCM990_AC97_IRQ_EDGE IRQT_RISING
#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
/*
* MMC phyCORE
*/
#define PCM990_MMC0_IRQ_GPIO 9
#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
#define PCM990_MMC0_IRQ_EDGE IRQT_FALLING
#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
/*
* USB phyCore
include/asm-arm/arch-pxa/pxa25x-udc.h
+1 -1
View File
@@ -2,7 +2,7 @@
#define _ASM_ARCH_PXA25X_UDC_H
#ifdef _ASM_ARCH_PXA27X_UDC_H
#error You can't include both PXA25x and PXA27x UDC support
#error "You can't include both PXA25x and PXA27x UDC support"
#endif
#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */
include/asm-arm/arch-sa1100/ide.h
+1 -1
View File
@@ -61,7 +61,7 @@ ide_init_default_hwifs(void)
/* Enable GPIO as interrupt line */
GPDR &= ~LART_GPIO_IDE;
set_irq_type(LART_IRQ_IDE, IRQT_RISING);
set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING);
/* set PCMCIA interface timing */
MECR = 0x00060006;
include/asm-arm/bitops.h
+8 -1
View File
@@ -277,9 +277,16 @@ static inline int constant_fls(int x)
* the clz instruction for much better code efficiency.
*/
#define fls(x) \
#define __fls(x) \
( __builtin_constant_p(x) ? constant_fls(x) : \
({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
/* Implement fls() in C so that 64-bit args are suitably truncated */
static inline int fls(int x)
{
return __fls(x);
}
#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
#define __ffs(x) (ffs(x) - 1)
#define ffz(x) __ffs( ~(x) )
include/asm-arm/cacheflush.h
+15 -6
View File
@@ -424,9 +424,9 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
}
#define flush_dcache_mmap_lock(mapping) \
write_lock_irq(&(mapping)->tree_lock)
spin_lock_irq(&(mapping)->tree_lock)
#define flush_dcache_mmap_unlock(mapping) \
write_unlock_irq(&(mapping)->tree_lock)
spin_unlock_irq(&(mapping)->tree_lock)
#define flush_icache_user_range(vma,page,addr,len) \
flush_dcache_page(page)
@@ -459,15 +459,19 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0)
#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
/*
* VIVT caches only
*/
#define cache_is_vivt() 1
#define cache_is_vipt() 0
#define cache_is_vipt_nonaliasing() 0
#define cache_is_vipt_aliasing() 0
#define icache_is_vivt_asid_tagged() 0
#elif defined(CONFIG_CPU_CACHE_VIPT)
#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
/*
* VIPT caches only
*/
#define cache_is_vivt() 0
#define cache_is_vipt() 1
#define cache_is_vipt_nonaliasing() \
@@ -489,7 +493,12 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
})
#else
/*
* VIVT or VIPT caches. Note that this is unreliable since ARM926
* and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test.
* There's no way to tell from the CacheType register what type (!)
* the cache is.
*/
#define cache_is_vivt() \
({ \
unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
include/asm-arm/dma-mapping.h
+1 -1
View File
@@ -56,7 +56,7 @@ static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
/*
* DMA errors are defined by all-bits-set in the DMA address.
*/
static inline int dma_mapping_error(dma_addr_t dma_addr)
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return dma_addr == ~0;
}
include/asm-arm/irq.h
-17
View File
@@ -19,23 +19,6 @@
#define NO_IRQ ((unsigned int)(-1))
#endif
/*
* Migration helpers
*/
#define __IRQT_FALEDGE IRQ_TYPE_EDGE_FALLING
#define __IRQT_RISEDGE IRQ_TYPE_EDGE_RISING
#define __IRQT_LOWLVL IRQ_TYPE_LEVEL_LOW
#define __IRQT_HIGHLVL IRQ_TYPE_LEVEL_HIGH
#define IRQT_NOEDGE (0)
#define IRQT_RISING (__IRQT_RISEDGE)
#define IRQT_FALLING (__IRQT_FALEDGE)
#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE)
#define IRQT_LOW (__IRQT_LOWLVL)
#define IRQT_HIGH (__IRQT_HIGHLVL)
#define IRQT_PROBE IRQ_TYPE_PROBE
#ifndef __ASSEMBLY__
struct irqaction;
extern void migrate_irqs(void);
include/asm-arm/namei.h
-25
View File
@@ -1,25 +0,0 @@
/*
* linux/include/asm-arm/namei.h
*
* Routines to handle famous /usr/gnemul
* Derived from the Sparc version of this file
*
* Included from linux/fs/namei.c
*/
#ifndef __ASMARM_NAMEI_H
#define __ASMARM_NAMEI_H
#define ARM_BSD_EMUL "usr/gnemul/bsd/"
static inline char *__emul_prefix(void)
{
switch (current->personality) {
case PER_BSD:
return ARM_BSD_EMUL;
default:
return NULL;
}
}
#endif /* __ASMARM_NAMEI_H */
include/asm-arm/pci.h
+8
View File
@@ -78,6 +78,14 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
return root;
}
/*
* Dummy implementation; always return 0.
*/
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
return 0;
}
#endif /* __KERNEL__ */
#endif
include/asm-avr32/arch-at32ap/board.h
+22 -1
View File
@@ -82,7 +82,15 @@ struct mci_platform_data;
struct platform_device *
at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
struct platform_device *at32_add_device_ac97c(unsigned int id);
struct ac97c_platform_data {
unsigned short dma_rx_periph_id;
unsigned short dma_tx_periph_id;
unsigned short dma_controller_id;
int reset_pin;
};
struct platform_device *
at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data);
struct platform_device *at32_add_device_abdac(unsigned int id);
struct platform_device *at32_add_device_psif(unsigned int id);
@@ -97,4 +105,17 @@ struct platform_device *
at32_add_device_cf(unsigned int id, unsigned int extint,
struct cf_platform_data *data);
/* NAND / SmartMedia */
struct atmel_nand_data {
int enable_pin; /* chip enable */
int det_pin; /* card detect */
int rdy_pin; /* ready/busy */
u8 ale; /* address line number connected to ALE */
u8 cle; /* address line number connected to CLE */
u8 bus_width_16; /* buswidth is 16 bit */
struct mtd_partition *(*partition_info)(int size, int *num_partitions);
};
struct platform_device *
at32_add_device_nand(unsigned int id, struct atmel_nand_data *data);
#endif /* __ASM_ARCH_BOARD_H */
include/asm-avr32/dma-mapping.h
+1 -1
View File
@@ -35,7 +35,7 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
/*
* dma_map_single can't fail as it is implemented now.
*/
static inline int dma_mapping_error(dma_addr_t addr)
static inline int dma_mapping_error(struct device *dev, dma_addr_t addr)
{
return 0;
}
include/asm-avr32/namei.h
-7
View File
@@ -1,7 +0,0 @@
#ifndef __ASM_AVR32_NAMEI_H
#define __ASM_AVR32_NAMEI_H
/* This dummy routine may be changed to something useful */
#define __emul_prefix() NULL
#endif /* __ASM_AVR32_NAMEI_H */
include/asm-blackfin/bfin-global.h
+7 -1
View File
@@ -92,16 +92,20 @@ extern void *l1_data_B_sram_alloc(size_t);
extern void *l1_inst_sram_alloc(size_t);
extern void *l1_data_sram_alloc(size_t);
extern void *l1_data_sram_zalloc(size_t);
extern void *l2_sram_alloc(size_t);
extern void *l2_sram_zalloc(size_t);
extern int l1_data_A_sram_free(const void*);
extern int l1_data_B_sram_free(const void*);
extern int l1_inst_sram_free(const void*);
extern int l1_data_sram_free(const void*);
extern int l2_sram_free(const void *);
extern int sram_free(const void*);
#define L1_INST_SRAM 0x00000001
#define L1_DATA_A_SRAM 0x00000002
#define L1_DATA_B_SRAM 0x00000004
#define L1_DATA_SRAM 0x00000006
#define L2_SRAM 0x00000008
extern void *sram_alloc_with_lsl(size_t, unsigned long);
extern int sram_free_with_lsl(const void*);
@@ -114,7 +118,9 @@ extern struct file_operations dpmc_fops;
extern unsigned long _ramstart, _ramend, _rambase;
extern unsigned long memory_start, memory_end, physical_mem_end;
extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
_ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _ebss_b_l1[];
_ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _ebss_b_l1[],
_stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
_ebss_l2[], _l2_lma_start[];
#ifdef CONFIG_MTD_UCLINUX
extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
include/asm-blackfin/dma.h
+8
View File
@@ -144,8 +144,16 @@ struct dma_channel {
void *data;
unsigned int dma_enable_flag;
unsigned int loopback_flag;
#ifdef CONFIG_PM
unsigned short saved_peripheral_map;
#endif
};
#ifdef CONFIG_PM
int blackfin_dma_suspend(void);
void blackfin_dma_resume(void);
#endif
/*******************************************************************************
* DMA API's
*******************************************************************************/
include/asm-blackfin/dpmc.h
+31 -51
View File
@@ -7,63 +7,18 @@
#ifndef _BLACKFIN_DPMC_H_
#define _BLACKFIN_DPMC_H_
#define SLEEP_MODE 1
#define DEEP_SLEEP_MODE 2
#define ACTIVE_PLL_DISABLED 3
#define FULLON_MODE 4
#define ACTIVE_PLL_ENABLED 5
#define HIBERNATE_MODE 6
#define IOCTL_FULL_ON_MODE _IO('s', 0xA0)
#define IOCTL_ACTIVE_MODE _IO('s', 0xA1)
#define IOCTL_SLEEP_MODE _IO('s', 0xA2)
#define IOCTL_DEEP_SLEEP_MODE _IO('s', 0xA3)
#define IOCTL_HIBERNATE_MODE _IO('s', 0xA4)
#define IOCTL_CHANGE_FREQUENCY _IOW('s', 0xA5, unsigned long)
#define IOCTL_CHANGE_VOLTAGE _IOW('s', 0xA6, unsigned long)
#define IOCTL_SET_CCLK _IOW('s', 0xA7, unsigned long)
#define IOCTL_SET_SCLK _IOW('s', 0xA8, unsigned long)
#define IOCTL_GET_PLLSTATUS _IOW('s', 0xA9, unsigned long)
#define IOCTL_GET_CORECLOCK _IOW('s', 0xAA, unsigned long)
#define IOCTL_GET_SYSTEMCLOCK _IOW('s', 0xAB, unsigned long)
#define IOCTL_GET_VCO _IOW('s', 0xAC, unsigned long)
#define IOCTL_DISABLE_WDOG_TIMER _IO('s', 0xAD)
#define IOCTL_UNMASK_WDOG_WAKEUP_EVENT _IO('s',0xAE)
#define IOCTL_PROGRAM_WDOG_TIMER _IOW('s',0xAF,unsigned long)
#define IOCTL_CLEAR_WDOG_WAKEUP_EVENT _IO('s',0xB0)
#define IOCTL_SLEEP_DEEPER_MODE _IO('s',0xB1)
#define DPMC_MINOR 254
#define ON 0
#define OFF 1
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
unsigned long calc_volt(void);
int calc_vlev(int vlt);
unsigned long change_voltage(unsigned long volt);
int calc_msel(int vco_hz);
unsigned long change_frequency(unsigned long vco_mhz);
int set_pll_div(unsigned short sel, unsigned char flag);
int get_vco(void);
unsigned long change_system_clock(unsigned long clock);
unsigned long change_core_clock(unsigned long clock);
unsigned long get_pll_status(void);
void change_baud(int baud);
void fullon_mode(void);
void active_mode(void);
void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
void deep_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
void hibernate_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
void sleep_deeper(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
void program_wdog_timer(unsigned long);
void unmask_wdog_wakeup_evt(void);
void clear_wdog_wakeup_evt(void);
void disable_wdog_timer(void);
void do_hibernate(int wakeup);
void set_dram_srfs(void);
void unset_dram_srfs(void);
extern unsigned long get_cclk(void);
extern unsigned long get_sclk(void);
#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
struct bfin_dpmc_platform_data {
const unsigned int *tuple_tab;
@@ -71,8 +26,33 @@ struct bfin_dpmc_platform_data {
unsigned short vr_settling_time; /* in us */
};
#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
#else
#define PM_PUSH(x) \
R0 = [P0 + (x - SRAM_BASE_ADDRESS)];\
[--SP] = R0;\
#define PM_POP(x) \
R0 = [SP++];\
[P0 + (x - SRAM_BASE_ADDRESS)] = R0;\
#define PM_SYS_PUSH(x) \
R0 = [P0 + (x - PLL_CTL)];\
[--SP] = R0;\
#define PM_SYS_POP(x) \
R0 = [SP++];\
[P0 + (x - PLL_CTL)] = R0;\
#define PM_SYS_PUSH16(x) \
R0 = w[P0 + (x - PLL_CTL)];\
[--SP] = R0;\
#define PM_SYS_POP16(x) \
R0 = [SP++];\
w[P0 + (x - PLL_CTL)] = R0;\
#endif
#endif /* __KERNEL__ */
#endif /*_BLACKFIN_DPMC_H_*/
include/asm-blackfin/elf.h
+2
View File
@@ -15,6 +15,8 @@
#define EF_BFIN_FDPIC 0x00000002 /* -mfdpic */
#define EF_BFIN_CODE_IN_L1 0x00000010 /* --code-in-l1 */
#define EF_BFIN_DATA_IN_L1 0x00000020 /* --data-in-l1 */
#define EF_BFIN_CODE_IN_L2 0x00000040 /* --code-in-l2 */
#define EF_BFIN_DATA_IN_L2 0x00000080 /* --data-in-l2 */
typedef unsigned long elf_greg_t;
include/asm-blackfin/gpio.h
+7 -12
View File
@@ -376,8 +376,12 @@ struct gpio_port_t {
#endif
#ifdef CONFIG_PM
unsigned int bfin_pm_setup(void);
void bfin_pm_restore(void);
unsigned int bfin_pm_standby_setup(void);
void bfin_pm_standby_restore(void);
void bfin_gpio_pm_hibernate_restore(void);
void bfin_gpio_pm_hibernate_suspend(void);
#ifndef CONFIG_BF54x
#define PM_WAKE_RISING 0x1
@@ -392,17 +396,8 @@ void gpio_pm_wakeup_free(unsigned gpio);
struct gpio_port_s {
unsigned short data;
unsigned short data_clear;
unsigned short data_set;
unsigned short toggle;
unsigned short maska;
unsigned short maska_clear;
unsigned short maska_set;
unsigned short maska_toggle;
unsigned short maskb;
unsigned short maskb_clear;
unsigned short maskb_set;
unsigned short maskb_toggle;
unsigned short dir;
unsigned short polar;
unsigned short edge;
@@ -411,10 +406,10 @@ struct gpio_port_s {
unsigned short fer;
unsigned short reserved;
unsigned short mux;
};
#endif /*CONFIG_BF54x*/
#endif /*CONFIG_PM*/
/***********************************************************
*
* FUNCTIONS: Blackfin GPIO Driver
include/asm-blackfin/mach-bf527/anomaly.h
+2
View File
@@ -23,6 +23,8 @@
#define ANOMALY_05000245 (1)
/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
#define ANOMALY_05000265 (1)
/* New Feature: EMAC TX DMA Word Alignment */
#define ANOMALY_05000285 (1)
/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
#define ANOMALY_05000312 (1)
/* Incorrect Access of OTP_STATUS During otp_write() Function */
include/asm-blackfin/mach-bf527/bfin_sir.h
+15 -6
View File
@@ -118,16 +118,25 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
#define DRIVER_NAME "bfin_sir"
static void bfin_sir_hw_init(void)
static int bfin_sir_hw_init(void)
{
int ret = -ENODEV;
#ifdef CONFIG_BFIN_SIR0
peripheral_request(P_UART0_TX, DRIVER_NAME);
peripheral_request(P_UART0_RX, DRIVER_NAME);
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
#ifdef CONFIG_BFIN_SIR1
peripheral_request(P_UART1_TX, DRIVER_NAME);
peripheral_request(P_UART1_RX, DRIVER_NAME);
ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
SSYNC();
return ret;
}
include/asm-blackfin/mach-bf527/defBF527.h
+1
View File
@@ -302,6 +302,7 @@
#define PHYIE 0x00000001 /* PHY_INT Interrupt Enable */
#define RXDWA 0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */
#define RXCKS 0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */
#define TXDWA 0x00000010 /* Transmit Frame DMA Word Alignment (Odd/Even*) */
#define MDCDIV 0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */
#define SET_MDCDIV(x) (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */
include/asm-blackfin/mach-bf527/mem_init.h
-27
View File
@@ -146,33 +146,6 @@
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_SIZE == 128)
#define SDRAM_SIZE EBSZ_128
#endif
#if (CONFIG_MEM_SIZE == 64)
#define SDRAM_SIZE EBSZ_64
#endif
#if (CONFIG_MEM_SIZE == 32)
#define SDRAM_SIZE EBSZ_32
#endif
#if (CONFIG_MEM_SIZE == 16)
#define SDRAM_SIZE EBSZ_16
#endif
#if (CONFIG_MEM_ADD_WIDTH == 11)
#define SDRAM_WIDTH EBCAW_11
#endif
#if (CONFIG_MEM_ADD_WIDTH == 10)
#define SDRAM_WIDTH EBCAW_10
#endif
#if (CONFIG_MEM_ADD_WIDTH == 9)
#define SDRAM_WIDTH EBCAW_9
#endif
#if (CONFIG_MEM_ADD_WIDTH == 8)
#define SDRAM_WIDTH EBCAW_8
#endif
#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE)
/* Equation from section 17 (p17-46) of BF533 HRM */
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
include/asm-blackfin/mach-bf533/bfin_sir.h
+9 -4
View File
@@ -110,11 +110,16 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
#define DRIVER_NAME "bfin_sir"
static void bfin_sir_hw_init(void)
static int bfin_sir_hw_init(void)
{
int ret = -ENODEV;
#ifdef CONFIG_BFIN_SIR0
peripheral_request(P_UART0_TX, DRIVER_NAME);
peripheral_request(P_UART0_RX, DRIVER_NAME);
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
SSYNC();
return ret;
}
include/asm-blackfin/mach-bf533/mem_init.h
-27
View File
@@ -133,33 +133,6 @@
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_SIZE == 128)
#define SDRAM_SIZE EBSZ_128
#endif
#if (CONFIG_MEM_SIZE == 64)
#define SDRAM_SIZE EBSZ_64
#endif
#if (CONFIG_MEM_SIZE == 32)
#define SDRAM_SIZE EBSZ_32
#endif
#if (CONFIG_MEM_SIZE == 16)
#define SDRAM_SIZE EBSZ_16
#endif
#if (CONFIG_MEM_ADD_WIDTH == 11)
#define SDRAM_WIDTH EBCAW_11
#endif
#if (CONFIG_MEM_ADD_WIDTH == 10)
#define SDRAM_WIDTH EBCAW_10
#endif
#if (CONFIG_MEM_ADD_WIDTH == 9)
#define SDRAM_WIDTH EBCAW_9
#endif
#if (CONFIG_MEM_ADD_WIDTH == 8)
#define SDRAM_WIDTH EBCAW_8
#endif
#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE)
/* Equation from section 17 (p17-46) of BF533 HRM */
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
include/asm-blackfin/mach-bf537/bfin_sir.h
+15 -6
View File
@@ -118,16 +118,25 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
#define DRIVER_NAME "bfin_sir"
static void bfin_sir_hw_init(void)
static int bfin_sir_hw_init(void)
{
int ret = -ENODEV;
#ifdef CONFIG_BFIN_SIR0
peripheral_request(P_UART0_TX, DRIVER_NAME);
peripheral_request(P_UART0_RX, DRIVER_NAME);
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
#ifdef CONFIG_BFIN_SIR1
peripheral_request(P_UART1_TX, DRIVER_NAME);
peripheral_request(P_UART1_RX, DRIVER_NAME);
ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
SSYNC();
return ret;
}
include/asm-blackfin/mach-bf537/defBF537.h
+1
View File
@@ -290,6 +290,7 @@
#define PHYIE 0x00000001 /* PHY_INT Interrupt Enable */
#define RXDWA 0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */
#define RXCKS 0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */
#define TXDWA 0x00000010 /* Transmit Frame DMA Word Alignment (Odd/Even*) */
#define MDCDIV 0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */
#define SET_MDCDIV(x) (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */
include/asm-blackfin/mach-bf537/mem_init.h
-27
View File
@@ -139,33 +139,6 @@
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_SIZE == 128)
#define SDRAM_SIZE EBSZ_128
#endif
#if (CONFIG_MEM_SIZE == 64)
#define SDRAM_SIZE EBSZ_64
#endif
#if (CONFIG_MEM_SIZE == 32)
#define SDRAM_SIZE EBSZ_32
#endif
#if (CONFIG_MEM_SIZE == 16)
#define SDRAM_SIZE EBSZ_16
#endif
#if (CONFIG_MEM_ADD_WIDTH == 11)
#define SDRAM_WIDTH EBCAW_11
#endif
#if (CONFIG_MEM_ADD_WIDTH == 10)
#define SDRAM_WIDTH EBCAW_10
#endif
#if (CONFIG_MEM_ADD_WIDTH == 9)
#define SDRAM_WIDTH EBCAW_9
#endif
#if (CONFIG_MEM_ADD_WIDTH == 8)
#define SDRAM_WIDTH EBCAW_8
#endif
#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE)
/* Equation from section 17 (p17-46) of BF533 HRM */
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
include/asm-blackfin/mach-bf548/bfin_sir.h
+27 -10
View File
@@ -124,26 +124,43 @@ struct bfin_sir_self {
#define DRIVER_NAME "bfin_sir"
static void bfin_sir_hw_init(void)
static int bfin_sir_hw_init(void)
{
int ret = -ENODEV;
#ifdef CONFIG_BFIN_SIR0
peripheral_request(P_UART0_TX, DRIVER_NAME);
peripheral_request(P_UART0_RX, DRIVER_NAME);
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
#ifdef CONFIG_BFIN_SIR1
peripheral_request(P_UART1_TX, DRIVER_NAME);
peripheral_request(P_UART1_RX, DRIVER_NAME);
ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
#ifdef CONFIG_BFIN_SIR2
peripheral_request(P_UART2_TX, DRIVER_NAME);
peripheral_request(P_UART2_RX, DRIVER_NAME);
ret = peripheral_request(P_UART2_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART2_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
#ifdef CONFIG_BFIN_SIR3
peripheral_request(P_UART3_TX, DRIVER_NAME);
peripheral_request(P_UART3_RX, DRIVER_NAME);
ret = peripheral_request(P_UART3_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART3_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
SSYNC();
return ret;
}
include/asm-blackfin/mach-bf548/gpio.h
+8
View File
@@ -209,3 +209,11 @@ struct gpio_port_t {
unsigned short dummy7;
unsigned int port_mux;
};
struct gpio_port_s {
unsigned short fer;
unsigned short data;
unsigned short dir;
unsigned short inen;
unsigned int mux;
};
include/asm-blackfin/mach-bf561/bfin_sir.h
+9 -4
View File
@@ -110,11 +110,16 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
#define DRIVER_NAME "bfin_sir"
static void bfin_sir_hw_init(void)
static int bfin_sir_hw_init(void)
{
int ret = -ENODEV;
#ifdef CONFIG_BFIN_SIR0
peripheral_request(P_UART0_TX, DRIVER_NAME);
peripheral_request(P_UART0_RX, DRIVER_NAME);
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
if (ret)
return ret;
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
if (ret)
return ret;
#endif
SSYNC();
return ret;
}
include/asm-blackfin/mach-bf561/mem_init.h
-27
View File
@@ -131,33 +131,6 @@
#define SDRAM_CL CL_3
#endif
#if (CONFIG_MEM_SIZE == 128)
#define SDRAM_SIZE EB0_SZ_128
#endif
#if (CONFIG_MEM_SIZE == 64)
#define SDRAM_SIZE EB0_SZ_64
#endif
#if ( CONFIG_MEM_SIZE == 32)
#define SDRAM_SIZE EB0_SZ_32
#endif
#if (CONFIG_MEM_SIZE == 16)
#define SDRAM_SIZE EB0_SZ_16
#endif
#if (CONFIG_MEM_ADD_WIDTH == 11)
#define SDRAM_WIDTH EB0_CAW_11
#endif
#if (CONFIG_MEM_ADD_WIDTH == 10)
#define SDRAM_WIDTH EB0_CAW_10
#endif
#if (CONFIG_MEM_ADD_WIDTH == 9)
#define SDRAM_WIDTH EB0_CAW_9
#endif
#if (CONFIG_MEM_ADD_WIDTH == 8)
#define SDRAM_WIDTH EB0_CAW_8
#endif
#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EB0_E)
/* Equation from section 17 (p17-46) of BF533 HRM */
#define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num)
include/asm-blackfin/module.h
+3 -2
View File
@@ -6,8 +6,6 @@
#define Elf_Shdr Elf32_Shdr
#define Elf_Sym Elf32_Sym
#define Elf_Ehdr Elf32_Ehdr
#define FLG_CODE_IN_L1 0x10
#define FLG_DATA_IN_L1 0x20
struct mod_arch_specific {
Elf_Shdr *text_l1;
@@ -15,5 +13,8 @@ struct mod_arch_specific {
Elf_Shdr *bss_a_l1;
Elf_Shdr *data_b_l1;
Elf_Shdr *bss_b_l1;
Elf_Shdr *text_l2;
Elf_Shdr *data_l2;
Elf_Shdr *bss_l2;
};
#endif /* _ASM_BFIN_MODULE_H */
include/asm-blackfin/namei.h
-19
View File
@@ -1,19 +0,0 @@
/*
* linux/include/asm/namei.h
*
* Included from linux/fs/namei.c
*
* Changes made by Lineo Inc. May 2001
*/
#ifndef __BFIN_NAMEI_H
#define __BFIN_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif
include/asm-blackfin/processor.h
+20 -1
View File
@@ -112,7 +112,26 @@ unsigned long get_wchan(struct task_struct *p);
static inline uint32_t __pure bfin_revid(void)
{
/* stored in the upper 4 bits */
return bfin_read_CHIPID() >> 28;
uint32_t revid = bfin_read_CHIPID() >> 28;
#ifdef CONFIG_BF52x
/* ANOMALY_05000357
* Incorrect Revision Number in DSPID Register
*/
if (revid == 0)
switch (bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI)) {
case 0x0010:
revid = 0;
break;
case 0x2796:
revid = 1;
break;
default:
revid = 0xFFFF;
break;
}
#endif
return revid;
}
static inline uint32_t __pure bfin_compiled_revid(void)
include/asm-cris/dma-mapping.h
+1 -1
View File
@@ -120,7 +120,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
}
static inline int
dma_mapping_error(dma_addr_t dma_addr)
dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return 0;
}
include/asm-cris/namei.h
-17
View File
@@ -1,17 +0,0 @@
/* $Id: namei.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $
* linux/include/asm-cris/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __CRIS_NAMEI_H
#define __CRIS_NAMEI_H
/* used to find file-system prefixes for doing emulations
* see for example asm-sparc/namei.h
* we don't use it...
*/
#define __emul_prefix() NULL
#endif /* __CRIS_NAMEI_H */
include/asm-frv/dma-mapping.h
+1 -1
View File
@@ -126,7 +126,7 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele
}
static inline
int dma_mapping_error(dma_addr_t dma_addr)
int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return 0;
}
include/asm-frv/namei.h
-18
View File
@@ -1,18 +0,0 @@
/*
* include/asm-frv/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __ASM_NAMEI_H
#define __ASM_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif
include/asm-generic/dma-mapping-broken.h
+1 -1
View File
@@ -61,7 +61,7 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
#define dma_sync_sg_for_device dma_sync_sg_for_cpu
extern int
dma_mapping_error(dma_addr_t dma_addr);
dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
extern int
dma_supported(struct device *dev, u64 mask);
include/asm-generic/dma-mapping.h
+2 -2
View File
@@ -144,9 +144,9 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
}
static inline int
dma_mapping_error(dma_addr_t dma_addr)
dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return pci_dma_mapping_error(dma_addr);
return pci_dma_mapping_error(to_pci_dev(dev), dma_addr);
}
include/asm-generic/gpio.h
+1 -1
View File
@@ -13,7 +13,7 @@
*
* While the GPIO programming interface defines valid GPIO numbers
* to be in the range 0..MAX_INT, this library restricts them to the
* smaller range 0..ARCH_NR_GPIOS.
* smaller range 0..ARCH_NR_GPIOS-1.
*/
#ifndef ARCH_NR_GPIOS
include/asm-generic/pci-dma-compat.h
+2 -2
View File
@@ -99,9 +99,9 @@ pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg,
}
static inline int
pci_dma_mapping_error(dma_addr_t dma_addr)
pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
{
return dma_mapping_error(dma_addr);
return dma_mapping_error(&pdev->dev, dma_addr);
}
#endif
include/asm-generic/syscall.h
+141
View File
@@ -0,0 +1,141 @@
/*
* Access to user system call parameters and results
*
* Copyright (C) 2008 Red Hat, Inc. All rights reserved.
*
* This copyrighted material is made available to anyone wishing to use,
* modify, copy, or redistribute it subject to the terms and conditions
* of the GNU General Public License v.2.
*
* This file is a stub providing documentation for what functions
* asm-ARCH/syscall.h files need to define. Most arch definitions
* will be simple inlines.
*
* All of these functions expect to be called with no locks,
* and only when the caller is sure that the task of interest
* cannot return to user mode while we are looking at it.
*/
#ifndef _ASM_SYSCALL_H
#define _ASM_SYSCALL_H 1
struct task_struct;
struct pt_regs;
/**
* syscall_get_nr - find what system call a task is executing
* @task: task of interest, must be blocked
* @regs: task_pt_regs() of @task
*
* If @task is executing a system call or is at system call
* tracing about to attempt one, returns the system call number.
* If @task is not executing a system call, i.e. it's blocked
* inside the kernel for a fault or signal, returns -1.
*
* It's only valid to call this when @task is known to be blocked.
*/
long syscall_get_nr(struct task_struct *task, struct pt_regs *regs);
/**
* syscall_rollback - roll back registers after an aborted system call
* @task: task of interest, must be in system call exit tracing
* @regs: task_pt_regs() of @task
*
* It's only valid to call this when @task is stopped for system
* call exit tracing (due to TIF_SYSCALL_TRACE or TIF_SYSCALL_AUDIT),
* after tracehook_report_syscall_entry() returned nonzero to prevent
* the system call from taking place.
*
* This rolls back the register state in @regs so it's as if the
* system call instruction was a no-op. The registers containing
* the system call number and arguments are as they were before the
* system call instruction. This may not be the same as what the
* register state looked like at system call entry tracing.
*/
void syscall_rollback(struct task_struct *task, struct pt_regs *regs);
/**
* syscall_get_error - check result of traced system call
* @task: task of interest, must be blocked
* @regs: task_pt_regs() of @task
*
* Returns 0 if the system call succeeded, or -ERRORCODE if it failed.
*
* It's only valid to call this when @task is stopped for tracing on exit
* from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
*/
long syscall_get_error(struct task_struct *task, struct pt_regs *regs);
/**
* syscall_get_return_value - get the return value of a traced system call
* @task: task of interest, must be blocked
* @regs: task_pt_regs() of @task
*
* Returns the return value of the successful system call.
* This value is meaningless if syscall_get_error() returned nonzero.
*
* It's only valid to call this when @task is stopped for tracing on exit
* from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
*/
long syscall_get_return_value(struct task_struct *task, struct pt_regs *regs);
/**
* syscall_set_return_value - change the return value of a traced system call
* @task: task of interest, must be blocked
* @regs: task_pt_regs() of @task
* @error: negative error code, or zero to indicate success
* @val: user return value if @error is zero
*
* This changes the results of the system call that user mode will see.
* If @error is zero, the user sees a successful system call with a
* return value of @val. If @error is nonzero, it's a negated errno
* code; the user sees a failed system call with this errno code.
*
* It's only valid to call this when @task is stopped for tracing on exit
* from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
*/
void syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
int error, long val);
/**
* syscall_get_arguments - extract system call parameter values
* @task: task of interest, must be blocked
* @regs: task_pt_regs() of @task
* @i: argument index [0,5]
* @n: number of arguments; n+i must be [1,6].
* @args: array filled with argument values
*
* Fetches @n arguments to the system call starting with the @i'th argument
* (from 0 through 5). Argument @i is stored in @args[0], and so on.
* An arch inline version is probably optimal when @i and @n are constants.
*
* It's only valid to call this when @task is stopped for tracing on
* entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
* It's invalid to call this with @i + @n > 6; we only support system calls
* taking up to 6 arguments.
*/
void syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
unsigned int i, unsigned int n, unsigned long *args);
/**
* syscall_set_arguments - change system call parameter value
* @task: task of interest, must be in system call entry tracing
* @regs: task_pt_regs() of @task
* @i: argument index [0,5]
* @n: number of arguments; n+i must be [1,6].
* @args: array of argument values to store
*
* Changes @n arguments to the system call starting with the @i'th argument.
* @n'th argument to @val. Argument @i gets value @args[0], and so on.
* An arch inline version is probably optimal when @i and @n are constants.
*
* It's only valid to call this when @task is stopped for tracing on
* entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT.
* It's invalid to call this with @i + @n > 6; we only support system calls
* taking up to 6 arguments.
*/
void syscall_set_arguments(struct task_struct *task, struct pt_regs *regs,
unsigned int i, unsigned int n,
const unsigned long *args);
#endif /* _ASM_SYSCALL_H */
include/asm-generic/vmlinux.lds.h
+5 -1
View File
@@ -221,6 +221,7 @@
* during second ld run in second ld pass when generating System.map */
#define TEXT_TEXT \
ALIGN_FUNCTION(); \
*(.text.hot) \
*(.text) \
*(.ref.text) \
*(.text.init.refok) \
@@ -230,7 +231,8 @@
CPU_KEEP(init.text) \
CPU_KEEP(exit.text) \
MEM_KEEP(init.text) \
MEM_KEEP(exit.text)
MEM_KEEP(exit.text) \
*(.text.unlikely)
/* sched.text is aling to function alignment to secure we have same
@@ -359,6 +361,8 @@
}
#define INITCALLS \
*(.initcallearly.init) \
__early_initcall_end = .; \
*(.initcall0.init) \
*(.initcall0s.init) \
*(.initcall1.init) \
include/asm-h8300/namei.h
-17
View File
@@ -1,17 +0,0 @@
/*
* linux/include/asm-h8300/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __H8300_NAMEI_H
#define __H8300_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif
include/asm-ia64/machvec.h
+1 -1
View File
@@ -54,7 +54,7 @@ typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_
typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int);
typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int);
typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int);
typedef int ia64_mv_dma_mapping_error (dma_addr_t dma_addr);
typedef int ia64_mv_dma_mapping_error(struct device *, dma_addr_t dma_addr);
typedef int ia64_mv_dma_supported (struct device *, u64);
typedef dma_addr_t ia64_mv_dma_map_single_attrs (struct device *, void *, size_t, int, struct dma_attrs *);
include/asm-ia64/namei.h
-25
View File
@@ -1,25 +0,0 @@
#ifndef _ASM_IA64_NAMEI_H
#define _ASM_IA64_NAMEI_H
/*
* Modified 1998, 1999, 2001
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
*/
#include <asm/ptrace.h>
#include <asm/system.h>
#define EMUL_PREFIX_LINUX_IA32 "/emul/ia32-linux/"
static inline char *
__emul_prefix (void)
{
switch (current->personality) {
case PER_LINUX32:
return EMUL_PREFIX_LINUX_IA32;
default:
return NULL;
}
}
#endif /* _ASM_IA64_NAMEI_H */
include/asm-m32r/namei.h
-17
View File
@@ -1,17 +0,0 @@
#ifndef _ASM_M32R_NAMEI_H
#define _ASM_M32R_NAMEI_H
/*
* linux/include/asm-m32r/namei.h
*
* Included from linux/fs/namei.c
*/
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* _ASM_M32R_NAMEI_H */
include/asm-m68k/dma-mapping.h
+1 -1
View File
@@ -84,7 +84,7 @@ static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *s
{
}
static inline int dma_mapping_error(dma_addr_t handle)
static inline int dma_mapping_error(struct device *dev, dma_addr_t handle)
{
return 0;
}
include/asm-m68k/namei.h
-17
View File
@@ -1,17 +0,0 @@
/*
* linux/include/asm-m68k/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __M68K_NAMEI_H
#define __M68K_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif
include/asm-m68knommu/namei.h
-1
View File
@@ -1 +0,0 @@
#include <asm-m68k/namei.h>
include/asm-mips/dma-mapping.h
+1 -1
View File
@@ -42,7 +42,7 @@ extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
int nelems, enum dma_data_direction direction);
extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
int nelems, enum dma_data_direction direction);
extern int dma_mapping_error(dma_addr_t dma_addr);
extern int dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
extern int dma_supported(struct device *dev, u64 mask);
static inline int
include/asm-mips/namei.h
-11
View File
@@ -1,11 +0,0 @@
#ifndef _ASM_NAMEI_H
#define _ASM_NAMEI_H
/*
* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
*/
#define __emul_prefix() NULL
#endif /* _ASM_NAMEI_H */
include/asm-mn10300/dma-mapping.h
+1 -1
View File
@@ -182,7 +182,7 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
}
static inline
int dma_mapping_error(dma_addr_t dma_addr)
int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return 0;
}
include/asm-mn10300/namei.h
-22
View File
@@ -1,22 +0,0 @@
/* Emulation stuff
*
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public Licence
* as published by the Free Software Foundation; either version
* 2 of the Licence, or (at your option) any later version.
*/
#ifndef _ASM_NAMEI_H
#define _ASM_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* _ASM_NAMEI_H */
include/asm-parisc/cacheflush.h
+2 -2
View File
@@ -45,9 +45,9 @@ void flush_cache_mm(struct mm_struct *mm);
extern void flush_dcache_page(struct page *page);
#define flush_dcache_mmap_lock(mapping) \
write_lock_irq(&(mapping)->tree_lock)
spin_lock_irq(&(mapping)->tree_lock)
#define flush_dcache_mmap_unlock(mapping) \
write_unlock_irq(&(mapping)->tree_lock)
spin_unlock_irq(&(mapping)->tree_lock)
#define flush_icache_page(vma,page) do { \
flush_kernel_dcache_page(page); \
include/asm-parisc/dma-mapping.h
+1 -1
View File
@@ -248,6 +248,6 @@ void * sba_get_iommu(struct parisc_device *dev);
#endif
/* At the moment, we panic on error for IOMMU resource exaustion */
#define dma_mapping_error(x) 0
#define dma_mapping_error(dev, x) 0
#endif
include/asm-parisc/namei.h
-17
View File
@@ -1,17 +0,0 @@
/* $Id: namei.h,v 1.1 1996/12/13 14:48:21 jj Exp $
* linux/include/asm-parisc/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __PARISC_NAMEI_H
#define __PARISC_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* __PARISC_NAMEI_H */
include/asm-powerpc/dma-mapping.h
+1 -1
View File
@@ -415,7 +415,7 @@ static inline void dma_sync_sg_for_device(struct device *dev,
__dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
}
static inline int dma_mapping_error(dma_addr_t dma_addr)
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
#ifdef CONFIG_PPC64
return (dma_addr == DMA_ERROR_CODE);
include/asm-powerpc/kvm_ppc.h
+2 -1
View File
@@ -61,7 +61,8 @@ extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn,
u64 asid, u32 flags);
extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, u64 eaddr, u64 asid);
extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
gva_t eend, u32 asid);
extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode);
extern void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu);
include/asm-powerpc/namei.h
-20
View File
@@ -1,20 +0,0 @@
#ifndef _ASM_POWERPC_NAMEI_H
#define _ASM_POWERPC_NAMEI_H
#ifdef __KERNEL__
/*
* Adapted from include/asm-alpha/namei.h
*
* Included from fs/namei.c
*/
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_NAMEI_H */
include/asm-s390/kvm_host.h
+2 -2
View File
@@ -111,7 +111,7 @@ struct kvm_vcpu_stat {
u32 exit_validity;
u32 exit_instruction;
u32 instruction_lctl;
u32 instruction_lctg;
u32 instruction_lctlg;
u32 exit_program_interruption;
u32 exit_instr_and_program;
u32 deliver_emergency_signal;
@@ -231,5 +231,5 @@ struct kvm_arch{
struct kvm_s390_float_interrupt float_int;
};
extern int sie64a(struct kvm_s390_sie_block *, __u64 *);
extern int sie64a(struct kvm_s390_sie_block *, unsigned long *);
#endif
include/asm-s390/namei.h
-21
View File
@@ -1,21 +0,0 @@
/*
* include/asm-s390/namei.h
*
* S390 version
*
* Derived from "include/asm-i386/namei.h"
*
* Included from linux/fs/namei.c
*/
#ifndef __S390_NAMEI_H
#define __S390_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* __S390_NAMEI_H */
include/asm-sh/dma-mapping.h
+1 -1
View File
@@ -171,7 +171,7 @@ static inline int dma_get_cache_alignment(void)
return L1_CACHE_BYTES;
}
static inline int dma_mapping_error(dma_addr_t dma_addr)
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return dma_addr == 0;
}
include/asm-sh/namei.h
-17
View File
@@ -1,17 +0,0 @@
/* $Id: namei.h,v 1.3 2000/07/04 06:24:49 gniibe Exp $
* linux/include/asm-sh/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __ASM_SH_NAMEI_H
#define __ASM_SH_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* __ASM_SH_NAMEI_H */
include/asm-sparc/dma-mapping_64.h
+1 -1
View File
@@ -135,7 +135,7 @@ static inline void dma_sync_sg_for_device(struct device *dev,
/* No flushing needed to sync cpu writes to the device. */
}
static inline int dma_mapping_error(dma_addr_t dma_addr)
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return (dma_addr == DMA_ERROR_CODE);
}
include/asm-sparc/namei.h
-8
View File
@@ -1,8 +0,0 @@
#ifndef ___ASM_SPARC_NAMEI_H
#define ___ASM_SPARC_NAMEI_H
#if defined(__sparc__) && defined(__arch64__)
#include <asm-sparc/namei_64.h>
#else
#include <asm-sparc/namei_32.h>
#endif
#endif
include/asm-sparc/namei_32.h
-13
View File
@@ -1,13 +0,0 @@
/*
* linux/include/asm-sparc/namei.h
*
* Routines to handle famous /usr/gnemul/s*.
* Included from linux/fs/namei.c
*/
#ifndef __SPARC_NAMEI_H
#define __SPARC_NAMEI_H
#define __emul_prefix() NULL
#endif /* __SPARC_NAMEI_H */
include/asm-sparc/namei_64.h
-13
View File
@@ -1,13 +0,0 @@
/*
* linux/include/asm-sparc64/namei.h
*
* Routines to handle famous /usr/gnemul/s*.
* Included from linux/fs/namei.c
*/
#ifndef __SPARC64_NAMEI_H
#define __SPARC64_NAMEI_H
#define __emul_prefix() NULL
#endif /* __SPARC64_NAMEI_H */
include/asm-sparc/pci_32.h
+2 -1
View File
@@ -154,7 +154,8 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0)
static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
static inline int pci_dma_mapping_error(struct pci_dev *pdev,
dma_addr_t dma_addr)
{
return (dma_addr == PCI_DMA_ERROR_CODE);
}
include/asm-sparc/pci_64.h
+3 -2
View File
@@ -140,9 +140,10 @@ extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
#define PCI64_ADDR_BASE 0xfffc000000000000UL
static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
static inline int pci_dma_mapping_error(struct pci_dev *pdev,
dma_addr_t dma_addr)
{
return dma_mapping_error(dma_addr);
return dma_mapping_error(&pdev->dev, dma_addr);
}
#ifdef CONFIG_PCI
include/asm-sparc64/namei.h
-1
View File
@@ -1 +0,0 @@
#include <asm-sparc/namei.h>
include/asm-um/namei.h
-6
View File
@@ -1,6 +0,0 @@
#ifndef __UM_NAMEI_H
#define __UM_NAMEI_H
#include "asm/arch/namei.h"
#endif
include/asm-v850/namei.h
-17
View File
@@ -1,17 +0,0 @@
/*
* linux/include/asm-v850/namei.h
*
* Included from linux/fs/namei.c
*/
#ifndef __V850_NAMEI_H__
#define __V850_NAMEI_H__
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* __V850_NAMEI_H__ */
include/asm-x86/device.h
+3
View File
@@ -5,6 +5,9 @@ struct dev_archdata {
#ifdef CONFIG_ACPI
void *acpi_handle;
#endif
#ifdef CONFIG_X86_64
struct dma_mapping_ops *dma_ops;
#endif
#ifdef CONFIG_DMAR
void *iommu; /* hook for IOMMU specific extension */
#endif
include/asm-x86/dma-mapping.h
+68 -31
View File
@@ -17,7 +17,8 @@ extern int panic_on_overflow;
extern int force_iommu;
struct dma_mapping_ops {
int (*mapping_error)(dma_addr_t dma_addr);
int (*mapping_error)(struct device *dev,
dma_addr_t dma_addr);
void* (*alloc_coherent)(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t gfp);
void (*free_coherent)(struct device *dev, size_t size,
@@ -56,14 +57,32 @@ struct dma_mapping_ops {
int is_phys;
};
extern const struct dma_mapping_ops *dma_ops;
extern struct dma_mapping_ops *dma_ops;
static inline int dma_mapping_error(dma_addr_t dma_addr)
static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
{
if (dma_ops->mapping_error)
return dma_ops->mapping_error(dma_addr);
#ifdef CONFIG_X86_32
return dma_ops;
#else
if (unlikely(!dev) || !dev->archdata.dma_ops)
return dma_ops;
else
return dev->archdata.dma_ops;
#endif
}
/* Make sure we keep the same behaviour */
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
#ifdef CONFIG_X86_32
return 0;
#else
struct dma_mapping_ops *ops = get_dma_ops(dev);
if (ops->mapping_error)
return ops->mapping_error(dev, dma_addr);
return (dma_addr == bad_dma_address);
#endif
}
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
@@ -83,44 +102,53 @@ static inline dma_addr_t
dma_map_single(struct device *hwdev, void *ptr, size_t size,
int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
return dma_ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
}
static inline void
dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(dev);
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->unmap_single)
dma_ops->unmap_single(dev, addr, size, direction);
if (ops->unmap_single)
ops->unmap_single(dev, addr, size, direction);
}
static inline int
dma_map_sg(struct device *hwdev, struct scatterlist *sg,
int nents, int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
return dma_ops->map_sg(hwdev, sg, nents, direction);
return ops->map_sg(hwdev, sg, nents, direction);
}
static inline void
dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->unmap_sg)
dma_ops->unmap_sg(hwdev, sg, nents, direction);
if (ops->unmap_sg)
ops->unmap_sg(hwdev, sg, nents, direction);
}
static inline void
dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
size_t size, int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->sync_single_for_cpu)
dma_ops->sync_single_for_cpu(hwdev, dma_handle, size,
direction);
if (ops->sync_single_for_cpu)
ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
flush_write_buffers();
}
@@ -128,10 +156,11 @@ static inline void
dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
size_t size, int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->sync_single_for_device)
dma_ops->sync_single_for_device(hwdev, dma_handle, size,
direction);
if (ops->sync_single_for_device)
ops->sync_single_for_device(hwdev, dma_handle, size, direction);
flush_write_buffers();
}
@@ -139,11 +168,12 @@ static inline void
dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
unsigned long offset, size_t size, int direction)
{
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->sync_single_range_for_cpu)
dma_ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
size, direction);
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
if (ops->sync_single_range_for_cpu)
ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
size, direction);
flush_write_buffers();
}
@@ -152,11 +182,12 @@ dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
unsigned long offset, size_t size,
int direction)
{
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->sync_single_range_for_device)
dma_ops->sync_single_range_for_device(hwdev, dma_handle,
offset, size, direction);
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
if (ops->sync_single_range_for_device)
ops->sync_single_range_for_device(hwdev, dma_handle,
offset, size, direction);
flush_write_buffers();
}
@@ -164,9 +195,11 @@ static inline void
dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
int nelems, int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->sync_sg_for_cpu)
dma_ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
if (ops->sync_sg_for_cpu)
ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
flush_write_buffers();
}
@@ -174,9 +207,11 @@ static inline void
dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
int nelems, int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(hwdev);
BUG_ON(!valid_dma_direction(direction));
if (dma_ops->sync_sg_for_device)
dma_ops->sync_sg_for_device(hwdev, sg, nelems, direction);
if (ops->sync_sg_for_device)
ops->sync_sg_for_device(hwdev, sg, nelems, direction);
flush_write_buffers();
}
@@ -185,9 +220,11 @@ static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
size_t offset, size_t size,
int direction)
{
struct dma_mapping_ops *ops = get_dma_ops(dev);
BUG_ON(!valid_dma_direction(direction));
return dma_ops->map_single(dev, page_to_phys(page)+offset,
size, direction);
return ops->map_single(dev, page_to_phys(page) + offset,
size, direction);
}
static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
include/asm-x86/gpio.h
-6
View File
@@ -16,10 +16,6 @@
#ifndef _ASM_I386_GPIO_H
#define _ASM_I386_GPIO_H
#ifdef CONFIG_X86_RDC321X
#include <gpio.h>
#else /* CONFIG_X86_RDC321X */
#include <asm-generic/gpio.h>
#ifdef CONFIG_GPIOLIB
@@ -57,6 +53,4 @@ static inline int irq_to_gpio(unsigned int irq)
#endif /* CONFIG_GPIOLIB */
#endif /* CONFIG_X86_RDC321X */
#endif /* _ASM_I386_GPIO_H */
include/asm-x86/iommu.h
+1
View File
@@ -3,6 +3,7 @@
extern void pci_iommu_shutdown(void);
extern void no_iommu_init(void);
extern struct dma_mapping_ops nommu_dma_ops;
extern int force_iommu, no_iommu;
extern int iommu_detected;
include/asm-x86/kexec.h
+10 -8
View File
@@ -10,14 +10,15 @@
# define VA_PTE_0 5
# define PA_PTE_1 6
# define VA_PTE_1 7
# define PA_SWAP_PAGE 8
# ifdef CONFIG_X86_PAE
# define PA_PMD_0 8
# define VA_PMD_0 9
# define PA_PMD_1 10
# define VA_PMD_1 11
# define PAGES_NR 12
# define PA_PMD_0 9
# define VA_PMD_0 10
# define PA_PMD_1 11
# define VA_PMD_1 12
# define PAGES_NR 13
# else
# define PAGES_NR 8
# define PAGES_NR 9
# endif
#else
# define PA_CONTROL_PAGE 0
@@ -152,11 +153,12 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
}
#ifdef CONFIG_X86_32
asmlinkage NORET_TYPE void
asmlinkage unsigned long
relocate_kernel(unsigned long indirection_page,
unsigned long control_page,
unsigned long start_address,
unsigned int has_pae) ATTRIB_NORET;
unsigned int has_pae,
unsigned int preserve_context);
#else
NORET_TYPE void
relocate_kernel(unsigned long indirection_page,
include/asm-x86/kvm_host.h
+1
View File
@@ -556,6 +556,7 @@ int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
void kvm_enable_tdp(void);
void kvm_disable_tdp(void);
int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
int complete_pio(struct kvm_vcpu *vcpu);
include/asm-x86/mach-summit/mach_apic.h
+1 -1
View File
@@ -122,7 +122,7 @@ static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
static inline physid_mask_t apicid_to_cpu_present(int apicid)
{
return physid_mask_of_physid(0);
return physid_mask_of_physid(apicid);
}
static inline void setup_portio_remap(void)
include/asm-x86/namei.h
-11
View File
@@ -1,11 +0,0 @@
#ifndef _ASM_X86_NAMEI_H
#define _ASM_X86_NAMEI_H
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* _ASM_X86_NAMEI_H */
include/asm-x86/pgtable.h
+6 -3
View File
@@ -18,6 +18,7 @@
#define _PAGE_BIT_UNUSED2 10
#define _PAGE_BIT_UNUSED3 11
#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
@@ -34,6 +35,8 @@
#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
#define __HAVE_ARCH_PTE_SPECIAL
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
@@ -54,7 +57,7 @@
/* Set of bits not changed in pte_modify */
#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
_PAGE_ACCESSED | _PAGE_DIRTY)
_PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
#define _PAGE_CACHE_WB (0)
@@ -180,7 +183,7 @@ static inline int pte_exec(pte_t pte)
static inline int pte_special(pte_t pte)
{
return 0;
return pte_val(pte) & _PAGE_SPECIAL;
}
static inline int pmd_large(pmd_t pte)
@@ -246,7 +249,7 @@ static inline pte_t pte_clrglobal(pte_t pte)
static inline pte_t pte_mkspecial(pte_t pte)
{
return pte;
return __pte(pte_val(pte) | _PAGE_SPECIAL);
}
extern pteval_t __supported_pte_mask;
include/asm-x86/swiotlb.h
+1 -1
View File
@@ -35,7 +35,7 @@ extern int swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg,
int nents, int direction);
extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg,
int nents, int direction);
extern int swiotlb_dma_mapping_error(dma_addr_t dma_addr);
extern int swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr);
extern void swiotlb_free_coherent(struct device *hwdev, size_t size,
void *vaddr, dma_addr_t dma_handle);
extern int swiotlb_dma_supported(struct device *hwdev, u64 mask);
include/asm-x86/uaccess.h
+1
View File
@@ -451,3 +451,4 @@ extern struct movsl_mask {
#endif
#endif
include/asm-xtensa/dma-mapping.h
+1 -1
View File
@@ -139,7 +139,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
consistent_sync(sg_virt(sg), sg->length, dir);
}
static inline int
dma_mapping_error(dma_addr_t dma_addr)
dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
return 0;
}
include/asm-xtensa/namei.h
-26
View File
@@ -1,26 +0,0 @@
/*
* include/asm-xtensa/namei.h
*
* Included from linux/fs/namei.c
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2001 - 2005 Tensilica Inc.
*/
#ifndef _XTENSA_NAMEI_H
#define _XTENSA_NAMEI_H
#ifdef __KERNEL__
/* This dummy routine maybe changed to something useful
* for /usr/gnemul/ emulation stuff.
* Look at asm-sparc/namei.h for details.
*/
#define __emul_prefix() NULL
#endif /* __KERNEL__ */
#endif /* _XTENSA_NAMEI_H */
include/linux/aio.h
-1
View File
@@ -7,7 +7,6 @@
#include <linux/uio.h>
#include <asm/atomic.h>
#include <linux/uio.h>
#define AIO_MAXSEGS 4
#define AIO_KIOGRP_NR_ATOMIC 8
include/linux/coda_linux.h
+1 -1
View File
@@ -37,7 +37,7 @@ extern const struct file_operations coda_ioctl_operations;
/* operations shared over more than one file */
int coda_open(struct inode *i, struct file *f);
int coda_release(struct inode *i, struct file *f);
int coda_permission(struct inode *inode, int mask, struct nameidata *nd);
int coda_permission(struct inode *inode, int mask);
int coda_revalidate_inode(struct dentry *);
int coda_getattr(struct vfsmount *, struct dentry *, struct kstat *);
int coda_setattr(struct dentry *, struct iattr *);
include/linux/crash_dump.h
+6
View File
@@ -8,7 +8,13 @@
#include <linux/proc_fs.h>
#define ELFCORE_ADDR_MAX (-1ULL)
#ifdef CONFIG_PROC_VMCORE
extern unsigned long long elfcorehdr_addr;
#else
static const unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
#endif
extern ssize_t copy_oldmem_page(unsigned long, char *, size_t,
unsigned long, int);
extern const struct file_operations proc_vmcore_operations;
include/linux/fs.h
+31 -28
View File
@@ -60,6 +60,8 @@ extern int dir_notify_enable;
#define MAY_WRITE 2
#define MAY_READ 4
#define MAY_APPEND 8
#define MAY_ACCESS 16
#define MAY_OPEN 32
#define FMODE_READ 1
#define FMODE_WRITE 2
@@ -277,7 +279,7 @@ extern int dir_notify_enable;
#include <linux/types.h>
#include <linux/kdev_t.h>
#include <linux/dcache.h>
#include <linux/namei.h>
#include <linux/path.h>
#include <linux/stat.h>
#include <linux/cache.h>
#include <linux/kobject.h>
@@ -318,22 +320,23 @@ typedef void (dio_iodone_t)(struct kiocb *iocb, loff_t offset,
* Attribute flags. These should be or-ed together to figure out what
* has been changed!
*/
#define ATTR_MODE 1
#define ATTR_UID 2
#define ATTR_GID 4
#define ATTR_SIZE 8
#define ATTR_ATIME 16
#define ATTR_MTIME 32
#define ATTR_CTIME 64
#define ATTR_ATIME_SET 128
#define ATTR_MTIME_SET 256
#define ATTR_FORCE 512 /* Not a change, but a change it */
#define ATTR_ATTR_FLAG 1024
#define ATTR_KILL_SUID 2048
#define ATTR_KILL_SGID 4096
#define ATTR_FILE 8192
#define ATTR_KILL_PRIV 16384
#define ATTR_OPEN 32768 /* Truncating from open(O_TRUNC) */
#define ATTR_MODE (1 << 0)
#define ATTR_UID (1 << 1)
#define ATTR_GID (1 << 2)
#define ATTR_SIZE (1 << 3)
#define ATTR_ATIME (1 << 4)
#define ATTR_MTIME (1 << 5)
#define ATTR_CTIME (1 << 6)
#define ATTR_ATIME_SET (1 << 7)
#define ATTR_MTIME_SET (1 << 8)
#define ATTR_FORCE (1 << 9) /* Not a change, but a change it */
#define ATTR_ATTR_FLAG (1 << 10)
#define ATTR_KILL_SUID (1 << 11)
#define ATTR_KILL_SGID (1 << 12)
#define ATTR_FILE (1 << 13)
#define ATTR_KILL_PRIV (1 << 14)
#define ATTR_OPEN (1 << 15) /* Truncating from open(O_TRUNC) */
#define ATTR_TIMES_SET (1 << 16)
/*
* This is the Inode Attributes structure, used for notify_change(). It
@@ -499,7 +502,7 @@ struct backing_dev_info;
struct address_space {
struct inode *host; /* owner: inode, block_device */
struct radix_tree_root page_tree; /* radix tree of all pages */
rwlock_t tree_lock; /* and rwlock protecting it */
spinlock_t tree_lock; /* and lock protecting it */
unsigned int i_mmap_writable;/* count VM_SHARED mappings */
struct prio_tree_root i_mmap; /* tree of private and shared mappings */
struct list_head i_mmap_nonlinear;/*list VM_NONLINEAR mappings */
@@ -792,7 +795,7 @@ struct file {
#define f_dentry f_path.dentry
#define f_vfsmnt f_path.mnt
const struct file_operations *f_op;
atomic_t f_count;
atomic_long_t f_count;
unsigned int f_flags;
mode_t f_mode;
loff_t f_pos;
@@ -821,8 +824,8 @@ extern spinlock_t files_lock;
#define file_list_lock() spin_lock(&files_lock);
#define file_list_unlock() spin_unlock(&files_lock);
#define get_file(x) atomic_inc(&(x)->f_count)
#define file_count(x) atomic_read(&(x)->f_count)
#define get_file(x) atomic_long_inc(&(x)->f_count)
#define file_count(x) atomic_long_read(&(x)->f_count)
#ifdef CONFIG_DEBUG_WRITECOUNT
static inline void file_take_write(struct file *f)
@@ -1136,7 +1139,7 @@ extern int vfs_permission(struct nameidata *, int);
extern int vfs_create(struct inode *, struct dentry *, int, struct nameidata *);
extern int vfs_mkdir(struct inode *, struct dentry *, int);
extern int vfs_mknod(struct inode *, struct dentry *, int, dev_t);
extern int vfs_symlink(struct inode *, struct dentry *, const char *, int);
extern int vfs_symlink(struct inode *, struct dentry *, const char *);
extern int vfs_link(struct dentry *, struct inode *, struct dentry *);
extern int vfs_rmdir(struct inode *, struct dentry *);
extern int vfs_unlink(struct inode *, struct dentry *);
@@ -1272,7 +1275,7 @@ struct inode_operations {
void * (*follow_link) (struct dentry *, struct nameidata *);
void (*put_link) (struct dentry *, struct nameidata *, void *);
void (*truncate) (struct inode *);
int (*permission) (struct inode *, int, struct nameidata *);
int (*permission) (struct inode *, int);
int (*setattr) (struct dentry *, struct iattr *);
int (*getattr) (struct vfsmount *mnt, struct dentry *, struct kstat *);
int (*setxattr) (struct dentry *, const char *,const void *,size_t,int);
@@ -1696,9 +1699,9 @@ extern void init_special_inode(struct inode *, umode_t, dev_t);
extern void make_bad_inode(struct inode *);
extern int is_bad_inode(struct inode *);
extern const struct file_operations read_fifo_fops;
extern const struct file_operations write_fifo_fops;
extern const struct file_operations rdwr_fifo_fops;
extern const struct file_operations read_pipefifo_fops;
extern const struct file_operations write_pipefifo_fops;
extern const struct file_operations rdwr_pipefifo_fops;
extern int fs_may_remount_ro(struct super_block *);
@@ -1767,7 +1770,7 @@ extern int do_remount_sb(struct super_block *sb, int flags,
extern sector_t bmap(struct inode *, sector_t);
#endif
extern int notify_change(struct dentry *, struct iattr *);
extern int permission(struct inode *, int, struct nameidata *);
extern int inode_permission(struct inode *, int);
extern int generic_permission(struct inode *, int,
int (*check_acl)(struct inode *, int));
@@ -1831,7 +1834,7 @@ extern void clear_inode(struct inode *);
extern void destroy_inode(struct inode *);
extern struct inode *new_inode(struct super_block *);
extern int should_remove_suid(struct dentry *);
extern int remove_suid(struct dentry *);
extern int file_remove_suid(struct file *);
extern void __insert_inode_hash(struct inode *, unsigned long hashval);
extern void remove_inode_hash(struct inode *);
include/linux/fs_struct.h
+1 -2
View File
@@ -7,7 +7,7 @@ struct fs_struct {
atomic_t count;
rwlock_t lock;
int umask;
struct path root, pwd, altroot;
struct path root, pwd;
};
#define INIT_FS { \
@@ -19,7 +19,6 @@ struct fs_struct {
extern struct kmem_cache *fs_cachep;
extern void exit_fs(struct task_struct *);
extern void set_fs_altroot(void);
extern void set_fs_root(struct fs_struct *, struct path *);
extern void set_fs_pwd(struct fs_struct *, struct path *);
extern struct fs_struct *copy_fs_struct(struct fs_struct *);
include/linux/hugetlb.h
+4 -1
View File
@@ -273,7 +273,10 @@ struct hstate {};
#define huge_page_mask(h) PAGE_MASK
#define huge_page_order(h) 0
#define huge_page_shift(h) PAGE_SHIFT
#define pages_per_huge_page(h) 1
static inline unsigned int pages_per_huge_page(struct hstate *h)
{
return 1;
}
#endif
#endif /* _LINUX_HUGETLB_H */

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