Merge tag 'drm-misc-next-2020-07-16' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v5.9: UAPI Changes: Cross-subsystem Changes: - Add ckoenig as dma-buf maintainer. - Revert invalid fix for dma-fence-chain, and fix selftest. - Add fixmes to amifb about APUS support. - Use array3_size in fbcon_prepare_logo, and struct_size() in alloc_apertures. - Fix leaks in neofb, fb/savage and omapfb. - Other small fixes to fb code. - Convert some dt bindings to schema for some panels, and fix simple-framebuffer dt example. Core Changes: - Add DRM_FORMAT_MOD_GENERIC_16_16_TILE as alias to DRM_FORMAT_MOD_SAMSUNG_16_16_TILE, as it can be used more generic. - Add support for multiple DispID extension blocks in edid. - Use https instead of http for some of the urls. - Use drm_* macros for logging in mipi-dsi and fb-helper. - Further cleanup ttm_mem_reg handling. - Remove duplicated words in comments. Driver Changes: - Use __drm_atomic_helper_crtc_reset in all atomic drivers. - Add Amlogic Video FBC support to meson and fourcc to core. - Refactor hisilicon's hibmc_drv_vdac. - Create a TXP CRTC for vc4. - Rework cursor support in ast. - Fix runtime PM in STM. - Allow bigger cursors in vkms. - Cleanup sg handling in radeon and amdgpu, and stop creating dummy gtt nodes with ttm fixed. - Rework crtc handling in mgag200. - Miscellaneous small fixes to meson, vgem, bridge/dw-hdmi, panel/auo,b116xw03, panel/LG LB070WV8, lima, bridge/sil_sii8620, virtio, tilcdc. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8b360d65-f228-9286-d247-3004156a5254@linux.intel.com
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@@ -331,6 +331,7 @@ extern "C" {
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#define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07
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#define DRM_FORMAT_MOD_VENDOR_ARM 0x08
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#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09
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#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a
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/* add more to the end as needed */
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@@ -345,8 +346,33 @@ extern "C" {
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* When adding a new token please document the layout with a code comment,
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* similar to the fourcc codes above. drm_fourcc.h is considered the
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* authoritative source for all of these.
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*
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* Generic modifier names:
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*
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* DRM_FORMAT_MOD_GENERIC_* definitions are used to provide vendor-neutral names
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* for layouts which are common across multiple vendors. To preserve
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* compatibility, in cases where a vendor-specific definition already exists and
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* a generic name for it is desired, the common name is a purely symbolic alias
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* and must use the same numerical value as the original definition.
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*
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* Note that generic names should only be used for modifiers which describe
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* generic layouts (such as pixel re-ordering), which may have
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* independently-developed support across multiple vendors.
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*
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* In future cases where a generic layout is identified before merging with a
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* vendor-specific modifier, a new 'GENERIC' vendor or modifier using vendor
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* 'NONE' could be considered. This should only be for obvious, exceptional
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* cases to avoid polluting the 'GENERIC' namespace with modifiers which only
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* apply to a single vendor.
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*
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* Generic names should not be used for cases where multiple hardware vendors
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* have implementations of the same standardised compression scheme (such as
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* AFBC). In those cases, all implementations should use the same format
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* modifier(s), reflecting the vendor of the standard.
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*/
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#define DRM_FORMAT_MOD_GENERIC_16_16_TILE DRM_FORMAT_MOD_SAMSUNG_16_16_TILE
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/*
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* Invalid Modifier
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*
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@@ -950,6 +976,86 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
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*/
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#define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1)
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/*
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* Amlogic Video Framebuffer Compression modifiers
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*
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* Amlogic uses a proprietary lossless image compression protocol and format
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* for their hardware video codec accelerators, either video decoders or
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* video input encoders.
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*
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* It considerably reduces memory bandwidth while writing and reading
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* frames in memory.
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*
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* The underlying storage is considered to be 3 components, 8bit or 10-bit
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* per component YCbCr 420, single plane :
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* - DRM_FORMAT_YUV420_8BIT
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* - DRM_FORMAT_YUV420_10BIT
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*
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* The first 8 bits of the mode defines the layout, then the following 8 bits
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* defines the options changing the layout.
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*
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* Not all combinations are valid, and different SoCs may support different
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* combinations of layout and options.
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*/
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#define __fourcc_mod_amlogic_layout_mask 0xf
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#define __fourcc_mod_amlogic_options_shift 8
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#define __fourcc_mod_amlogic_options_mask 0xf
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#define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \
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fourcc_mod_code(AMLOGIC, \
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((__layout) & __fourcc_mod_amlogic_layout_mask) | \
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((__options) & __fourcc_mod_amlogic_options_mask \
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<< __fourcc_mod_amlogic_options_shift))
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/* Amlogic FBC Layouts */
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/*
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* Amlogic FBC Basic Layout
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*
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* The basic layout is composed of:
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* - a body content organized in 64x32 superblocks with 4096 bytes per
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* superblock in default mode.
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* - a 32 bytes per 128x64 header block
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*
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* This layout is transferrable between Amlogic SoCs supporting this modifier.
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*/
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#define AMLOGIC_FBC_LAYOUT_BASIC (1ULL)
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/*
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* Amlogic FBC Scatter Memory layout
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*
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* Indicates the header contains IOMMU references to the compressed
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* frames content to optimize memory access and layout.
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*
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* In this mode, only the header memory address is needed, thus the
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* content memory organization is tied to the current producer
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* execution and cannot be saved/dumped neither transferrable between
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* Amlogic SoCs supporting this modifier.
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*
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* Due to the nature of the layout, these buffers are not expected to
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* be accessible by the user-space clients, but only accessible by the
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* hardware producers and consumers.
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*
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* The user-space clients should expect a failure while trying to mmap
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* the DMA-BUF handle returned by the producer.
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*/
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#define AMLOGIC_FBC_LAYOUT_SCATTER (2ULL)
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/* Amlogic FBC Layout Options Bit Mask */
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/*
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* Amlogic FBC Memory Saving mode
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*
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* Indicates the storage is packed when pixel size is multiple of word
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* boudaries, i.e. 8bit should be stored in this mode to save allocation
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* memory.
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*
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* This mode reduces body layout to 3072 bytes per 64x32 superblock with
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* the basic layout and 3200 bytes per 64x32 superblock combined with
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* the scatter layout.
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*/
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#define AMLOGIC_FBC_OPTION_MEM_SAVING (1ULL << 0)
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#if defined(__cplusplus)
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}
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#endif
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@@ -55,7 +55,7 @@ extern "C" {
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* cause the related events to not be seen.
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*
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* I915_RESET_UEVENT - Event is generated just before an attempt to reset the
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* the GPU. The value supplied with the event is always 1. NOTE: Disable
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* GPU. The value supplied with the event is always 1. NOTE: Disable
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* reset via module parameter will cause this event to not be seen.
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*/
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#define I915_L3_PARITY_UEVENT "L3_PARITY_ERROR"
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@@ -1934,7 +1934,7 @@ enum drm_i915_perf_property_id {
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/**
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* The value specifies which set of OA unit metrics should be
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* be configured, defining the contents of any OA unit reports.
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* configured, defining the contents of any OA unit reports.
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*
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* This property is available in perf revision 1.
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*/
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@@ -252,8 +252,8 @@ struct drm_msm_gem_submit {
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__u64 cmds; /* in, ptr to array of submit_cmd's */
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__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
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__u32 queueid; /* in, submitqueue id */
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__u64 in_syncobjs; /* in, ptr to to array of drm_msm_gem_submit_syncobj */
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__u64 out_syncobjs; /* in, ptr to to array of drm_msm_gem_submit_syncobj */
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__u64 in_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
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__u64 out_syncobjs; /* in, ptr to array of drm_msm_gem_submit_syncobj */
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__u32 nr_in_syncobjs; /* in, number of entries in in_syncobj */
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__u32 nr_out_syncobjs; /* in, number of entries in out_syncobj. */
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__u32 syncobj_stride; /* in, stride of syncobj arrays. */
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