Merge drm/drm-next into drm-misc-next

Kickstart 6.14 cycle.

Signed-off-by: Maxime Ripard <mripard@kernel.org>
This commit is contained in:
Maxime Ripard
2024-12-02 12:44:18 +01:00
12867 changed files with 475151 additions and 307309 deletions
+7 -7
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@@ -82,13 +82,13 @@
* NOTE: _IOW means userland is writing and kernel is reading. _IOR
* means userland is reading and kernel is writing.
*/
#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size)))
#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
#define _IOR(type,nr,argtype) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(argtype)))
#define _IOW(type,nr,argtype) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(argtype)))
#define _IOWR(type,nr,argtype) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(argtype)))
#define _IOR_BAD(type,nr,argtype) _IOC(_IOC_READ,(type),(nr),sizeof(argtype))
#define _IOW_BAD(type,nr,argtype) _IOC(_IOC_WRITE,(type),(nr),sizeof(argtype))
#define _IOWR_BAD(type,nr,argtype) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(argtype))
/* used to decode ioctl numbers.. */
#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
+3
View File
@@ -79,6 +79,9 @@
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */
#define MADV_GUARD_REMOVE 103 /* unguard range */
/* compatibility flags */
#define MAP_FILE 0
+4
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@@ -19,4 +19,8 @@
#define MCL_FUTURE 2 /* lock all future mappings */
#define MCL_ONFAULT 4 /* lock all pages that are faulted in */
#define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in the shadow stack */
#define SHADOW_STACK_SET_MARKER (1ULL << 1) /* Set up a top of stack marker in the shadow stack */
#endif /* __ASM_GENERIC_MMAN_H */
+1 -1
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@@ -46,7 +46,7 @@ union __sifields {
__kernel_timer_t _tid; /* timer id */
int _overrun; /* overrun count */
sigval_t _sigval; /* same as below */
int _sys_private; /* not to be passed to user */
int _sys_private; /* Not used by the kernel. Historic leftover. Always 0. */
} _timer;
/* POSIX.1b signals */
+2
View File
@@ -141,6 +141,8 @@
#define SCM_DEVMEM_DMABUF SO_DEVMEM_DMABUF
#define SO_DEVMEM_DONTNEED 80
#define SCM_TS_OPT_ID 81
#if !defined(__KERNEL__)
#if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))
+10 -1
View File
@@ -841,8 +841,17 @@ __SYSCALL(__NR_lsm_list_modules, sys_lsm_list_modules)
#define __NR_mseal 462
__SYSCALL(__NR_mseal, sys_mseal)
#define __NR_setxattrat 463
__SYSCALL(__NR_setxattrat, sys_setxattrat)
#define __NR_getxattrat 464
__SYSCALL(__NR_getxattrat, sys_getxattrat)
#define __NR_listxattrat 465
__SYSCALL(__NR_listxattrat, sys_listxattrat)
#define __NR_removexattrat 466
__SYSCALL(__NR_removexattrat, sys_removexattrat)
#undef __NR_syscalls
#define __NR_syscalls 463
#define __NR_syscalls 467
/*
* 32 bit systems traditionally used different
+1
View File
@@ -1516,6 +1516,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
* 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
*/
#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
+4 -1
View File
@@ -347,7 +347,10 @@ struct drm_msm_gem_madvise {
* backwards compatibility as a "default" submitqueue
*/
#define MSM_SUBMITQUEUE_FLAGS (0)
#define MSM_SUBMITQUEUE_ALLOW_PREEMPT 0x00000001
#define MSM_SUBMITQUEUE_FLAGS ( \
MSM_SUBMITQUEUE_ALLOW_PREEMPT | \
0)
/*
* The submitqueue priority should be between 0 and MSM_PARAM_PRIORITIES-1,
+17
View File
@@ -1485,6 +1485,7 @@ struct drm_xe_oa_unit {
/** @capabilities: OA capabilities bit-mask */
__u64 capabilities;
#define DRM_XE_OA_CAPS_BASE (1 << 0)
#define DRM_XE_OA_CAPS_SYNCS (1 << 1)
/** @oa_timestamp_freq: OA timestamp freq */
__u64 oa_timestamp_freq;
@@ -1634,6 +1635,22 @@ enum drm_xe_oa_property_id {
* to be disabled for the stream exec queue.
*/
DRM_XE_OA_PROPERTY_NO_PREEMPT,
/**
* @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array
* specified in @DRM_XE_OA_PROPERTY_SYNCS
*/
DRM_XE_OA_PROPERTY_NUM_SYNCS,
/**
* @DRM_XE_OA_PROPERTY_SYNCS: Pointer to struct @drm_xe_sync array
* with array size specified via @DRM_XE_OA_PROPERTY_NUM_SYNCS. OA
* configuration will wait till input fences signal. Output fences
* will signal after the new OA configuration takes effect. For
* @DRM_XE_SYNC_TYPE_USER_FENCE, @addr is a user pointer, similar
* to the VM bind case.
*/
DRM_XE_OA_PROPERTY_SYNCS,
};
/**
+16 -13
View File
@@ -9,6 +9,7 @@
#include <asm/byteorder.h>
#include <linux/if_ether.h>
#include <linux/stddef.h>
#include <linux/types.h>
/**
@@ -592,19 +593,6 @@ struct batadv_tvlv_gateway_data {
__be32 bandwidth_up;
};
/**
* struct batadv_tvlv_tt_data - tt data propagated through the tt tvlv container
* @flags: translation table flags (see batadv_tt_data_flags)
* @ttvn: translation table version number
* @num_vlan: number of announced VLANs. In the TVLV this struct is followed by
* one batadv_tvlv_tt_vlan_data object per announced vlan
*/
struct batadv_tvlv_tt_data {
__u8 flags;
__u8 ttvn;
__be16 num_vlan;
};
/**
* struct batadv_tvlv_tt_vlan_data - vlan specific tt data propagated through
* the tt tvlv container
@@ -618,6 +606,21 @@ struct batadv_tvlv_tt_vlan_data {
__u16 reserved;
};
/**
* struct batadv_tvlv_tt_data - tt data propagated through the tt tvlv container
* @flags: translation table flags (see batadv_tt_data_flags)
* @ttvn: translation table version number
* @num_vlan: number of announced VLANs. In the TVLV this struct is followed by
* one batadv_tvlv_tt_vlan_data object per announced vlan
* @vlan_data: array of batadv_tvlv_tt_vlan_data objects
*/
struct batadv_tvlv_tt_data {
__u8 flags;
__u8 ttvn;
__be16 num_vlan;
struct batadv_tvlv_tt_vlan_data vlan_data[] __counted_by_be(num_vlan);
};
/**
* struct batadv_tvlv_tt_change - translation table diff data
* @flags: status indicators concerning the non-mesh client (see
+4 -5
View File
@@ -1116,6 +1116,7 @@ enum bpf_attach_type {
BPF_NETKIT_PRIMARY,
BPF_NETKIT_PEER,
BPF_TRACE_KPROBE_SESSION,
BPF_TRACE_UPROBE_SESSION,
__MAX_BPF_ATTACH_TYPE
};
@@ -1973,6 +1974,8 @@ union bpf_attr {
* program.
* Return
* The SMP id of the processor running the program.
* Attributes
* __bpf_fastcall
*
* long bpf_skb_store_bytes(struct sk_buff *skb, u32 offset, const void *from, u32 len, u64 flags)
* Description
@@ -3104,10 +3107,6 @@ union bpf_attr {
* with the **CONFIG_BPF_KPROBE_OVERRIDE** configuration
* option, and in this case it only works on functions tagged with
* **ALLOW_ERROR_INJECTION** in the kernel code.
*
* Also, the helper is only available for the architectures having
* the CONFIG_FUNCTION_ERROR_INJECTION option. As of this writing,
* x86 architecture is the only one to support this feature.
* Return
* 0
*
@@ -5372,7 +5371,7 @@ union bpf_attr {
* Currently, the **flags** must be 0. Currently, nr_loops is
* limited to 1 << 23 (~8 million) loops.
*
* long (\*callback_fn)(u32 index, void \*ctx);
* long (\*callback_fn)(u64 index, void \*ctx);
*
* where **index** is the current index in the loop. The index
* is zero-indexed.
+25
View File
@@ -1049,6 +1049,29 @@ struct btrfs_ioctl_encoded_io_args {
#define BTRFS_ENCODED_IO_ENCRYPTION_NONE 0
#define BTRFS_ENCODED_IO_ENCRYPTION_TYPES 1
/*
* Wait for subvolume cleaning process. This queries the kernel queue and it
* can change between the calls.
*
* - FOR_ONE - specify the subvolid
* - FOR_QUEUED - wait for all currently queued
* - COUNT - count number of queued
* - PEEK_FIRST - read which is the first in the queue (to be cleaned or being
* cleaned already), or 0 if the queue is empty
* - PEEK_LAST - read the last subvolid in the queue, or 0 if the queue is empty
*/
struct btrfs_ioctl_subvol_wait {
__u64 subvolid;
__u32 mode;
__u32 count;
};
#define BTRFS_SUBVOL_SYNC_WAIT_FOR_ONE (0)
#define BTRFS_SUBVOL_SYNC_WAIT_FOR_QUEUED (1)
#define BTRFS_SUBVOL_SYNC_COUNT (2)
#define BTRFS_SUBVOL_SYNC_PEEK_FIRST (3)
#define BTRFS_SUBVOL_SYNC_PEEK_LAST (4)
/* Error codes as returned by the kernel */
enum btrfs_err_code {
BTRFS_ERROR_DEV_RAID1_MIN_NOT_MET = 1,
@@ -1181,6 +1204,8 @@ enum btrfs_err_code {
struct btrfs_ioctl_encoded_io_args)
#define BTRFS_IOC_ENCODED_WRITE _IOW(BTRFS_IOCTL_MAGIC, 64, \
struct btrfs_ioctl_encoded_io_args)
#define BTRFS_IOC_SUBVOL_SYNC_WAIT _IOW(BTRFS_IOCTL_MAGIC, 65, \
struct btrfs_ioctl_subvol_wait)
#ifdef __cplusplus
}
+5
View File
@@ -64,6 +64,7 @@ enum crypto_attr_type_t {
CRYPTOCFGA_STAT_AKCIPHER, /* No longer supported, do not use. */
CRYPTOCFGA_STAT_KPP, /* No longer supported, do not use. */
CRYPTOCFGA_STAT_ACOMP, /* No longer supported, do not use. */
CRYPTOCFGA_REPORT_SIG, /* struct crypto_report_sig */
__CRYPTOCFGA_MAX
#define CRYPTOCFGA_MAX (__CRYPTOCFGA_MAX - 1)
@@ -207,6 +208,10 @@ struct crypto_report_acomp {
char type[CRYPTO_MAX_NAME];
};
struct crypto_report_sig {
char type[CRYPTO_MAX_NAME];
};
#define CRYPTO_REPORT_MAXSIZE (sizeof(struct crypto_user_alg) + \
sizeof(struct crypto_report_blkcipher))
+24
View File
@@ -79,6 +79,29 @@ enum dpll_lock_status_error {
DPLL_LOCK_STATUS_ERROR_MAX = (__DPLL_LOCK_STATUS_ERROR_MAX - 1)
};
/*
* level of quality of a clock device. This mainly applies when the dpll
* lock-status is DPLL_LOCK_STATUS_HOLDOVER. The current list is defined
* according to the table 11-7 contained in ITU-T G.8264/Y.1364 document. One
* may extend this list freely by other ITU-T defined clock qualities, or
* different ones defined by another standardization body (for those, please
* use different prefix).
*/
enum dpll_clock_quality_level {
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRC = 1,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_A,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_B,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEC1,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRTC,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRTC,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEEC,
DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRC,
/* private: */
__DPLL_CLOCK_QUALITY_LEVEL_MAX,
DPLL_CLOCK_QUALITY_LEVEL_MAX = (__DPLL_CLOCK_QUALITY_LEVEL_MAX - 1)
};
#define DPLL_TEMP_DIVIDER 1000
/**
@@ -180,6 +203,7 @@ enum dpll_a {
DPLL_A_TEMP,
DPLL_A_TYPE,
DPLL_A_LOCK_STATUS_ERROR,
DPLL_A_CLOCK_QUALITY_LEVEL,
__DPLL_A_MAX,
DPLL_A_MAX = (__DPLL_A_MAX - 1)
+2
View File
@@ -443,6 +443,7 @@ typedef struct elf64_shdr {
#define NT_ARM_ZT 0x40d /* ARM SME ZT registers */
#define NT_ARM_FPMR 0x40e /* ARM floating point mode register */
#define NT_ARM_POE 0x40f /* ARM POE registers */
#define NT_ARM_GCS 0x410 /* ARM GCS state */
#define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */
#define NT_VMCOREDD 0x700 /* Vmcore Device Dump Note */
#define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
@@ -450,6 +451,7 @@ typedef struct elf64_shdr {
#define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
#define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */
#define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */
#define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */
#define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
#define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */
#define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */
+7
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@@ -2526,12 +2526,19 @@ struct ethtool_link_settings {
__u8 master_slave_state;
__u8 rate_matching;
__u32 reserved[7];
#ifndef __KERNEL__
/* Linux builds with -Wflex-array-member-not-at-end but does
* not use the "link_mode_masks" member. Leave it defined for
* userspace for now, and when userspace wants to start using
* -Wfamnae, we'll need a new solution.
*/
__u32 link_mode_masks[];
/* layout of link_mode_masks fields:
* __u32 map_supported[link_mode_masks_nwords];
* __u32 map_advertising[link_mode_masks_nwords];
* __u32 map_lp_advertising[link_mode_masks_nwords];
*/
#endif
};
/**
+1
View File
@@ -43,6 +43,7 @@
#define F2FS_IOC_DECOMPRESS_FILE _IO(F2FS_IOCTL_MAGIC, 23)
#define F2FS_IOC_COMPRESS_FILE _IO(F2FS_IOCTL_MAGIC, 24)
#define F2FS_IOC_START_ATOMIC_REPLACE _IO(F2FS_IOCTL_MAGIC, 25)
#define F2FS_IOC_GET_DEV_ALIAS_FILE _IOR(F2FS_IOCTL_MAGIC, 26, __u32)
/*
* should be same as XFS_IOC_GOINGDOWN.
+1
View File
@@ -60,6 +60,7 @@
#define FAN_REPORT_DIR_FID 0x00000400 /* Report unique directory id */
#define FAN_REPORT_NAME 0x00000800 /* Report events with name */
#define FAN_REPORT_TARGET_FID 0x00001000 /* Report dirent target id */
#define FAN_REPORT_FD_ERROR 0x00002000 /* event->fd can report error */
/* Convenience macro - FAN_REPORT_NAME requires FAN_REPORT_DIR_FID */
#define FAN_REPORT_DFID_NAME (FAN_REPORT_DIR_FID | FAN_REPORT_NAME)
+1 -4
View File
@@ -153,9 +153,6 @@
object identity and may not be
usable with open_by_handle_at(2). */
#define AT_HANDLE_MNT_ID_UNIQUE 0x001 /* Return the u64 unique mount ID. */
#if defined(__KERNEL__)
#define AT_GETATTR_NOSEC 0x80000000
#endif
#define AT_HANDLE_CONNECTABLE 0x002 /* Request a connectable file handle */
#endif /* _UAPI_LINUX_FCNTL_H */
+17
View File
@@ -377,6 +377,7 @@ enum {
IFLA_GSO_IPV4_MAX_SIZE,
IFLA_GRO_IPV4_MAX_SIZE,
IFLA_DPLL_PIN,
IFLA_MAX_PACING_OFFLOAD_HORIZON,
__IFLA_MAX
};
@@ -1292,6 +1293,19 @@ enum netkit_mode {
NETKIT_L3,
};
/* NETKIT_SCRUB_NONE leaves clearing skb->{mark,priority} up to
* the BPF program if attached. This also means the latter can
* consume the two fields if they were populated earlier.
*
* NETKIT_SCRUB_DEFAULT zeroes skb->{mark,priority} fields before
* invoking the attached BPF program when the peer device resides
* in a different network namespace. This is the default behavior.
*/
enum netkit_scrub {
NETKIT_SCRUB_NONE,
NETKIT_SCRUB_DEFAULT,
};
enum {
IFLA_NETKIT_UNSPEC,
IFLA_NETKIT_PEER_INFO,
@@ -1299,6 +1313,8 @@ enum {
IFLA_NETKIT_POLICY,
IFLA_NETKIT_PEER_POLICY,
IFLA_NETKIT_MODE,
IFLA_NETKIT_SCRUB,
IFLA_NETKIT_PEER_SCRUB,
__IFLA_NETKIT_MAX,
};
#define IFLA_NETKIT_MAX (__IFLA_NETKIT_MAX - 1)
@@ -1942,6 +1958,7 @@ struct ifla_rmnet_flags {
enum {
IFLA_MCTP_UNSPEC,
IFLA_MCTP_NET,
IFLA_MCTP_PHYS_BINDING,
__IFLA_MCTP_MAX,
};
+1
View File
@@ -51,6 +51,7 @@ enum iio_chan_type {
IIO_DELTA_VELOCITY,
IIO_COLORTEMP,
IIO_CHROMATICITY,
IIO_ATTENTION,
};
enum iio_modifier {
+101 -4
View File
@@ -200,6 +200,9 @@ enum io_uring_sqe_flags_bit {
*/
#define IORING_SETUP_NO_SQARRAY (1U << 16)
/* Use hybrid poll in iopoll process */
#define IORING_SETUP_HYBRID_IOPOLL (1U << 17)
enum io_uring_op {
IORING_OP_NOP,
IORING_OP_READV,
@@ -416,6 +419,9 @@ enum io_uring_msg_ring_flags {
* IORING_NOP_INJECT_RESULT Inject result from sqe->result
*/
#define IORING_NOP_INJECT_RESULT (1U << 0)
#define IORING_NOP_FILE (1U << 1)
#define IORING_NOP_FIXED_FILE (1U << 2)
#define IORING_NOP_FIXED_BUFFER (1U << 3)
/*
* IO completion data structure (Completion Queue Entry)
@@ -518,6 +524,7 @@ struct io_cqring_offsets {
#define IORING_ENTER_EXT_ARG (1U << 3)
#define IORING_ENTER_REGISTERED_RING (1U << 4)
#define IORING_ENTER_ABS_TIMER (1U << 5)
#define IORING_ENTER_EXT_ARG_REG (1U << 6)
/*
* Passed in for io_uring_setup(2). Copied back with updated info on success
@@ -612,6 +619,16 @@ enum io_uring_register_op {
/* clone registered buffers from source ring to current ring */
IORING_REGISTER_CLONE_BUFFERS = 30,
/* send MSG_RING without having a ring */
IORING_REGISTER_SEND_MSG_RING = 31,
/* 32 reserved for zc rx */
/* resize CQ ring */
IORING_REGISTER_RESIZE_RINGS = 33,
IORING_REGISTER_MEM_REGION = 34,
/* this goes last */
IORING_REGISTER_LAST,
@@ -632,6 +649,31 @@ struct io_uring_files_update {
__aligned_u64 /* __s32 * */ fds;
};
enum {
/* initialise with user provided memory pointed by user_addr */
IORING_MEM_REGION_TYPE_USER = 1,
};
struct io_uring_region_desc {
__u64 user_addr;
__u64 size;
__u32 flags;
__u32 id;
__u64 mmap_offset;
__u64 __resv[4];
};
enum {
/* expose the region as registered wait arguments */
IORING_MEM_REGION_REG_WAIT_ARG = 1,
};
struct io_uring_mem_region_reg {
__u64 region_uptr; /* struct io_uring_region_desc * */
__u64 flags;
__u64 __resv[2];
};
/*
* Register a fully sparse file space, rather than pass in an array of all
* -1 file descriptors.
@@ -698,13 +740,17 @@ struct io_uring_clock_register {
};
enum {
IORING_REGISTER_SRC_REGISTERED = 1,
IORING_REGISTER_SRC_REGISTERED = (1U << 0),
IORING_REGISTER_DST_REPLACE = (1U << 1),
};
struct io_uring_clone_buffers {
__u32 src_fd;
__u32 flags;
__u32 pad[6];
__u32 src_off;
__u32 dst_off;
__u32 nr;
__u32 pad[3];
};
struct io_uring_buf {
@@ -768,12 +814,40 @@ struct io_uring_buf_status {
__u32 resv[8];
};
enum io_uring_napi_op {
/* register/ungister backward compatible opcode */
IO_URING_NAPI_REGISTER_OP = 0,
/* opcodes to update napi_list when static tracking is used */
IO_URING_NAPI_STATIC_ADD_ID = 1,
IO_URING_NAPI_STATIC_DEL_ID = 2
};
enum io_uring_napi_tracking_strategy {
/* value must be 0 for backward compatibility */
IO_URING_NAPI_TRACKING_DYNAMIC = 0,
IO_URING_NAPI_TRACKING_STATIC = 1,
IO_URING_NAPI_TRACKING_INACTIVE = 255
};
/* argument for IORING_(UN)REGISTER_NAPI */
struct io_uring_napi {
__u32 busy_poll_to;
__u8 prefer_busy_poll;
__u8 pad[3];
__u64 resv;
/* a io_uring_napi_op value */
__u8 opcode;
__u8 pad[2];
/*
* for IO_URING_NAPI_REGISTER_OP, it is a
* io_uring_napi_tracking_strategy value.
*
* for IO_URING_NAPI_STATIC_ADD_ID/IO_URING_NAPI_STATIC_DEL_ID
* it is the napi id to add/del from napi_list.
*/
__u32 op_param;
__u32 resv;
};
/*
@@ -795,6 +869,29 @@ enum io_uring_register_restriction_op {
IORING_RESTRICTION_LAST
};
enum {
IORING_REG_WAIT_TS = (1U << 0),
};
/*
* Argument for io_uring_enter(2) with
* IORING_GETEVENTS | IORING_ENTER_EXT_ARG_REG set, where the actual argument
* is an index into a previously registered fixed wait region described by
* the below structure.
*/
struct io_uring_reg_wait {
struct __kernel_timespec ts;
__u32 min_wait_usec;
__u32 flags;
__u64 sigmask;
__u32 sigmask_sz;
__u32 pad[3];
__u64 pad2[2];
};
/*
* Argument for io_uring_enter(2) with IORING_GETEVENTS | IORING_ENTER_EXT_ARG
*/
struct io_uring_getevents_arg {
__u64 sigmask;
__u32 sigmask_sz;
+215 -9
View File
@@ -51,6 +51,10 @@ enum {
IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c,
IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d,
IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e,
IOMMUFD_CMD_IOAS_MAP_FILE = 0x8f,
IOMMUFD_CMD_VIOMMU_ALLOC = 0x90,
IOMMUFD_CMD_VDEVICE_ALLOC = 0x91,
IOMMUFD_CMD_IOAS_CHANGE_PROCESS = 0x92,
};
/**
@@ -213,6 +217,30 @@ struct iommu_ioas_map {
};
#define IOMMU_IOAS_MAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP)
/**
* struct iommu_ioas_map_file - ioctl(IOMMU_IOAS_MAP_FILE)
* @size: sizeof(struct iommu_ioas_map_file)
* @flags: same as for iommu_ioas_map
* @ioas_id: same as for iommu_ioas_map
* @fd: the memfd to map
* @start: byte offset from start of file to map from
* @length: same as for iommu_ioas_map
* @iova: same as for iommu_ioas_map
*
* Set an IOVA mapping from a memfd file. All other arguments and semantics
* match those of IOMMU_IOAS_MAP.
*/
struct iommu_ioas_map_file {
__u32 size;
__u32 flags;
__u32 ioas_id;
__s32 fd;
__aligned_u64 start;
__aligned_u64 length;
__aligned_u64 iova;
};
#define IOMMU_IOAS_MAP_FILE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP_FILE)
/**
* struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY)
* @size: sizeof(struct iommu_ioas_copy)
@@ -359,11 +387,19 @@ struct iommu_vfio_ioas {
* enforced on device attachment
* @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data is
* valid.
* @IOMMU_HWPT_ALLOC_PASID: Requests a domain that can be used with PASID. The
* domain can be attached to any PASID on the device.
* Any domain attached to the non-PASID part of the
* device must also be flaged, otherwise attaching a
* PASID will blocked.
* If IOMMU does not support PASID it will return
* error (-EOPNOTSUPP).
*/
enum iommufd_hwpt_alloc_flags {
IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0,
IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1,
IOMMU_HWPT_FAULT_ID_VALID = 1 << 2,
IOMMU_HWPT_ALLOC_PASID = 1 << 3,
};
/**
@@ -394,14 +430,36 @@ struct iommu_hwpt_vtd_s1 {
__u32 __reserved;
};
/**
* struct iommu_hwpt_arm_smmuv3 - ARM SMMUv3 nested STE
* (IOMMU_HWPT_DATA_ARM_SMMUV3)
*
* @ste: The first two double words of the user space Stream Table Entry for
* the translation. Must be little-endian.
* Allowed fields: (Refer to "5.2 Stream Table Entry" in SMMUv3 HW Spec)
* - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax
* - word-1: EATS, S1DSS, S1CIR, S1COR, S1CSH, S1STALLD
*
* -EIO will be returned if @ste is not legal or contains any non-allowed field.
* Cfg can be used to select a S1, Bypass or Abort configuration. A Bypass
* nested domain will translate the same as the nesting parent. The S1 will
* install a Context Descriptor Table pointing at userspace memory translated
* by the nesting parent.
*/
struct iommu_hwpt_arm_smmuv3 {
__aligned_le64 ste[2];
};
/**
* enum iommu_hwpt_data_type - IOMMU HWPT Data Type
* @IOMMU_HWPT_DATA_NONE: no data
* @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
* @IOMMU_HWPT_DATA_ARM_SMMUV3: ARM SMMUv3 Context Descriptor Table
*/
enum iommu_hwpt_data_type {
IOMMU_HWPT_DATA_NONE = 0,
IOMMU_HWPT_DATA_VTD_S1 = 1,
IOMMU_HWPT_DATA_ARM_SMMUV3 = 2,
};
/**
@@ -409,7 +467,7 @@ enum iommu_hwpt_data_type {
* @size: sizeof(struct iommu_hwpt_alloc)
* @flags: Combination of enum iommufd_hwpt_alloc_flags
* @dev_id: The device to allocate this HWPT for
* @pt_id: The IOAS or HWPT to connect this HWPT to
* @pt_id: The IOAS or HWPT or vIOMMU to connect this HWPT to
* @out_hwpt_id: The ID of the new HWPT
* @__reserved: Must be 0
* @data_type: One of enum iommu_hwpt_data_type
@@ -428,11 +486,13 @@ enum iommu_hwpt_data_type {
* IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a
* nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flags.
*
* A user-managed nested HWPT will be created from a given parent HWPT via
* @pt_id, in which the parent HWPT must be allocated previously via the
* same ioctl from a given IOAS (@pt_id). In this case, the @data_type
* must be set to a pre-defined type corresponding to an I/O page table
* type supported by the underlying IOMMU hardware.
* A user-managed nested HWPT will be created from a given vIOMMU (wrapping a
* parent HWPT) or a parent HWPT via @pt_id, in which the parent HWPT must be
* allocated previously via the same ioctl from a given IOAS (@pt_id). In this
* case, the @data_type must be set to a pre-defined type corresponding to an
* I/O page table type supported by the underlying IOMMU hardware. The device
* via @dev_id and the vIOMMU via @pt_id must be associated to the same IOMMU
* instance.
*
* If the @data_type is set to IOMMU_HWPT_DATA_NONE, @data_len and
* @data_uptr should be zero. Otherwise, both @data_len and @data_uptr
@@ -484,15 +544,50 @@ struct iommu_hw_info_vtd {
__aligned_u64 ecap_reg;
};
/**
* struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information
* (IOMMU_HW_INFO_TYPE_ARM_SMMUV3)
*
* @flags: Must be set to 0
* @__reserved: Must be 0
* @idr: Implemented features for ARM SMMU Non-secure programming interface
* @iidr: Information about the implementation and implementer of ARM SMMU,
* and architecture version supported
* @aidr: ARM SMMU architecture version
*
* For the details of @idr, @iidr and @aidr, please refer to the chapters
* from 6.3.1 to 6.3.6 in the SMMUv3 Spec.
*
* User space should read the underlying ARM SMMUv3 hardware information for
* the list of supported features.
*
* Note that these values reflect the raw HW capability, without any insight if
* any required kernel driver support is present. Bits may be set indicating the
* HW has functionality that is lacking kernel software support, such as BTM. If
* a VMM is using this information to construct emulated copies of these
* registers it should only forward bits that it knows it can support.
*
* In future, presence of required kernel support will be indicated in flags.
*/
struct iommu_hw_info_arm_smmuv3 {
__u32 flags;
__u32 __reserved;
__u32 idr[6];
__u32 iidr;
__u32 aidr;
};
/**
* enum iommu_hw_info_type - IOMMU Hardware Info Types
* @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardware
* info
* @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
* @IOMMU_HW_INFO_TYPE_ARM_SMMUV3: ARM SMMUv3 iommu info type
*/
enum iommu_hw_info_type {
IOMMU_HW_INFO_TYPE_NONE = 0,
IOMMU_HW_INFO_TYPE_INTEL_VTD = 1,
IOMMU_HW_INFO_TYPE_ARM_SMMUV3 = 2,
};
/**
@@ -627,9 +722,11 @@ struct iommu_hwpt_get_dirty_bitmap {
* enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation
* Data Type
* @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1
* @IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3: Invalidation data for ARM SMMUv3
*/
enum iommu_hwpt_invalidate_data_type {
IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0,
IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3 = 1,
};
/**
@@ -668,10 +765,32 @@ struct iommu_hwpt_vtd_s1_invalidate {
__u32 __reserved;
};
/**
* struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cahce invalidation
* (IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3)
* @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ.
* Must be little-endian.
*
* Supported command list only when passing in a vIOMMU via @hwpt_id:
* CMDQ_OP_TLBI_NSNH_ALL
* CMDQ_OP_TLBI_NH_VA
* CMDQ_OP_TLBI_NH_VAA
* CMDQ_OP_TLBI_NH_ALL
* CMDQ_OP_TLBI_NH_ASID
* CMDQ_OP_ATC_INV
* CMDQ_OP_CFGI_CD
* CMDQ_OP_CFGI_CD_ALL
*
* -EIO will be returned if the command is not supported.
*/
struct iommu_viommu_arm_smmuv3_invalidate {
__aligned_le64 cmd[2];
};
/**
* struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE)
* @size: sizeof(struct iommu_hwpt_invalidate)
* @hwpt_id: ID of a nested HWPT for cache invalidation
* @hwpt_id: ID of a nested HWPT or a vIOMMU, for cache invalidation
* @data_uptr: User pointer to an array of driver-specific cache invalidation
* data.
* @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the data
@@ -682,8 +801,11 @@ struct iommu_hwpt_vtd_s1_invalidate {
* Output the number of requests successfully handled by kernel.
* @__reserved: Must be 0.
*
* Invalidate the iommu cache for user-managed page table. Modifications on a
* user-managed page table should be followed by this operation to sync cache.
* Invalidate iommu cache for user-managed page table or vIOMMU. Modifications
* on a user-managed page table should be followed by this operation, if a HWPT
* is passed in via @hwpt_id. Other caches, such as device cache or descriptor
* cache can be flushed if a vIOMMU is passed in via the @hwpt_id field.
*
* Each ioctl can support one or more cache invalidation requests in the array
* that has a total size of @entry_len * @entry_num.
*
@@ -797,4 +919,88 @@ struct iommu_fault_alloc {
__u32 out_fault_fd;
};
#define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_ALLOC)
/**
* enum iommu_viommu_type - Virtual IOMMU Type
* @IOMMU_VIOMMU_TYPE_DEFAULT: Reserved for future use
* @IOMMU_VIOMMU_TYPE_ARM_SMMUV3: ARM SMMUv3 driver specific type
*/
enum iommu_viommu_type {
IOMMU_VIOMMU_TYPE_DEFAULT = 0,
IOMMU_VIOMMU_TYPE_ARM_SMMUV3 = 1,
};
/**
* struct iommu_viommu_alloc - ioctl(IOMMU_VIOMMU_ALLOC)
* @size: sizeof(struct iommu_viommu_alloc)
* @flags: Must be 0
* @type: Type of the virtual IOMMU. Must be defined in enum iommu_viommu_type
* @dev_id: The device's physical IOMMU will be used to back the virtual IOMMU
* @hwpt_id: ID of a nesting parent HWPT to associate to
* @out_viommu_id: Output virtual IOMMU ID for the allocated object
*
* Allocate a virtual IOMMU object, representing the underlying physical IOMMU's
* virtualization support that is a security-isolated slice of the real IOMMU HW
* that is unique to a specific VM. Operations global to the IOMMU are connected
* to the vIOMMU, such as:
* - Security namespace for guest owned ID, e.g. guest-controlled cache tags
* - Non-device-affiliated event reporting, e.g. invalidation queue errors
* - Access to a sharable nesting parent pagetable across physical IOMMUs
* - Virtualization of various platforms IDs, e.g. RIDs and others
* - Delivery of paravirtualized invalidation
* - Direct assigned invalidation queues
* - Direct assigned interrupts
*/
struct iommu_viommu_alloc {
__u32 size;
__u32 flags;
__u32 type;
__u32 dev_id;
__u32 hwpt_id;
__u32 out_viommu_id;
};
#define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC)
/**
* struct iommu_vdevice_alloc - ioctl(IOMMU_VDEVICE_ALLOC)
* @size: sizeof(struct iommu_vdevice_alloc)
* @viommu_id: vIOMMU ID to associate with the virtual device
* @dev_id: The physical device to allocate a virtual instance on the vIOMMU
* @out_vdevice_id: Object handle for the vDevice. Pass to IOMMU_DESTORY
* @virt_id: Virtual device ID per vIOMMU, e.g. vSID of ARM SMMUv3, vDeviceID
* of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Table
*
* Allocate a virtual device instance (for a physical device) against a vIOMMU.
* This instance holds the device's information (related to its vIOMMU) in a VM.
*/
struct iommu_vdevice_alloc {
__u32 size;
__u32 viommu_id;
__u32 dev_id;
__u32 out_vdevice_id;
__aligned_u64 virt_id;
};
#define IOMMU_VDEVICE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VDEVICE_ALLOC)
/**
* struct iommu_ioas_change_process - ioctl(VFIO_IOAS_CHANGE_PROCESS)
* @size: sizeof(struct iommu_ioas_change_process)
* @__reserved: Must be 0
*
* This transfers pinned memory counts for every memory map in every IOAS
* in the context to the current process. This only supports maps created
* with IOMMU_IOAS_MAP_FILE, and returns EINVAL if other maps are present.
* If the ioctl returns a failure status, then nothing is changed.
*
* This API is useful for transferring operation of a device from one process
* to another, such as during userland live update.
*/
struct iommu_ioas_change_process {
__u32 size;
__u32 __reserved;
};
#define IOMMU_IOAS_CHANGE_PROCESS \
_IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_CHANGE_PROCESS)
#endif
+2 -1
View File
@@ -60,7 +60,8 @@
#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000
#define HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED 0x40000000
#define HSA_CAP_RESERVED 0x800f8000
#define HSA_CAP_PER_QUEUE_RESET_SUPPORTED 0x80000000
#define HSA_CAP_RESERVED 0x000f8000
/* debug_prop bits in node properties */
#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f
+8
View File
@@ -1158,7 +1158,15 @@ enum kvm_device_type {
#define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME
KVM_DEV_TYPE_RISCV_AIA,
#define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA
KVM_DEV_TYPE_LOONGARCH_IPI,
#define KVM_DEV_TYPE_LOONGARCH_IPI KVM_DEV_TYPE_LOONGARCH_IPI
KVM_DEV_TYPE_LOONGARCH_EIOINTC,
#define KVM_DEV_TYPE_LOONGARCH_EIOINTC KVM_DEV_TYPE_LOONGARCH_EIOINTC
KVM_DEV_TYPE_LOONGARCH_PCHPIC,
#define KVM_DEV_TYPE_LOONGARCH_PCHPIC KVM_DEV_TYPE_LOONGARCH_PCHPIC
KVM_DEV_TYPE_MAX,
};
struct kvm_vfio_spapr_tce {
@@ -0,0 +1,273 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* RP1 PiSP Front End Driver Configuration structures
*
* Copyright (C) 2021 - Raspberry Pi Ltd.
*
*/
#ifndef _UAPI_PISP_FE_CONFIG_
#define _UAPI_PISP_FE_CONFIG_
#include <linux/types.h>
#include "pisp_common.h"
#include "pisp_fe_statistics.h"
#define PISP_FE_NUM_OUTPUTS 2
enum pisp_fe_enable {
PISP_FE_ENABLE_INPUT = 0x000001,
PISP_FE_ENABLE_DECOMPRESS = 0x000002,
PISP_FE_ENABLE_DECOMPAND = 0x000004,
PISP_FE_ENABLE_BLA = 0x000008,
PISP_FE_ENABLE_DPC = 0x000010,
PISP_FE_ENABLE_STATS_CROP = 0x000020,
PISP_FE_ENABLE_DECIMATE = 0x000040,
PISP_FE_ENABLE_BLC = 0x000080,
PISP_FE_ENABLE_CDAF_STATS = 0x000100,
PISP_FE_ENABLE_AWB_STATS = 0x000200,
PISP_FE_ENABLE_RGBY = 0x000400,
PISP_FE_ENABLE_LSC = 0x000800,
PISP_FE_ENABLE_AGC_STATS = 0x001000,
PISP_FE_ENABLE_CROP0 = 0x010000,
PISP_FE_ENABLE_DOWNSCALE0 = 0x020000,
PISP_FE_ENABLE_COMPRESS0 = 0x040000,
PISP_FE_ENABLE_OUTPUT0 = 0x080000,
PISP_FE_ENABLE_CROP1 = 0x100000,
PISP_FE_ENABLE_DOWNSCALE1 = 0x200000,
PISP_FE_ENABLE_COMPRESS1 = 0x400000,
PISP_FE_ENABLE_OUTPUT1 = 0x800000
};
#define PISP_FE_ENABLE_CROP(i) (PISP_FE_ENABLE_CROP0 << (4 * (i)))
#define PISP_FE_ENABLE_DOWNSCALE(i) (PISP_FE_ENABLE_DOWNSCALE0 << (4 * (i)))
#define PISP_FE_ENABLE_COMPRESS(i) (PISP_FE_ENABLE_COMPRESS0 << (4 * (i)))
#define PISP_FE_ENABLE_OUTPUT(i) (PISP_FE_ENABLE_OUTPUT0 << (4 * (i)))
/*
* We use the enable flags to show when blocks are "dirty", but we need some
* extra ones too.
*/
enum pisp_fe_dirty {
PISP_FE_DIRTY_GLOBAL = 0x0001,
PISP_FE_DIRTY_FLOATING = 0x0002,
PISP_FE_DIRTY_OUTPUT_AXI = 0x0004
};
struct pisp_fe_global_config {
__u32 enables;
__u8 bayer_order;
__u8 pad[3];
} __attribute__((packed));
struct pisp_fe_input_axi_config {
/* burst length minus one, in the range 0..15; OR'd with flags */
__u8 maxlen_flags;
/* { prot[2:0], cache[3:0] } fields */
__u8 cache_prot;
/* QoS (only 4 LS bits are used) */
__u16 qos;
} __attribute__((packed));
struct pisp_fe_output_axi_config {
/* burst length minus one, in the range 0..15; OR'd with flags */
__u8 maxlen_flags;
/* { prot[2:0], cache[3:0] } fields */
__u8 cache_prot;
/* QoS (4 bitfields of 4 bits each for different panic levels) */
__u16 qos;
/* For Panic mode: Output FIFO panic threshold */
__u16 thresh;
/* For Panic mode: Output FIFO statistics throttle threshold */
__u16 throttle;
} __attribute__((packed));
struct pisp_fe_input_config {
__u8 streaming;
__u8 pad[3];
struct pisp_image_format_config format;
struct pisp_fe_input_axi_config axi;
/* Extra cycles delay before issuing each burst request */
__u8 holdoff;
__u8 pad2[3];
} __attribute__((packed));
struct pisp_fe_output_config {
struct pisp_image_format_config format;
__u16 ilines;
__u8 pad[2];
} __attribute__((packed));
struct pisp_fe_input_buffer_config {
__u32 addr_lo;
__u32 addr_hi;
__u16 frame_id;
__u16 pad;
} __attribute__((packed));
#define PISP_FE_DECOMPAND_LUT_SIZE 65
struct pisp_fe_decompand_config {
__u16 lut[PISP_FE_DECOMPAND_LUT_SIZE];
__u16 pad;
} __attribute__((packed));
struct pisp_fe_dpc_config {
__u8 coeff_level;
__u8 coeff_range;
__u8 coeff_range2;
#define PISP_FE_DPC_FLAG_FOLDBACK 1
#define PISP_FE_DPC_FLAG_VFLAG 2
__u8 flags;
} __attribute__((packed));
#define PISP_FE_LSC_LUT_SIZE 16
struct pisp_fe_lsc_config {
__u8 shift;
__u8 pad0;
__u16 scale;
__u16 centre_x;
__u16 centre_y;
__u16 lut[PISP_FE_LSC_LUT_SIZE];
} __attribute__((packed));
struct pisp_fe_rgby_config {
__u16 gain_r;
__u16 gain_g;
__u16 gain_b;
__u8 maxflag;
__u8 pad;
} __attribute__((packed));
struct pisp_fe_agc_stats_config {
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
/* each weight only 4 bits */
__u8 weights[PISP_AGC_STATS_NUM_ZONES / 2];
__u16 row_offset_x;
__u16 row_offset_y;
__u16 row_size_x;
__u16 row_size_y;
__u8 row_shift;
__u8 float_shift;
__u8 pad1[2];
} __attribute__((packed));
struct pisp_fe_awb_stats_config {
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
__u8 shift;
__u8 pad[3];
__u16 r_lo;
__u16 r_hi;
__u16 g_lo;
__u16 g_hi;
__u16 b_lo;
__u16 b_hi;
} __attribute__((packed));
struct pisp_fe_floating_stats_region {
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
} __attribute__((packed));
struct pisp_fe_floating_stats_config {
struct pisp_fe_floating_stats_region
regions[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
#define PISP_FE_CDAF_NUM_WEIGHTS 8
struct pisp_fe_cdaf_stats_config {
__u16 noise_constant;
__u16 noise_slope;
__u16 offset_x;
__u16 offset_y;
__u16 size_x;
__u16 size_y;
__u16 skip_x;
__u16 skip_y;
__u32 mode;
} __attribute__((packed));
struct pisp_fe_stats_buffer_config {
__u32 addr_lo;
__u32 addr_hi;
} __attribute__((packed));
struct pisp_fe_crop_config {
__u16 offset_x;
__u16 offset_y;
__u16 width;
__u16 height;
} __attribute__((packed));
enum pisp_fe_downscale_flags {
/* downscale the four Bayer components independently... */
DOWNSCALE_BAYER = 1,
/* ...without trying to preserve their spatial relationship */
DOWNSCALE_BIN = 2,
};
struct pisp_fe_downscale_config {
__u8 xin;
__u8 xout;
__u8 yin;
__u8 yout;
__u8 flags; /* enum pisp_fe_downscale_flags */
__u8 pad[3];
__u16 output_width;
__u16 output_height;
} __attribute__((packed));
struct pisp_fe_output_buffer_config {
__u32 addr_lo;
__u32 addr_hi;
} __attribute__((packed));
/* Each of the two output channels/branches: */
struct pisp_fe_output_branch_config {
struct pisp_fe_crop_config crop;
struct pisp_fe_downscale_config downscale;
struct pisp_compress_config compress;
struct pisp_fe_output_config output;
__u32 pad;
} __attribute__((packed));
/* And finally one to rule them all: */
struct pisp_fe_config {
/* I/O configuration: */
struct pisp_fe_stats_buffer_config stats_buffer;
struct pisp_fe_output_buffer_config output_buffer[PISP_FE_NUM_OUTPUTS];
struct pisp_fe_input_buffer_config input_buffer;
/* processing configuration: */
struct pisp_fe_global_config global;
struct pisp_fe_input_config input;
struct pisp_decompress_config decompress;
struct pisp_fe_decompand_config decompand;
struct pisp_bla_config bla;
struct pisp_fe_dpc_config dpc;
struct pisp_fe_crop_config stats_crop;
__u32 spare1; /* placeholder for future decimate configuration */
struct pisp_bla_config blc;
struct pisp_fe_rgby_config rgby;
struct pisp_fe_lsc_config lsc;
struct pisp_fe_agc_stats_config agc_stats;
struct pisp_fe_awb_stats_config awb_stats;
struct pisp_fe_cdaf_stats_config cdaf_stats;
struct pisp_fe_floating_stats_config floating_stats;
struct pisp_fe_output_axi_config output_axi;
struct pisp_fe_output_branch_config ch[PISP_FE_NUM_OUTPUTS];
/* non-register fields: */
__u32 dirty_flags; /* these use pisp_fe_enable */
__u32 dirty_flags_extra; /* these use pisp_fe_dirty */
} __attribute__((packed));
#endif /* _UAPI_PISP_FE_CONFIG_ */
@@ -0,0 +1,64 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* RP1 PiSP Front End statistics definitions
*
* Copyright (C) 2021 - Raspberry Pi Ltd.
*
*/
#ifndef _UAPI_PISP_FE_STATISTICS_H_
#define _UAPI_PISP_FE_STATISTICS_H_
#include <linux/types.h>
#define PISP_FLOATING_STATS_NUM_ZONES 4
#define PISP_AGC_STATS_NUM_BINS 1024
#define PISP_AGC_STATS_SIZE 16
#define PISP_AGC_STATS_NUM_ZONES (PISP_AGC_STATS_SIZE * PISP_AGC_STATS_SIZE)
#define PISP_AGC_STATS_NUM_ROW_SUMS 512
struct pisp_agc_statistics_zone {
__u64 Y_sum;
__u32 counted;
__u32 pad;
} __attribute__((packed));
struct pisp_agc_statistics {
__u32 row_sums[PISP_AGC_STATS_NUM_ROW_SUMS];
/*
* 32-bits per bin means an image (just less than) 16384x16384 pixels
* in size can weight every pixel from 0 to 15.
*/
__u32 histogram[PISP_AGC_STATS_NUM_BINS];
struct pisp_agc_statistics_zone floating[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
#define PISP_AWB_STATS_SIZE 32
#define PISP_AWB_STATS_NUM_ZONES (PISP_AWB_STATS_SIZE * PISP_AWB_STATS_SIZE)
struct pisp_awb_statistics_zone {
__u32 R_sum;
__u32 G_sum;
__u32 B_sum;
__u32 counted;
} __attribute__((packed));
struct pisp_awb_statistics {
struct pisp_awb_statistics_zone zones[PISP_AWB_STATS_NUM_ZONES];
struct pisp_awb_statistics_zone floating[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
#define PISP_CDAF_STATS_SIZE 8
#define PISP_CDAF_STATS_NUM_FOMS (PISP_CDAF_STATS_SIZE * PISP_CDAF_STATS_SIZE)
struct pisp_cdaf_statistics {
__u64 foms[PISP_CDAF_STATS_NUM_FOMS];
__u64 floating[PISP_FLOATING_STATS_NUM_ZONES];
} __attribute__((packed));
struct pisp_statistics {
struct pisp_awb_statistics awb;
struct pisp_agc_statistics agc;
struct pisp_cdaf_statistics cdaf;
} __attribute__((packed));
#endif /* _UAPI_PISP_FE_STATISTICS_H_ */
+12 -2
View File
@@ -154,7 +154,7 @@ struct mount_attr {
*/
struct statmount {
__u32 size; /* Total size, including strings */
__u32 mnt_opts; /* [str] Mount options of the mount */
__u32 mnt_opts; /* [str] Options (comma separated, escaped) */
__u64 mask; /* What results were written */
__u32 sb_dev_major; /* Device ID */
__u32 sb_dev_minor;
@@ -173,7 +173,13 @@ struct statmount {
__u32 mnt_root; /* [str] Root of mount relative to root of fs */
__u32 mnt_point; /* [str] Mountpoint relative to current root */
__u64 mnt_ns_id; /* ID of the mount namespace */
__u64 __spare2[49];
__u32 fs_subtype; /* [str] Subtype of fs_type (if any) */
__u32 sb_source; /* [str] Source string of the mount */
__u32 opt_num; /* Number of fs options */
__u32 opt_array; /* [str] Array of nul terminated fs options */
__u32 opt_sec_num; /* Number of security options */
__u32 opt_sec_array; /* [str] Array of nul terminated security options */
__u64 __spare2[46];
char str[]; /* Variable size part containing strings */
};
@@ -207,6 +213,10 @@ struct mnt_id_req {
#define STATMOUNT_FS_TYPE 0x00000020U /* Want/got fs_type */
#define STATMOUNT_MNT_NS_ID 0x00000040U /* Want/got mnt_ns_id */
#define STATMOUNT_MNT_OPTS 0x00000080U /* Want/got mnt_opts */
#define STATMOUNT_FS_SUBTYPE 0x00000100U /* Want/got fs_subtype */
#define STATMOUNT_SB_SOURCE 0x00000200U /* Want/got sb_source */
#define STATMOUNT_OPT_ARRAY 0x00000400U /* Want/got opt_... */
#define STATMOUNT_OPT_SEC_ARRAY 0x00000800U /* Want/got opt_sec... */
/*
* Special @mnt_id values that can be passed to listmount
+95
View File
@@ -0,0 +1,95 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/net_shaper.yaml */
/* YNL-GEN uapi header */
#ifndef _UAPI_LINUX_NET_SHAPER_H
#define _UAPI_LINUX_NET_SHAPER_H
#define NET_SHAPER_FAMILY_NAME "net-shaper"
#define NET_SHAPER_FAMILY_VERSION 1
/**
* enum net_shaper_scope - Defines the shaper @id interpretation.
* @NET_SHAPER_SCOPE_UNSPEC: The scope is not specified.
* @NET_SHAPER_SCOPE_NETDEV: The main shaper for the given network device.
* @NET_SHAPER_SCOPE_QUEUE: The shaper is attached to the given device queue,
* the @id represents the queue number.
* @NET_SHAPER_SCOPE_NODE: The shaper allows grouping of queues or other node
* shapers; can be nested in either @netdev shapers or other @node shapers,
* allowing placement in any location of the scheduling tree, except leaves
* and root.
*/
enum net_shaper_scope {
NET_SHAPER_SCOPE_UNSPEC,
NET_SHAPER_SCOPE_NETDEV,
NET_SHAPER_SCOPE_QUEUE,
NET_SHAPER_SCOPE_NODE,
/* private: */
__NET_SHAPER_SCOPE_MAX,
NET_SHAPER_SCOPE_MAX = (__NET_SHAPER_SCOPE_MAX - 1)
};
/**
* enum net_shaper_metric - Different metric supported by the shaper.
* @NET_SHAPER_METRIC_BPS: Shaper operates on a bits per second basis.
* @NET_SHAPER_METRIC_PPS: Shaper operates on a packets per second basis.
*/
enum net_shaper_metric {
NET_SHAPER_METRIC_BPS,
NET_SHAPER_METRIC_PPS,
};
enum {
NET_SHAPER_A_HANDLE = 1,
NET_SHAPER_A_METRIC,
NET_SHAPER_A_BW_MIN,
NET_SHAPER_A_BW_MAX,
NET_SHAPER_A_BURST,
NET_SHAPER_A_PRIORITY,
NET_SHAPER_A_WEIGHT,
NET_SHAPER_A_IFINDEX,
NET_SHAPER_A_PARENT,
NET_SHAPER_A_LEAVES,
__NET_SHAPER_A_MAX,
NET_SHAPER_A_MAX = (__NET_SHAPER_A_MAX - 1)
};
enum {
NET_SHAPER_A_HANDLE_SCOPE = 1,
NET_SHAPER_A_HANDLE_ID,
__NET_SHAPER_A_HANDLE_MAX,
NET_SHAPER_A_HANDLE_MAX = (__NET_SHAPER_A_HANDLE_MAX - 1)
};
enum {
NET_SHAPER_A_CAPS_IFINDEX = 1,
NET_SHAPER_A_CAPS_SCOPE,
NET_SHAPER_A_CAPS_SUPPORT_METRIC_BPS,
NET_SHAPER_A_CAPS_SUPPORT_METRIC_PPS,
NET_SHAPER_A_CAPS_SUPPORT_NESTING,
NET_SHAPER_A_CAPS_SUPPORT_BW_MIN,
NET_SHAPER_A_CAPS_SUPPORT_BW_MAX,
NET_SHAPER_A_CAPS_SUPPORT_BURST,
NET_SHAPER_A_CAPS_SUPPORT_PRIORITY,
NET_SHAPER_A_CAPS_SUPPORT_WEIGHT,
__NET_SHAPER_A_CAPS_MAX,
NET_SHAPER_A_CAPS_MAX = (__NET_SHAPER_A_CAPS_MAX - 1)
};
enum {
NET_SHAPER_CMD_GET = 1,
NET_SHAPER_CMD_SET,
NET_SHAPER_CMD_DELETE,
NET_SHAPER_CMD_GROUP,
NET_SHAPER_CMD_CAP_GET,
__NET_SHAPER_CMD_MAX,
NET_SHAPER_CMD_MAX = (__NET_SHAPER_CMD_MAX - 1)
};
#endif /* _UAPI_LINUX_NET_SHAPER_H */
+4
View File
@@ -122,6 +122,9 @@ enum {
NETDEV_A_NAPI_ID,
NETDEV_A_NAPI_IRQ,
NETDEV_A_NAPI_PID,
NETDEV_A_NAPI_DEFER_HARD_IRQS,
NETDEV_A_NAPI_GRO_FLUSH_TIMEOUT,
NETDEV_A_NAPI_IRQ_SUSPEND_TIMEOUT,
__NETDEV_A_NAPI_MAX,
NETDEV_A_NAPI_MAX = (__NETDEV_A_NAPI_MAX - 1)
@@ -199,6 +202,7 @@ enum {
NETDEV_CMD_NAPI_GET,
NETDEV_CMD_QSTATS_GET,
NETDEV_CMD_BIND_RX,
NETDEV_CMD_NAPI_SET,
__NETDEV_CMD_MAX,
NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1)
+15 -3
View File
@@ -564,16 +564,26 @@ enum nft_immediate_attributes {
/**
* enum nft_bitwise_ops - nf_tables bitwise operations
*
* @NFT_BITWISE_BOOL: mask-and-xor operation used to implement NOT, AND, OR and
* XOR boolean operations
* @NFT_BITWISE_MASK_XOR: mask-and-xor operation used to implement NOT, AND, OR
* and XOR boolean operations
* @NFT_BITWISE_LSHIFT: left-shift operation
* @NFT_BITWISE_RSHIFT: right-shift operation
* @NFT_BITWISE_AND: and operation
* @NFT_BITWISE_OR: or operation
* @NFT_BITWISE_XOR: xor operation
*/
enum nft_bitwise_ops {
NFT_BITWISE_BOOL,
NFT_BITWISE_MASK_XOR,
NFT_BITWISE_LSHIFT,
NFT_BITWISE_RSHIFT,
NFT_BITWISE_AND,
NFT_BITWISE_OR,
NFT_BITWISE_XOR,
};
/*
* Old name for NFT_BITWISE_MASK_XOR. Retained for backwards-compatibility.
*/
#define NFT_BITWISE_BOOL NFT_BITWISE_MASK_XOR
/**
* enum nft_bitwise_attributes - nf_tables bitwise expression netlink attributes
@@ -586,6 +596,7 @@ enum nft_bitwise_ops {
* @NFTA_BITWISE_OP: type of operation (NLA_U32: nft_bitwise_ops)
* @NFTA_BITWISE_DATA: argument for non-boolean operations
* (NLA_NESTED: nft_data_attributes)
* @NFTA_BITWISE_SREG2: second source register (NLA_U32: nft_registers)
*
* The bitwise expression supports boolean and shift operations. It implements
* the boolean operations by performing the following operation:
@@ -609,6 +620,7 @@ enum nft_bitwise_attributes {
NFTA_BITWISE_XOR,
NFTA_BITWISE_OP,
NFTA_BITWISE_DATA,
NFTA_BITWISE_SREG2,
__NFTA_BITWISE_MAX
};
#define NFTA_BITWISE_MAX (__NFTA_BITWISE_MAX - 1)
+3
View File
@@ -164,6 +164,7 @@ enum nfc_commands {
* @NFC_ATTR_VENDOR_SUBCMD: Vendor specific sub command
* @NFC_ATTR_VENDOR_DATA: Vendor specific data, to be optionally passed
* to a vendor specific command implementation
* @NFC_ATTR_TARGET_ATS: ISO 14443 type A target Answer To Select
*/
enum nfc_attrs {
NFC_ATTR_UNSPEC,
@@ -198,6 +199,7 @@ enum nfc_attrs {
NFC_ATTR_VENDOR_ID,
NFC_ATTR_VENDOR_SUBCMD,
NFC_ATTR_VENDOR_DATA,
NFC_ATTR_TARGET_ATS,
/* private: internal use only */
__NFC_ATTR_AFTER_LAST
};
@@ -225,6 +227,7 @@ enum nfc_sdp_attr {
#define NFC_GB_MAXSIZE 48
#define NFC_FIRMWARE_NAME_MAXSIZE 32
#define NFC_ISO15693_UID_MAXSIZE 8
#define NFC_ATS_MAXSIZE 20
/* NFC protocols */
#define NFC_PROTO_JEWEL 1
+10
View File
@@ -2868,6 +2868,9 @@ enum nl80211_commands {
* nested item, it contains attributes defined in
* &enum nl80211_if_combination_attrs.
*
* @NL80211_ATTR_VIF_RADIO_MASK: Bitmask of allowed radios (u32).
* A value of 0 means all radios.
*
* @NUM_NL80211_ATTR: total number of nl80211_attrs available
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
@@ -3416,6 +3419,8 @@ enum nl80211_attrs {
NL80211_ATTR_WIPHY_RADIOS,
NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS,
NL80211_ATTR_VIF_RADIO_MASK,
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,
@@ -4698,6 +4703,7 @@ enum nl80211_survey_info {
* overrides all other flags.
* @NL80211_MNTR_FLAG_ACTIVE: use the configured MAC address
* and ACK incoming unicast packets.
* @NL80211_MNTR_FLAG_SKIP_TX: do not pass local tx packets
*
* @__NL80211_MNTR_FLAG_AFTER_LAST: internal use
* @NL80211_MNTR_FLAG_MAX: highest possible monitor flag
@@ -4710,6 +4716,7 @@ enum nl80211_mntr_flags {
NL80211_MNTR_FLAG_OTHER_BSS,
NL80211_MNTR_FLAG_COOK_FRAMES,
NL80211_MNTR_FLAG_ACTIVE,
NL80211_MNTR_FLAG_SKIP_TX,
/* keep last */
__NL80211_MNTR_FLAG_AFTER_LAST,
@@ -8031,6 +8038,8 @@ enum nl80211_ap_settings_flags {
* @NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION: Supported interface
* combination for this radio. Attribute may be present multiple times
* and contains attributes defined in &enum nl80211_if_combination_attrs.
* @NL80211_WIPHY_RADIO_ATTR_ANTENNA_MASK: bitmask (u32) of antennas
* connected to this radio.
*
* @__NL80211_WIPHY_RADIO_ATTR_LAST: Internal
* @NL80211_WIPHY_RADIO_ATTR_MAX: Highest attribute
@@ -8041,6 +8050,7 @@ enum nl80211_wiphy_radio_attrs {
NL80211_WIPHY_RADIO_ATTR_INDEX,
NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE,
NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION,
NL80211_WIPHY_RADIO_ATTR_ANTENNA_MASK,
/* keep last */
__NL80211_WIPHY_RADIO_ATTR_LAST,
+30 -8
View File
@@ -340,7 +340,8 @@
#define PCI_MSIX_ENTRY_UPPER_ADDR 0x4 /* Message Upper Address */
#define PCI_MSIX_ENTRY_DATA 0x8 /* Message Data */
#define PCI_MSIX_ENTRY_VECTOR_CTRL 0xc /* Vector Control */
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 /* Mask Bit */
#define PCI_MSIX_ENTRY_CTRL_ST 0xffff0000 /* Steering Tag */
/* CompactPCI Hotswap Register */
@@ -659,6 +660,7 @@
#define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completion */
#define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp completion */
#define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */
#define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer support */
#define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */
@@ -678,6 +680,7 @@
#define PCI_EXP_DEVSTA2 0x2a /* Device Status 2 */
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 0x2c /* end of v2 EPs w/o link */
#define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities 2 */
#define PCI_EXP_LNKCAP2_SLS 0x000000fe /* Supported Link Speeds Vector */
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */
@@ -1023,15 +1026,34 @@
#define PCI_DPA_CAP_SUBSTATE_MASK 0x1F /* # substates - 1 */
#define PCI_DPA_BASE_SIZEOF 16 /* size with 0 substates */
/* TPH Completer Support */
#define PCI_EXP_DEVCAP2_TPH_COMP_NONE 0x0 /* None */
#define PCI_EXP_DEVCAP2_TPH_COMP_TPH_ONLY 0x1 /* TPH only */
#define PCI_EXP_DEVCAP2_TPH_COMP_EXT_TPH 0x3 /* TPH and Extended TPH */
/* TPH Requester */
#define PCI_TPH_CAP 4 /* capability register */
#define PCI_TPH_CAP_LOC_MASK 0x600 /* location mask */
#define PCI_TPH_LOC_NONE 0x000 /* no location */
#define PCI_TPH_LOC_CAP 0x200 /* in capability */
#define PCI_TPH_LOC_MSIX 0x400 /* in MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST table mask */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST table shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* size with no ST table */
#define PCI_TPH_CAP_ST_NS 0x00000001 /* No ST Mode Supported */
#define PCI_TPH_CAP_ST_IV 0x00000002 /* Interrupt Vector Mode Supported */
#define PCI_TPH_CAP_ST_DS 0x00000004 /* Device Specific Mode Supported */
#define PCI_TPH_CAP_EXT_TPH 0x00000100 /* Ext TPH Requester Supported */
#define PCI_TPH_CAP_LOC_MASK 0x00000600 /* ST Table Location */
#define PCI_TPH_LOC_NONE 0x00000000 /* Not present */
#define PCI_TPH_LOC_CAP 0x00000200 /* In capability */
#define PCI_TPH_LOC_MSIX 0x00000400 /* In MSI-X */
#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST Table Size */
#define PCI_TPH_CAP_ST_SHIFT 16 /* ST Table Size shift */
#define PCI_TPH_BASE_SIZEOF 0xc /* Size with no ST table */
#define PCI_TPH_CTRL 8 /* control register */
#define PCI_TPH_CTRL_MODE_SEL_MASK 0x00000007 /* ST Mode Select */
#define PCI_TPH_ST_NS_MODE 0x0 /* No ST Mode */
#define PCI_TPH_ST_IV_MODE 0x1 /* Interrupt Vector Mode */
#define PCI_TPH_ST_DS_MODE 0x2 /* Device Specific Mode */
#define PCI_TPH_CTRL_REQ_EN_MASK 0x00000300 /* TPH Requester Enable */
#define PCI_TPH_REQ_DISABLE 0x0 /* No TPH requests allowed */
#define PCI_TPH_REQ_TPH_ONLY 0x1 /* TPH only requests allowed */
#define PCI_TPH_REQ_EXT_TPH 0x3 /* Extended TPH requests allowed */
/* Downstream Port Containment */
#define PCI_EXP_DPC_CAP 0x04 /* DPC Capability */
+10 -1
View File
@@ -511,7 +511,16 @@ struct perf_event_attr {
__u16 sample_max_stack;
__u16 __reserved_2;
__u32 aux_sample_size;
__u32 __reserved_3;
union {
__u32 aux_action;
struct {
__u32 aux_start_paused : 1, /* start AUX area tracing paused */
aux_pause : 1, /* on overflow, pause AUX area tracing */
aux_resume : 1, /* on overflow, resume AUX area tracing */
__reserved_3 : 29;
};
};
/*
* User provided data if sigtrap=1, passed back to user via
+50
View File
@@ -16,6 +16,55 @@
#define PIDFD_SIGNAL_THREAD_GROUP (1UL << 1)
#define PIDFD_SIGNAL_PROCESS_GROUP (1UL << 2)
/* Flags for pidfd_info. */
#define PIDFD_INFO_PID (1UL << 0) /* Always returned, even if not requested */
#define PIDFD_INFO_CREDS (1UL << 1) /* Always returned, even if not requested */
#define PIDFD_INFO_CGROUPID (1UL << 2) /* Always returned if available, even if not requested */
#define PIDFD_INFO_SIZE_VER0 64 /* sizeof first published struct */
struct pidfd_info {
/*
* This mask is similar to the request_mask in statx(2).
*
* Userspace indicates what extensions or expensive-to-calculate fields
* they want by setting the corresponding bits in mask. The kernel
* will ignore bits that it does not know about.
*
* When filling the structure, the kernel will only set bits
* corresponding to the fields that were actually filled by the kernel.
* This also includes any future extensions that might be automatically
* filled. If the structure size is too small to contain a field
* (requested or not), to avoid confusion the mask will not
* contain a bit for that field.
*
* As such, userspace MUST verify that mask contains the
* corresponding flags after the ioctl(2) returns to ensure that it is
* using valid data.
*/
__u64 mask;
/*
* The information contained in the following fields might be stale at the
* time it is received, as the target process might have exited as soon as
* the IOCTL was processed, and there is no way to avoid that. However, it
* is guaranteed that if the call was successful, then the information was
* correct and referred to the intended process at the time the work was
* performed. */
__u64 cgroupid;
__u32 pid;
__u32 tgid;
__u32 ppid;
__u32 ruid;
__u32 rgid;
__u32 euid;
__u32 egid;
__u32 suid;
__u32 sgid;
__u32 fsuid;
__u32 fsgid;
__u32 spare0[1];
};
#define PIDFS_IOCTL_MAGIC 0xFF
#define PIDFD_GET_CGROUP_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 1)
@@ -28,5 +77,6 @@
#define PIDFD_GET_TIME_FOR_CHILDREN_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 8)
#define PIDFD_GET_USER_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 9)
#define PIDFD_GET_UTS_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 10)
#define PIDFD_GET_INFO _IOWR(PIDFS_IOCTL_MAGIC, 11, struct pidfd_info)
#endif /* _UAPI_LINUX_PIDFD_H */
+2
View File
@@ -836,6 +836,8 @@ enum {
TCA_FQ_WEIGHTS, /* Weights for each band */
TCA_FQ_OFFLOAD_HORIZON, /* dequeue paced packets within this horizon immediately (us units) */
__TCA_FQ_MAX
};
+26 -1
View File
@@ -230,7 +230,7 @@ struct prctl_mm_map {
# define PR_PAC_APDBKEY (1UL << 3)
# define PR_PAC_APGAKEY (1UL << 4)
/* Tagged user address controls for arm64 */
/* Tagged user address controls for arm64 and RISC-V */
#define PR_SET_TAGGED_ADDR_CTRL 55
#define PR_GET_TAGGED_ADDR_CTRL 56
# define PR_TAGGED_ADDR_ENABLE (1UL << 0)
@@ -244,6 +244,9 @@ struct prctl_mm_map {
# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
/* Unused; kept only for source compatibility */
# define PR_MTE_TCF_SHIFT 1
/* RISC-V pointer masking tag length */
# define PR_PMLEN_SHIFT 24
# define PR_PMLEN_MASK (0x7fUL << PR_PMLEN_SHIFT)
/* Control reclaim behavior when allocating memory */
#define PR_SET_IO_FLUSHER 57
@@ -328,4 +331,26 @@ struct prctl_mm_map {
# define PR_PPC_DEXCR_CTRL_CLEAR_ONEXEC 0x10 /* Clear the aspect on exec */
# define PR_PPC_DEXCR_CTRL_MASK 0x1f
/*
* Get the current shadow stack configuration for the current thread,
* this will be the value configured via PR_SET_SHADOW_STACK_STATUS.
*/
#define PR_GET_SHADOW_STACK_STATUS 74
/*
* Set the current shadow stack configuration. Enabling the shadow
* stack will cause a shadow stack to be allocated for the thread.
*/
#define PR_SET_SHADOW_STACK_STATUS 75
# define PR_SHADOW_STACK_ENABLE (1UL << 0)
# define PR_SHADOW_STACK_WRITE (1UL << 1)
# define PR_SHADOW_STACK_PUSH (1UL << 2)
/*
* Prevent further changes to the specified shadow stack
* configuration. All bits may be locked via this call, including
* undefined bits.
*/
#define PR_LOCK_SHADOW_STACK_STATUS 76
#endif /* _LINUX_PRCTL_H */
+5
View File
@@ -59,6 +59,7 @@
#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18)
#define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19)
#define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(20)
#define PSCI_1_3_FN_SYSTEM_OFF2 PSCI_0_2_FN(21)
#define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12)
#define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13)
@@ -68,6 +69,7 @@
#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18)
#define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(20)
#define PSCI_1_3_FN64_SYSTEM_OFF2 PSCI_0_2_FN64(21)
/* PSCI v0.2 power state encoding for CPU_SUSPEND function */
#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff
@@ -100,6 +102,9 @@
#define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0
#define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U
/* PSCI v1.3 hibernate type for SYSTEM_OFF2 */
#define PSCI_1_3_OFF_TYPE_HIBERNATE_OFF BIT(0)
/* PSCI version decoding (independent of PSCI version) */
#define PSCI_VERSION_MAJOR_SHIFT 16
#define PSCI_VERSION_MINOR_MASK \
-27
View File
@@ -1,27 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright 1996, 1997, 1998 Hans Reiser, see reiserfs/README for licensing and copyright details
*/
#ifndef _LINUX_REISER_FS_H
#define _LINUX_REISER_FS_H
#include <linux/types.h>
#include <linux/magic.h>
/*
* include/linux/reiser_fs.h
*
* Reiser File System constants and structures
*
*/
/* ioctl's command */
#define REISERFS_IOC_UNPACK _IOW(0xCD,1,long)
/* define following flags to be the same as in ext2, so that chattr(1),
lsattr(1) will work with us. */
#define REISERFS_IOC_GETFLAGS FS_IOC_GETFLAGS
#define REISERFS_IOC_SETFLAGS FS_IOC_SETFLAGS
#define REISERFS_IOC_GETVERSION FS_IOC_GETVERSION
#define REISERFS_IOC_SETVERSION FS_IOC_SETVERSION
#endif /* _LINUX_REISER_FS_H */
-25
View File
@@ -1,25 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
File: linux/reiserfs_xattr.h
*/
#ifndef _LINUX_REISERFS_XATTR_H
#define _LINUX_REISERFS_XATTR_H
#include <linux/types.h>
/* Magic value in header */
#define REISERFS_XATTR_MAGIC 0x52465841 /* "RFXA" */
struct reiserfs_xattr_header {
__le32 h_magic; /* magic number for identification */
__le32 h_hash; /* hash of the value */
};
struct reiserfs_security_handle {
const char *name;
void *value;
__kernel_size_t length;
};
#endif /* _LINUX_REISERFS_XATTR_H */
+1 -1
View File
@@ -174,7 +174,7 @@ enum {
#define RTM_GETLINKPROP RTM_GETLINKPROP
RTM_NEWVLAN = 112,
#define RTM_NEWNVLAN RTM_NEWVLAN
#define RTM_NEWVLAN RTM_NEWVLAN
RTM_DELVLAN,
#define RTM_DELVLAN RTM_DELVLAN
RTM_GETVLAN,
+1
View File
@@ -215,5 +215,6 @@ struct opal_revert_lsp {
#define IOC_OPAL_GET_GEOMETRY _IOR('p', 238, struct opal_geometry)
#define IOC_OPAL_DISCOVERY _IOW('p', 239, struct opal_discovery)
#define IOC_OPAL_REVERT_LSP _IOW('p', 240, struct opal_revert_lsp)
#define IOC_OPAL_SET_SID_PW _IOW('p', 241, struct opal_new_pw)
#endif /* _UAPI_SED_OPAL_H */
+22 -7
View File
@@ -3,6 +3,8 @@
#define _UAPI_LINUX_THERMAL_H
#define THERMAL_NAME_LENGTH 20
#define THERMAL_THRESHOLD_WAY_UP BIT(0)
#define THERMAL_THRESHOLD_WAY_DOWN BIT(1)
enum thermal_device_mode {
THERMAL_DEVICE_DISABLED = 0,
@@ -18,7 +20,7 @@ enum thermal_trip_type {
/* Adding event notification support elements */
#define THERMAL_GENL_FAMILY_NAME "thermal"
#define THERMAL_GENL_VERSION 0x01
#define THERMAL_GENL_VERSION 0x02
#define THERMAL_GENL_SAMPLING_GROUP_NAME "sampling"
#define THERMAL_GENL_EVENT_GROUP_NAME "event"
@@ -28,6 +30,7 @@ enum thermal_genl_attr {
THERMAL_GENL_ATTR_TZ,
THERMAL_GENL_ATTR_TZ_ID,
THERMAL_GENL_ATTR_TZ_TEMP,
THERMAL_GENL_ATTR_TZ_PREV_TEMP,
THERMAL_GENL_ATTR_TZ_TRIP,
THERMAL_GENL_ATTR_TZ_TRIP_ID,
THERMAL_GENL_ATTR_TZ_TRIP_TYPE,
@@ -48,6 +51,9 @@ enum thermal_genl_attr {
THERMAL_GENL_ATTR_CPU_CAPABILITY_ID,
THERMAL_GENL_ATTR_CPU_CAPABILITY_PERFORMANCE,
THERMAL_GENL_ATTR_CPU_CAPABILITY_EFFICIENCY,
THERMAL_GENL_ATTR_THRESHOLD,
THERMAL_GENL_ATTR_THRESHOLD_TEMP,
THERMAL_GENL_ATTR_THRESHOLD_DIRECTION,
__THERMAL_GENL_ATTR_MAX,
};
#define THERMAL_GENL_ATTR_MAX (__THERMAL_GENL_ATTR_MAX - 1)
@@ -75,6 +81,11 @@ enum thermal_genl_event {
THERMAL_GENL_EVENT_CDEV_STATE_UPDATE, /* Cdev state updated */
THERMAL_GENL_EVENT_TZ_GOV_CHANGE, /* Governor policy changed */
THERMAL_GENL_EVENT_CPU_CAPABILITY_CHANGE, /* CPU capability changed */
THERMAL_GENL_EVENT_THRESHOLD_ADD, /* A thresold has been added */
THERMAL_GENL_EVENT_THRESHOLD_DELETE, /* A thresold has been deleted */
THERMAL_GENL_EVENT_THRESHOLD_FLUSH, /* All thresolds have been deleted */
THERMAL_GENL_EVENT_THRESHOLD_UP, /* A thresold has been crossed the way up */
THERMAL_GENL_EVENT_THRESHOLD_DOWN, /* A thresold has been crossed the way down */
__THERMAL_GENL_EVENT_MAX,
};
#define THERMAL_GENL_EVENT_MAX (__THERMAL_GENL_EVENT_MAX - 1)
@@ -82,12 +93,16 @@ enum thermal_genl_event {
/* Commands supported by the thermal_genl_family */
enum thermal_genl_cmd {
THERMAL_GENL_CMD_UNSPEC,
THERMAL_GENL_CMD_TZ_GET_ID, /* List of thermal zones id */
THERMAL_GENL_CMD_TZ_GET_TRIP, /* List of thermal trips */
THERMAL_GENL_CMD_TZ_GET_TEMP, /* Get the thermal zone temperature */
THERMAL_GENL_CMD_TZ_GET_GOV, /* Get the thermal zone governor */
THERMAL_GENL_CMD_TZ_GET_MODE, /* Get the thermal zone mode */
THERMAL_GENL_CMD_CDEV_GET, /* List of cdev id */
THERMAL_GENL_CMD_TZ_GET_ID, /* List of thermal zones id */
THERMAL_GENL_CMD_TZ_GET_TRIP, /* List of thermal trips */
THERMAL_GENL_CMD_TZ_GET_TEMP, /* Get the thermal zone temperature */
THERMAL_GENL_CMD_TZ_GET_GOV, /* Get the thermal zone governor */
THERMAL_GENL_CMD_TZ_GET_MODE, /* Get the thermal zone mode */
THERMAL_GENL_CMD_CDEV_GET, /* List of cdev id */
THERMAL_GENL_CMD_THRESHOLD_GET, /* List of thresholds */
THERMAL_GENL_CMD_THRESHOLD_ADD, /* Add a threshold */
THERMAL_GENL_CMD_THRESHOLD_DELETE, /* Delete a threshold */
THERMAL_GENL_CMD_THRESHOLD_FLUSH, /* Flush all the thresholds */
__THERMAL_GENL_CMD_MAX,
};
#define THERMAL_GENL_CMD_MAX (__THERMAL_GENL_CMD_MAX - 1)
+1
View File
@@ -53,6 +53,7 @@ typedef __u32 __bitwise __wsum;
* No conversions are necessary between 32-bit user-space and a 64-bit kernel.
*/
#define __aligned_u64 __u64 __attribute__((aligned(8)))
#define __aligned_s64 __s64 __attribute__((aligned(8)))
#define __aligned_be64 __be64 __attribute__((aligned(8)))
#define __aligned_le64 __le64 __attribute__((aligned(8)))
+18
View File
@@ -147,8 +147,18 @@
*/
#define UBLK_F_NEED_GET_DATA (1UL << 2)
/*
* - Block devices are recoverable if ublk server exits and restarts
* - Outstanding I/O when ublk server exits is met with errors
* - I/O issued while there is no ublk server queues
*/
#define UBLK_F_USER_RECOVERY (1UL << 3)
/*
* - Block devices are recoverable if ublk server exits and restarts
* - Outstanding I/O when ublk server exits is reissued
* - I/O issued while there is no ublk server queues
*/
#define UBLK_F_USER_RECOVERY_REISSUE (1UL << 4)
/*
@@ -190,10 +200,18 @@
*/
#define UBLK_F_ZONED (1ULL << 8)
/*
* - Block devices are recoverable if ublk server exits and restarts
* - Outstanding I/O when ublk server exits is met with errors
* - I/O issued while there is no ublk server is met with errors
*/
#define UBLK_F_USER_RECOVERY_FAIL_IO (1ULL << 9)
/* device state */
#define UBLK_S_DEV_DEAD 0
#define UBLK_S_DEV_LIVE 1
#define UBLK_S_DEV_QUIESCED 2
#define UBLK_S_DEV_FAIL_IO 3
/* shipped via sqe->cmd of io_uring command */
struct ublksrv_ctrl_cmd {
+1 -1
View File
@@ -31,7 +31,7 @@ struct udphdr {
#define UDP_CORK 1 /* Never send partially complete segments */
#define UDP_ENCAP 100 /* Set the socket to accept encapsulated packets */
#define UDP_NO_CHECK6_TX 101 /* Disable sending checksum for UDP6X */
#define UDP_NO_CHECK6_RX 102 /* Disable accpeting checksum for UDP6 */
#define UDP_NO_CHECK6_RX 102 /* Disable accepting checksum for UDP6 */
#define UDP_SEGMENT 103 /* Set GSO segmentation size */
#define UDP_GRO 104 /* This socket can receive UDP GRO packets */
+58
View File
@@ -597,5 +597,63 @@ struct UVC_FRAME_MJPEG(n) { \
__le32 dwFrameInterval[n]; \
} __attribute__ ((packed))
/* Frame Based Payload - 3.1.1. Frame Based Video Format Descriptor */
struct uvc_format_framebased {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 bFormatIndex;
__u8 bNumFrameDescriptors;
__u8 guidFormat[16];
__u8 bBitsPerPixel;
__u8 bDefaultFrameIndex;
__u8 bAspectRatioX;
__u8 bAspectRatioY;
__u8 bmInterfaceFlags;
__u8 bCopyProtect;
__u8 bVariableSize;
} __attribute__((__packed__));
#define UVC_DT_FORMAT_FRAMEBASED_SIZE 28
/* Frame Based Payload - 3.1.2. Frame Based Video Frame Descriptor */
struct uvc_frame_framebased {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDescriptorSubType;
__u8 bFrameIndex;
__u8 bmCapabilities;
__u16 wWidth;
__u16 wHeight;
__u32 dwMinBitRate;
__u32 dwMaxBitRate;
__u32 dwDefaultFrameInterval;
__u8 bFrameIntervalType;
__u32 dwBytesPerLine;
__u32 dwFrameInterval[];
} __attribute__((__packed__));
#define UVC_DT_FRAME_FRAMEBASED_SIZE(n) (26+4*(n))
#define UVC_FRAME_FRAMEBASED(n) \
uvc_frame_framebased_##n
#define DECLARE_UVC_FRAME_FRAMEBASED(n) \
struct UVC_FRAME_FRAMEBASED(n) { \
__u8 bLength; \
__u8 bDescriptorType; \
__u8 bDescriptorSubType; \
__u8 bFrameIndex; \
__u8 bmCapabilities; \
__u16 wWidth; \
__u16 wHeight; \
__u32 dwMinBitRate; \
__u32 dwMaxBitRate; \
__u32 dwDefaultFrameInterval; \
__u8 bFrameIntervalType; \
__u32 dwBytesPerLine; \
__u32 dwFrameInterval[n]; \
} __attribute__ ((packed))
#endif /* __LINUX_USB_VIDEO_H */
+1 -1
View File
@@ -2,7 +2,7 @@
/*
* V4L2 DV timings header.
*
* Copyright (C) 2012-2016 Hans Verkuil <hans.verkuil@cisco.com>
* Copyright (C) 2012-2016 Hans Verkuil <hansverk@cisco.com>
*/
#ifndef _V4L2_DV_TIMINGS_H
+1 -1
View File
@@ -35,7 +35,7 @@
#define VFIO_EEH 5
/* Two-stage IOMMU */
#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
#define __VFIO_RESERVED_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
#define VFIO_SPAPR_TCE_v2_IOMMU 7
+6
View File
@@ -798,6 +798,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') /* S5C73M3 interleaved UYVY/JPEG */
#define V4L2_PIX_FMT_Y8I v4l2_fourcc('Y', '8', 'I', ' ') /* Greyscale 8-bit L/R interleaved */
#define V4L2_PIX_FMT_Y12I v4l2_fourcc('Y', '1', '2', 'I') /* Greyscale 12-bit L/R interleaved */
#define V4L2_PIX_FMT_Y16I v4l2_fourcc('Y', '1', '6', 'I') /* Greyscale 16-bit L/R interleaved */
#define V4L2_PIX_FMT_Z16 v4l2_fourcc('Z', '1', '6', ' ') /* Depth data 16-bit */
#define V4L2_PIX_FMT_MT21C v4l2_fourcc('M', 'T', '2', '1') /* Mediatek compressed block mode */
#define V4L2_PIX_FMT_MM21 v4l2_fourcc('M', 'M', '2', '1') /* Mediatek 8-bit block mode, two non-contiguous planes */
@@ -859,6 +860,8 @@ struct v4l2_pix_format {
/* Vendor specific - used for RaspberryPi PiSP */
#define V4L2_META_FMT_RPI_BE_CFG v4l2_fourcc('R', 'P', 'B', 'C') /* PiSP BE configuration */
#define V4L2_META_FMT_RPI_FE_CFG v4l2_fourcc('R', 'P', 'F', 'C') /* PiSP FE configuration */
#define V4L2_META_FMT_RPI_FE_STATS v4l2_fourcc('R', 'P', 'F', 'S') /* PiSP FE stats */
#ifdef __KERNEL__
/*
@@ -906,6 +909,9 @@ struct v4l2_fmtdesc {
#define V4L2_FMT_FLAG_CSC_QUANTIZATION 0x0100
#define V4L2_FMT_FLAG_META_LINE_BASED 0x0200
/* Format description flag, to be ORed with the index */
#define V4L2_FMTDESC_FLAG_ENUM_ALL 0x80000000
/* Frame Size and frame rate enumeration */
/*
* F R A M E S I Z E E N U M E R A T I O N
+1
View File
@@ -329,6 +329,7 @@ struct virtio_crypto_op_header {
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x00)
#define VIRTIO_CRYPTO_AKCIPHER_DECRYPT \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x01)
/* akcipher sign/verify opcodes are deprecated */
#define VIRTIO_CRYPTO_AKCIPHER_SIGN \
VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x02)
#define VIRTIO_CRYPTO_AKCIPHER_VERIFY \
+131
View File
@@ -40,6 +40,7 @@
#define _LINUX_VIRTIO_PCI_H
#include <linux/types.h>
#include <linux/kernel.h>
#ifndef VIRTIO_PCI_NO_LEGACY
@@ -240,6 +241,17 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5
#define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6
/* Device parts access commands. */
#define VIRTIO_ADMIN_CMD_CAP_ID_LIST_QUERY 0x7
#define VIRTIO_ADMIN_CMD_DEVICE_CAP_GET 0x8
#define VIRTIO_ADMIN_CMD_DRIVER_CAP_SET 0x9
#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_CREATE 0xa
#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_DESTROY 0xd
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_GET 0xe
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET 0xf
#define VIRTIO_ADMIN_CMD_DEV_PARTS_SET 0x10
#define VIRTIO_ADMIN_CMD_DEV_MODE_SET 0x11
struct virtio_admin_cmd_hdr {
__le16 opcode;
/*
@@ -286,4 +298,123 @@ struct virtio_admin_cmd_notify_info_result {
struct virtio_admin_cmd_notify_info_data entries[VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO];
};
#define VIRTIO_DEV_PARTS_CAP 0x0000
struct virtio_dev_parts_cap {
__u8 get_parts_resource_objects_limit;
__u8 set_parts_resource_objects_limit;
};
#define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, 64)
struct virtio_admin_cmd_query_cap_id_result {
__le64 supported_caps[MAX_CAP_ID];
};
struct virtio_admin_cmd_cap_get_data {
__le16 id;
__u8 reserved[6];
};
struct virtio_admin_cmd_cap_set_data {
__le16 id;
__u8 reserved[6];
__u8 cap_specific_data[];
};
struct virtio_admin_cmd_resource_obj_cmd_hdr {
__le16 type;
__u8 reserved[2];
__le32 id; /* Indicates unique resource object id per resource object type */
};
struct virtio_admin_cmd_resource_obj_create_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
__le64 flags;
__u8 resource_obj_specific_data[];
};
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS 0
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_GET 0
#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_SET 1
struct virtio_resource_obj_dev_parts {
__u8 type;
__u8 reserved[7];
};
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_SIZE 0
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_COUNT 1
#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_LIST 2
struct virtio_admin_cmd_dev_parts_metadata_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
__u8 type;
__u8 reserved[7];
};
#define VIRTIO_DEV_PART_F_OPTIONAL 0
struct virtio_dev_part_hdr {
__le16 part_type;
__u8 flags;
__u8 reserved;
union {
struct {
__le32 offset;
__le32 reserved;
} pci_common_cfg;
struct {
__le16 index;
__u8 reserved[6];
} vq_index;
} selector;
__le32 length;
};
struct virtio_dev_part {
struct virtio_dev_part_hdr hdr;
__u8 value[];
};
struct virtio_admin_cmd_dev_parts_metadata_result {
union {
struct {
__le32 size;
__le32 reserved;
} parts_size;
struct {
__le32 count;
__le32 reserved;
} hdr_list_count;
struct {
__le32 count;
__le32 reserved;
struct virtio_dev_part_hdr hdrs[];
} hdr_list;
};
};
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_SELECTED 0
#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_ALL 1
struct virtio_admin_cmd_dev_parts_get_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
__u8 type;
__u8 reserved[7];
struct virtio_dev_part_hdr hdr_list[];
};
struct virtio_admin_cmd_dev_parts_set_data {
struct virtio_admin_cmd_resource_obj_cmd_hdr hdr;
struct virtio_dev_part parts[];
};
#define VIRTIO_ADMIN_CMD_DEV_MODE_F_STOPPED 0
struct virtio_admin_cmd_dev_mode_set_data {
__u8 flags;
};
#endif
+182
View File
@@ -0,0 +1,182 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
/*
* This structure provides a vDSO-style clock to VM guests, exposing the
* relationship (or lack thereof) between the CPU clock (TSC, timebase, arch
* counter, etc.) and real time. It is designed to address the problem of
* live migration, which other clock enlightenments do not.
*
* When a guest is live migrated, this affects the clock in two ways.
*
* First, even between identical hosts the actual frequency of the underlying
* counter will change within the tolerances of its specification (typically
* ±50PPM, or 4 seconds a day). This frequency also varies over time on the
* same host, but can be tracked by NTP as it generally varies slowly. With
* live migration there is a step change in the frequency, with no warning.
*
* Second, there may be a step change in the value of the counter itself, as
* its accuracy is limited by the precision of the NTP synchronization on the
* source and destination hosts.
*
* So any calibration (NTP, PTP, etc.) which the guest has done on the source
* host before migration is invalid, and needs to be redone on the new host.
*
* In its most basic mode, this structure provides only an indication to the
* guest that live migration has occurred. This allows the guest to know that
* its clock is invalid and take remedial action. For applications that need
* reliable accurate timestamps (e.g. distributed databases), the structure
* can be mapped all the way to userspace. This allows the application to see
* directly for itself that the clock is disrupted and take appropriate
* action, even when using a vDSO-style method to get the time instead of a
* system call.
*
* In its more advanced mode. this structure can also be used to expose the
* precise relationship of the CPU counter to real time, as calibrated by the
* host. This means that userspace applications can have accurate time
* immediately after live migration, rather than having to pause operations
* and wait for NTP to recover. This mode does, of course, rely on the
* counter being reliable and consistent across CPUs.
*
* Note that this must be true UTC, never with smeared leap seconds. If a
* guest wishes to construct a smeared clock, it can do so. Presenting a
* smeared clock through this interface would be problematic because it
* actually messes with the apparent counter *period*. A linear smearing
* of 1 ms per second would effectively tweak the counter period by 1000PPM
* at the start/end of the smearing period, while a sinusoidal smear would
* basically be impossible to represent.
*
* This structure is offered with the intent that it be adopted into the
* nascent virtio-rtc standard, as a virtio-rtc that does not address the live
* migration problem seems a little less than fit for purpose. For that
* reason, certain fields use precisely the same numeric definitions as in
* the virtio-rtc proposal. The structure can also be exposed through an ACPI
* device with the CID "VMCLOCK", modelled on the "VMGENID" device except for
* the fact that it uses a real _CRS to convey the address of the structure
* (which should be a full page, to allow for mapping directly to userspace).
*/
#ifndef __VMCLOCK_ABI_H__
#define __VMCLOCK_ABI_H__
#include <linux/types.h>
struct vmclock_abi {
/* CONSTANT FIELDS */
__le32 magic;
#define VMCLOCK_MAGIC 0x4b4c4356 /* "VCLK" */
__le32 size; /* Size of region containing this structure */
__le16 version; /* 1 */
__u8 counter_id; /* Matches VIRTIO_RTC_COUNTER_xxx except INVALID */
#define VMCLOCK_COUNTER_ARM_VCNT 0
#define VMCLOCK_COUNTER_X86_TSC 1
#define VMCLOCK_COUNTER_INVALID 0xff
__u8 time_type; /* Matches VIRTIO_RTC_TYPE_xxx */
#define VMCLOCK_TIME_UTC 0 /* Since 1970-01-01 00:00:00z */
#define VMCLOCK_TIME_TAI 1 /* Since 1970-01-01 00:00:00z */
#define VMCLOCK_TIME_MONOTONIC 2 /* Since undefined epoch */
#define VMCLOCK_TIME_INVALID_SMEARED 3 /* Not supported */
#define VMCLOCK_TIME_INVALID_MAYBE_SMEARED 4 /* Not supported */
/* NON-CONSTANT FIELDS PROTECTED BY SEQCOUNT LOCK */
__le32 seq_count; /* Low bit means an update is in progress */
/*
* This field changes to another non-repeating value when the CPU
* counter is disrupted, for example on live migration. This lets
* the guest know that it should discard any calibration it has
* performed of the counter against external sources (NTP/PTP/etc.).
*/
__le64 disruption_marker;
__le64 flags;
/* Indicates that the tai_offset_sec field is valid */
#define VMCLOCK_FLAG_TAI_OFFSET_VALID (1 << 0)
/*
* Optionally used to notify guests of pending maintenance events.
* A guest which provides latency-sensitive services may wish to
* remove itself from service if an event is coming up. Two flags
* indicate the approximate imminence of the event.
*/
#define VMCLOCK_FLAG_DISRUPTION_SOON (1 << 1) /* About a day */
#define VMCLOCK_FLAG_DISRUPTION_IMMINENT (1 << 2) /* About an hour */
#define VMCLOCK_FLAG_PERIOD_ESTERROR_VALID (1 << 3)
#define VMCLOCK_FLAG_PERIOD_MAXERROR_VALID (1 << 4)
#define VMCLOCK_FLAG_TIME_ESTERROR_VALID (1 << 5)
#define VMCLOCK_FLAG_TIME_MAXERROR_VALID (1 << 6)
/*
* If the MONOTONIC flag is set then (other than leap seconds) it is
* guaranteed that the time calculated according this structure at
* any given moment shall never appear to be later than the time
* calculated via the structure at any *later* moment.
*
* In particular, a timestamp based on a counter reading taken
* immediately after setting the low bit of seq_count (and the
* associated memory barrier), using the previously-valid time and
* period fields, shall never be later than a timestamp based on
* a counter reading taken immediately before *clearing* the low
* bit again after the update, using the about-to-be-valid fields.
*/
#define VMCLOCK_FLAG_TIME_MONOTONIC (1 << 7)
__u8 pad[2];
__u8 clock_status;
#define VMCLOCK_STATUS_UNKNOWN 0
#define VMCLOCK_STATUS_INITIALIZING 1
#define VMCLOCK_STATUS_SYNCHRONIZED 2
#define VMCLOCK_STATUS_FREERUNNING 3
#define VMCLOCK_STATUS_UNRELIABLE 4
/*
* The time exposed through this device is never smeared. This field
* corresponds to the 'subtype' field in virtio-rtc, which indicates
* the smearing method. However in this case it provides a *hint* to
* the guest operating system, such that *if* the guest OS wants to
* provide its users with an alternative clock which does not follow
* UTC, it may do so in a fashion consistent with the other systems
* in the nearby environment.
*/
__u8 leap_second_smearing_hint; /* Matches VIRTIO_RTC_SUBTYPE_xxx */
#define VMCLOCK_SMEARING_STRICT 0
#define VMCLOCK_SMEARING_NOON_LINEAR 1
#define VMCLOCK_SMEARING_UTC_SLS 2
__le16 tai_offset_sec; /* Actually two's complement signed */
__u8 leap_indicator;
/*
* This field is based on the VIRTIO_RTC_LEAP_xxx values as defined
* in the current draft of virtio-rtc, but since smearing cannot be
* used with the shared memory device, some values are not used.
*
* The _POST_POS and _POST_NEG values allow the guest to perform
* its own smearing during the day or so after a leap second when
* such smearing may need to continue being applied for a leap
* second which is now theoretically "historical".
*/
#define VMCLOCK_LEAP_NONE 0x00 /* No known nearby leap second */
#define VMCLOCK_LEAP_PRE_POS 0x01 /* Positive leap second at EOM */
#define VMCLOCK_LEAP_PRE_NEG 0x02 /* Negative leap second at EOM */
#define VMCLOCK_LEAP_POS 0x03 /* Set during 23:59:60 second */
#define VMCLOCK_LEAP_POST_POS 0x04
#define VMCLOCK_LEAP_POST_NEG 0x05
/* Bit shift for counter_period_frac_sec and its error rate */
__u8 counter_period_shift;
/*
* Paired values of counter and UTC at a given point in time.
*/
__le64 counter_value;
/*
* Counter period, and error margin of same. The unit of these
* fields is 1/2^(64 + counter_period_shift) of a second.
*/
__le64 counter_period_frac_sec;
__le64 counter_period_esterror_rate_frac_sec;
__le64 counter_period_maxerror_rate_frac_sec;
/*
* Time according to time_type field above.
*/
__le64 time_sec; /* Seconds since time_type epoch */
__le64 time_frac_sec; /* Units of 1/2^64 of a second */
__le64 time_esterror_nanosec;
__le64 time_maxerror_nanosec;
};
#endif /* __VMCLOCK_ABI_H__ */
+7
View File
@@ -11,6 +11,7 @@
*/
#include <linux/libc-compat.h>
#include <linux/types.h>
#ifndef _UAPI_LINUX_XATTR_H
#define _UAPI_LINUX_XATTR_H
@@ -20,6 +21,12 @@
#define XATTR_CREATE 0x1 /* set value, fail if attr already exists */
#define XATTR_REPLACE 0x2 /* set value, fail if attr does not exist */
struct xattr_args {
__aligned_u64 __user value;
__u32 size;
__u32 flags;
};
#endif
/* Namespaces */
+2
View File
@@ -322,6 +322,7 @@ enum xfrm_attr_type_t {
XFRMA_MTIMER_THRESH, /* __u32 in seconds for input SA */
XFRMA_SA_DIR, /* __u8 */
XFRMA_NAT_KEEPALIVE_INTERVAL, /* __u32 in seconds for NAT keepalive */
XFRMA_SA_PCPU, /* __u32 */
__XFRMA_MAX
#define XFRMA_OUTPUT_MARK XFRMA_SET_MARK /* Compatibility */
@@ -437,6 +438,7 @@ struct xfrm_userpolicy_info {
#define XFRM_POLICY_LOCALOK 1 /* Allow user to override global policy */
/* Automatically expand selector to include matching ICMP payloads. */
#define XFRM_POLICY_ICMP 2
#define XFRM_POLICY_CPU_ACQUIRE 4
__u8 share;
};
+2 -1
View File
@@ -95,7 +95,8 @@ struct efa_ibv_create_qp {
__u32 sq_ring_size; /* bytes */
__u32 driver_qp_type;
__u16 flags;
__u8 reserved_90[6];
__u8 sl;
__u8 reserved_98[5];
};
struct efa_ibv_create_qp_resp {
+5
View File
@@ -252,6 +252,7 @@ enum mlx5_ib_query_dev_resp_flags {
MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_PAD = 1 << 1,
MLX5_IB_QUERY_DEV_RESP_PACKET_BASED_CREDIT_MODE = 1 << 2,
MLX5_IB_QUERY_DEV_RESP_FLAGS_SCAT2CQE_DCT = 1 << 3,
MLX5_IB_QUERY_DEV_RESP_FLAGS_OOO_DP = 1 << 4,
};
enum mlx5_ib_tunnel_offloads {
@@ -439,6 +440,10 @@ struct mlx5_ib_burst_info {
__u16 reserved;
};
enum mlx5_ib_modify_qp_mask {
MLX5_IB_MODIFY_QP_OOO_DP = 1 << 0,
};
struct mlx5_ib_modify_qp {
__u32 comp_mask;
struct mlx5_ib_burst_info burst_info;
+2
View File
@@ -638,6 +638,8 @@ enum rdma_nl_notify_event_type {
RDMA_UNREGISTER_EVENT,
RDMA_NETDEV_ATTACH_EVENT,
RDMA_NETDEV_DETACH_EVENT,
RDMA_RENAME_EVENT,
RDMA_NETDEV_RENAME_EVENT,
};
#endif /* _UAPI_RDMA_NETLINK_H */
+64 -2
View File
@@ -14,7 +14,7 @@
#include <sound/compress_params.h>
#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 2, 0)
#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 3, 0)
/**
* struct snd_compressed_buffer - compressed buffer
* @fragment_size: size of buffer fragment in bytes
@@ -68,7 +68,8 @@ struct snd_compr_avail {
enum snd_compr_direction {
SND_COMPRESS_PLAYBACK = 0,
SND_COMPRESS_CAPTURE
SND_COMPRESS_CAPTURE,
SND_COMPRESS_ACCEL
};
/**
@@ -127,6 +128,59 @@ struct snd_compr_metadata {
__u32 value[8];
} __attribute__((packed, aligned(4)));
/* flags for struct snd_compr_task */
#define SND_COMPRESS_TFLG_NEW_STREAM (1<<0) /* mark for the new stream data */
/**
* struct snd_compr_task - task primitive for non-realtime operation
* @seqno: sequence number (task identifier)
* @origin_seqno: previous sequence number (task identifier) - for reuse
* @input_fd: data input file descriptor (dma-buf)
* @output_fd: data output file descriptor (dma-buf)
* @input_size: filled data in bytes (from caller, must not exceed fragment size)
* @flags: see SND_COMPRESS_TFLG_* defines
* @reserved: reserved for future extension
*/
struct snd_compr_task {
__u64 seqno;
__u64 origin_seqno;
int input_fd;
int output_fd;
__u64 input_size;
__u32 flags;
__u8 reserved[16];
} __attribute__((packed, aligned(4)));
/**
* enum snd_compr_state - task state
* @SND_COMPRESS_TASK_STATE_IDLE: task is not queued
* @SND_COMPRESS_TASK_STATE_ACTIVE: task is in the queue
* @SND_COMPRESS_TASK_STATE_FINISHED: task was processed, output is available
*/
enum snd_compr_state {
SND_COMPRESS_TASK_STATE_IDLE = 0,
SND_COMPRESS_TASK_STATE_ACTIVE,
SND_COMPRESS_TASK_STATE_FINISHED
};
/**
* struct snd_compr_task_status - task status
* @seqno: sequence number (task identifier)
* @input_size: filled data in bytes (from user space)
* @output_size: filled data in bytes (from driver)
* @output_flags: reserved for future (all zeros - from driver)
* @state: actual task state (SND_COMPRESS_TASK_STATE_*)
* @reserved: reserved for future extension
*/
struct snd_compr_task_status {
__u64 seqno;
__u64 input_size;
__u64 output_size;
__u32 output_flags;
__u8 state;
__u8 reserved[15];
} __attribute__((packed, aligned(4)));
/*
* compress path ioctl definitions
* SNDRV_COMPRESS_GET_CAPS: Query capability of DSP
@@ -164,6 +218,14 @@ struct snd_compr_metadata {
#define SNDRV_COMPRESS_DRAIN _IO('C', 0x34)
#define SNDRV_COMPRESS_NEXT_TRACK _IO('C', 0x35)
#define SNDRV_COMPRESS_PARTIAL_DRAIN _IO('C', 0x36)
#define SNDRV_COMPRESS_TASK_CREATE _IOWR('C', 0x60, struct snd_compr_task)
#define SNDRV_COMPRESS_TASK_FREE _IOW('C', 0x61, __u64)
#define SNDRV_COMPRESS_TASK_START _IOWR('C', 0x62, struct snd_compr_task)
#define SNDRV_COMPRESS_TASK_STOP _IOW('C', 0x63, __u64)
#define SNDRV_COMPRESS_TASK_STATUS _IOWR('C', 0x68, struct snd_compr_task_status)
/*
* TODO
* 1. add mmap support