mlxsw: Register physical ports as a devlink resource
The switch ASIC has a limited capacity of physical ('flavour physical'
in devlink terminology) ports that it can support. While each system is
brought up with a different number of ports, this number can be
increased via splitting up to the ASIC's limit.
Expose physical ports as a devlink resource so that user space will have
visibility to the maximum number of ports that can be supported and the
current occupancy.
In addition, add a "Generic Resources" section in devlink-resource
documentation so the different drivers will be aligned by the same resource
name when exposing to user space.
Signed-off-by: Danielle Ratson <danieller@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Jakub Kicinski
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@@ -380,6 +380,8 @@ struct devlink_resource {
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#define DEVLINK_RESOURCE_ID_PARENT_TOP 0
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#define DEVLINK_RESOURCE_GENERIC_NAME_PORTS "physical_ports"
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#define __DEVLINK_PARAM_MAX_STRING_VALUE 32
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enum devlink_param_type {
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DEVLINK_PARAM_TYPE_U8,
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