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Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Browse Source 
Pull ARM SoC driver changes from Olof Johansson:
 "A handful of driver-related changes.  We've had a bunch of them going
  in through other branches as well, so it's only a part of what we
  really have this release.

  Larger pieces are:

   - Removal of a now unused PWM driver for atmel
     [ This includes AVR32 changes that have been appropriately acked ]
   - Performance counter support for the arm CCN interconnect
   - OMAP mailbox driver cleanups and consolidation
   - PCI and SATA PHY drivers for SPEAr 13xx platforms
   - Redefinition (with backwards compatibility!) of PCI DT bindings for
     Tegra to better model regulators/power"

Note: this merge also fixes up the semantic conflict with the new
calling convention for devm_phy_create(), see commit f0ed817638 ("phy:
core: Let node ptr of PHY point to PHY and not of PHY provider") that
came in through Greg's USB tree.

Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through
the next tree.

* tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  bus: arm-ccn: Fix error handling at event allocation
  mailbox/omap: add a parent structure for every IP instance
  mailbox/omap: remove the private mailbox structure
  mailbox/omap: consolidate OMAP mailbox driver
  mailbox/omap: simplify the fifo assignment by using macros
  mailbox/omap: remove omap_mbox_type_t from mailbox ops
  mailbox/omap: remove OMAP1 mailbox driver
  mailbox/omap: use devm_* interfaces
  bus: ARM CCN: add PERF_EVENTS dependency
  bus: ARM CCN PMU driver
  PCI: spear: Remove spear13xx_pcie_remove()
  PCI: spear: Fix Section mismatch compilation warning for probe()
  ARM: tegra: Remove legacy PCIe power supply properties
  PCI: tegra: Remove deprecated power supply properties
  PCI: tegra: Implement accurate power supply scheme
  ARM: SPEAr13xx: Update defconfigs
  ARM: SPEAr13xx: Add pcie and miphy DT nodes
  ARM: SPEAr13xx: Add bindings and dt node for misc block
  ARM: SPEAr13xx: Fix static mapping table
  phy: Add drivers for PCIe and SATA phy on SPEAr13xx
  ...
This commit is contained in:
Linus Torvalds
2014-08-08 11:34:32 -07:00
parent d4e1f5a14e 3e528cb7ba
commit 10c8e05620
74 changed files with 3452 additions and 2023 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/linux/atmel-pwm-bl.h
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/*
* Copyright (C) 2007 Atmel Corporation
*
* Driver for the AT32AP700X PS/2 controller (PSIF).
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef __INCLUDE_ATMEL_PWM_BL_H
#define __INCLUDE_ATMEL_PWM_BL_H
/**
* struct atmel_pwm_bl_platform_data
* @pwm_channel: which PWM channel in the PWM module to use.
* @pwm_frequency: PWM frequency to generate, the driver will try to be as
* close as the prescaler allows.
* @pwm_compare_max: value to use in the PWM channel compare register.
* @pwm_duty_max: maximum duty cycle value, must be less than or equal to
* pwm_compare_max.
* @pwm_duty_min: minimum duty cycle value, must be less than pwm_duty_max.
* @pwm_active_low: set to one if the low part of the PWM signal increases the
* brightness of the backlight.
* @gpio_on: GPIO line to control the backlight on/off, set to -1 if not used.
* @on_active_low: set to one if the on/off signal is on when GPIO is low.
*
* This struct must be added to the platform device in the board code. It is
* used by the atmel-pwm-bl driver to setup the GPIO to control on/off and the
* PWM device.
*/
struct atmel_pwm_bl_platform_data {
unsigned int pwm_channel;
unsigned int pwm_frequency;
unsigned int pwm_compare_max;
unsigned int pwm_duty_max;
unsigned int pwm_duty_min;
unsigned int pwm_active_low;
int gpio_on;
unsigned int on_active_low;
};
#endif /* __INCLUDE_ATMEL_PWM_BL_H */
include/linux/atmel_pwm.h
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#ifndef __LINUX_ATMEL_PWM_H
#define __LINUX_ATMEL_PWM_H
/**
* struct pwm_channel - driver handle to a PWM channel
* @regs: base of this channel's registers
* @index: number of this channel (0..31)
* @mck: base clock rate, which can be prescaled and maybe subdivided
*
* Drivers initialize a pwm_channel structure using pwm_channel_alloc().
* Then they configure its clock rate (derived from MCK), alignment,
* polarity, and duty cycle by writing directly to the channel registers,
* before enabling the channel by calling pwm_channel_enable().
*
* After emitting a PWM signal for the desired length of time, drivers
* may then pwm_channel_disable() or pwm_channel_free(). Both of these
* disable the channel, but when it's freed the IRQ is deconfigured and
* the channel must later be re-allocated and reconfigured.
*
* Note that if the period or duty cycle need to be changed while the
* PWM channel is operating, drivers must use the PWM_CUPD double buffer
* mechanism, either polling until they change or getting implicitly
* notified through a once-per-period interrupt handler.
*/
struct pwm_channel {
void __iomem *regs;
unsigned index;
unsigned long mck;
};
extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
extern int pwm_channel_free(struct pwm_channel *ch);
extern int pwm_clk_alloc(unsigned prescale, unsigned div);
extern void pwm_clk_free(unsigned clk);
extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1)
#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0)
/* periodic interrupts, mostly for CUPD changes to period or cycle */
extern int pwm_channel_handler(struct pwm_channel *ch,
void (*handler)(struct pwm_channel *ch));
/* per-channel registers (banked at pwm_channel->regs) */
#define PWM_CMR 0x00 /* mode register */
#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */
#define PWM_CPR_CPOL (1 << 9) /* set: idle high */
#define PWM_CPR_CALG (1 << 8) /* set: center align */
#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */
#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */
#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */
#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */
#define PWM_CPRD 0x08 /* period (count up from zero) */
#define PWM_CCNT 0x0c /* counter (20 bits?) */
#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */
static inline void
pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
{
__raw_writel(val, pwmc->regs + offset);
}
static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
{
return __raw_readl(pwmc->regs + offset);
}
#endif /* __LINUX_ATMEL_PWM_H */