habanalabs: add information about PCIe controller
Update firmware header with new API for getting pcie info such as tx/rx throughput and replay counter. These counters are needed by customers for monitor and maintenance of multiple devices. Add new opcodes to the INFO ioctl to retrieve these counters. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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@@ -264,6 +264,8 @@ enum hl_device_status {
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* HL_INFO_TIME_SYNC - Retrieve the device's time alongside the host's time
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* for synchronization.
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* HL_INFO_CS_COUNTERS - Retrieve command submission counters
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* HL_INFO_PCI_COUNTERS - Retrieve PCI counters
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* HL_INFO_CLK_THROTTLE_REASON - Retrieve clock throttling reason
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*/
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#define HL_INFO_HW_IP_INFO 0
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#define HL_INFO_HW_EVENTS 1
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@@ -276,6 +278,8 @@ enum hl_device_status {
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#define HL_INFO_RESET_COUNT 9
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#define HL_INFO_TIME_SYNC 10
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#define HL_INFO_CS_COUNTERS 11
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#define HL_INFO_PCI_COUNTERS 12
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#define HL_INFO_CLK_THROTTLE_REASON 13
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#define HL_INFO_VERSION_MAX_LEN 128
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#define HL_INFO_CARD_NAME_MAX_LEN 16
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@@ -340,6 +344,29 @@ struct hl_info_time_sync {
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__u64 host_time;
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};
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/**
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* struct hl_info_pci_counters - pci counters
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* @rx_throughput: PCI rx throughput KBps
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* @tx_throughput: PCI tx throughput KBps
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* @replay_cnt: PCI replay counter
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*/
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struct hl_info_pci_counters {
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__u64 rx_throughput;
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__u64 tx_throughput;
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__u64 replay_cnt;
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};
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#define HL_CLK_THROTTLE_POWER 0x1
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#define HL_CLK_THROTTLE_THERMAL 0x2
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/**
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* struct hl_info_clk_throttle - clock throttling reason
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* @clk_throttling_reason: each bit represents a clk throttling reason
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*/
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struct hl_info_clk_throttle {
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__u32 clk_throttling_reason;
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};
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/**
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* struct hl_info_cs_counters - command submission counters
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* @out_of_mem_drop_cnt: dropped due to memory allocation issue
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