Merge tag 'mmc-updates-for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc
Pull MMC update from Chris Ball:
"MMC highlights for 3.16:
Core:
- support HS400 mode of eMMC 5.0, via DT bindings mmc-hs400-1_{2,8}v
- if card init at 3.3v doesn't work, try 1.8v and 1.2v too
Drivers:
- moxart: New driver for MOXA ART SoCs
- rtsx_usb_sdmmc: New driver for Realtek USB card readers
- sdhci: Large rework around IRQ/regulator handling, remove card_tasklet
- sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support
- sunxi: New driver for Allwinner sunxi SoCs
- usdhi6rol0: New driver for Renesas SD/SDIO controller"
* tag 'mmc-updates-for-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (95 commits)
mmc: sdhci-s3c: use mmc_of_parse and remove the card_tasklet
mmc: add a driver for the Renesas usdhi6rol0 SD/SDIO host controller
mmc: sdhci-of-esdhc: Fixup compile error
mmc: tegra: fix reporting of base clock frequency
mmc: tegra: disable UHS modes
mmc: sdhci-dove: use mmc_of_parse() and remove card_tasklet CD handler
MAINTAINERS: mmc: Add path to git tree
mmc: dove: fix missing MACH_DOVE dependency
mmc: sdhci: SD tuning is broken for some controllers
mmc: sdhci-esdhc-imx: fix mmc ddr mode regression issue
mmc: sdhci-pci-o2micro: Add SeaBird SeaEagle SD3 support
mmc: omap_hsmmc: split omap-dma header file
mmc: omap_hsmmc: fix cmd23 multiblock read/write
mmc: omap_hsmmc: use devm_ioremap_resource
mmc: omap_hsmmc: use devm_request_threaded_irq
mmc: omap_hsmmc: use devm_request_irq
mmc: omap_hsmmc: use devm_clk_get
mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs
mmc: wmt-sdmmc: Use GFP_KERNEL instead of hard-coded value
mmc: omap: Use DIV_ROUND_UP instead of open coded
...
This commit is contained in:
Linus Torvalds
+10
-19
@@ -63,12 +63,12 @@ struct mmc_ext_csd {
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unsigned int power_off_longtime; /* Units: ms */
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u8 power_off_notification; /* state */
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unsigned int hs_max_dtr;
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unsigned int hs200_max_dtr;
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#define MMC_HIGH_26_MAX_DTR 26000000
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#define MMC_HIGH_52_MAX_DTR 52000000
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#define MMC_HIGH_DDR_MAX_DTR 52000000
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#define MMC_HS200_MAX_DTR 200000000
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unsigned int sectors;
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unsigned int card_type;
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unsigned int hc_erase_size; /* In sectors */
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unsigned int hc_erase_timeout; /* In milliseconds */
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unsigned int sec_trim_mult; /* Secure trim multiplier */
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@@ -110,6 +110,7 @@ struct mmc_ext_csd {
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u8 raw_pwr_cl_200_360; /* 237 */
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u8 raw_pwr_cl_ddr_52_195; /* 238 */
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u8 raw_pwr_cl_ddr_52_360; /* 239 */
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u8 raw_pwr_cl_ddr_200_360; /* 253 */
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u8 raw_bkops_status; /* 246 */
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u8 raw_sectors[4]; /* 212 - 4 bytes */
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@@ -194,6 +195,7 @@ struct sdio_cis {
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};
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struct mmc_host;
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struct mmc_ios;
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struct sdio_func;
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struct sdio_func_tuple;
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@@ -250,15 +252,11 @@ struct mmc_card {
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unsigned int state; /* (our) card state */
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#define MMC_STATE_PRESENT (1<<0) /* present in sysfs */
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#define MMC_STATE_READONLY (1<<1) /* card is read-only */
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#define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */
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#define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */
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#define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */
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#define MMC_STATE_ULTRAHIGHSPEED (1<<5) /* card is in ultra high speed mode */
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#define MMC_CARD_SDXC (1<<6) /* card is SDXC */
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#define MMC_CARD_REMOVED (1<<7) /* card has been removed */
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#define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */
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#define MMC_STATE_DOING_BKOPS (1<<10) /* card is doing BKOPS */
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#define MMC_STATE_SUSPENDED (1<<11) /* card is suspended */
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#define MMC_STATE_BLOCKADDR (1<<2) /* card uses block-addressing */
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#define MMC_CARD_SDXC (1<<3) /* card is SDXC */
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#define MMC_CARD_REMOVED (1<<4) /* card has been removed */
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#define MMC_STATE_DOING_BKOPS (1<<5) /* card is doing BKOPS */
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#define MMC_STATE_SUSPENDED (1<<6) /* card is suspended */
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unsigned int quirks; /* card quirks */
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#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
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#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
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@@ -301,6 +299,7 @@ struct mmc_card {
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struct sdio_func_tuple *tuples; /* unknown common tuples */
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unsigned int sd_bus_speed; /* Bus Speed Mode set for the card */
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unsigned int mmc_avail_type; /* supported device type by both host and card */
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struct dentry *debugfs_root;
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struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
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@@ -353,7 +352,7 @@ struct mmc_fixup {
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#define CID_OEMID_ANY ((unsigned short) -1)
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#define CID_NAME_ANY (NULL)
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#define END_FIXUP { 0 }
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#define END_FIXUP { NULL }
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#define _FIXUP_EXT(_name, _manfid, _oemid, _rev_start, _rev_end, \
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_cis_vendor, _cis_device, \
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@@ -418,11 +417,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
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#define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT)
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#define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY)
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#define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED)
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#define mmc_card_hs200(c) ((c)->state & MMC_STATE_HIGHSPEED_200)
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#define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR)
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#define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR)
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#define mmc_card_uhs(c) ((c)->state & MMC_STATE_ULTRAHIGHSPEED)
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#define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC)
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#define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED))
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#define mmc_card_doing_bkops(c) ((c)->state & MMC_STATE_DOING_BKOPS)
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@@ -430,11 +425,7 @@ static inline void __maybe_unused remove_quirk(struct mmc_card *card, int data)
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#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
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#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
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#define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
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#define mmc_card_set_hs200(c) ((c)->state |= MMC_STATE_HIGHSPEED_200)
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#define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
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#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
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#define mmc_card_set_uhs(c) ((c)->state |= MMC_STATE_ULTRAHIGHSPEED)
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#define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC)
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#define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED)
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#define mmc_card_set_doing_bkops(c) ((c)->state |= MMC_STATE_DOING_BKOPS)
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@@ -248,20 +248,6 @@ struct dw_mci_board {
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/* delay in mS before detecting cards after interrupt */
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u32 detect_delay_ms;
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int (*init)(u32 slot_id, irq_handler_t , void *);
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int (*get_ro)(u32 slot_id);
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int (*get_cd)(u32 slot_id);
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int (*get_ocr)(u32 slot_id);
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int (*get_bus_wd)(u32 slot_id);
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/*
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* Enable power to selected slot and set voltage to desired level.
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* Voltage levels are specified using MMC_VDD_xxx defines defined
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* in linux/mmc/host.h file.
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*/
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void (*setpower)(u32 slot_id, u32 volt);
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void (*exit)(u32 slot_id);
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void (*select_slot)(u32 slot_id);
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struct dw_mci_dma_ops *dma_ops;
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struct dma_pdata *data;
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struct block_settings *blk_settings;
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+46
-13
@@ -17,6 +17,7 @@
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#include <linux/fault-inject.h>
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#include <linux/mmc/core.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/pm.h>
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struct mmc_ios {
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@@ -58,13 +59,9 @@ struct mmc_ios {
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#define MMC_TIMING_UHS_SDR50 5
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#define MMC_TIMING_UHS_SDR104 6
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#define MMC_TIMING_UHS_DDR50 7
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#define MMC_TIMING_MMC_HS200 8
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#define MMC_SDR_MODE 0
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#define MMC_1_2V_DDR_MODE 1
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#define MMC_1_8V_DDR_MODE 2
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#define MMC_1_2V_SDR_MODE 3
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#define MMC_1_8V_SDR_MODE 4
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#define MMC_TIMING_MMC_DDR52 8
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#define MMC_TIMING_MMC_HS200 9
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#define MMC_TIMING_MMC_HS400 10
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unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
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@@ -136,6 +133,9 @@ struct mmc_host_ops {
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/* The tuning command opcode value is different for SD and eMMC cards */
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int (*execute_tuning)(struct mmc_host *host, u32 opcode);
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/* Prepare HS400 target operating frequency depending host driver */
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int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
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int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
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void (*hw_reset)(struct mmc_host *host);
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void (*card_event)(struct mmc_host *host);
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@@ -278,6 +278,11 @@ struct mmc_host {
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#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
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MMC_CAP2_PACKED_WR)
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#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
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#define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
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#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
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#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
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MMC_CAP2_HS400_1_2V)
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#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
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mmc_pm_flag_t pm_caps; /* supported pm features */
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@@ -318,6 +323,8 @@ struct mmc_host {
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int rescan_disable; /* disable card detection */
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int rescan_entered; /* used with nonremovable devices */
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bool trigger_card_event; /* card_event necessary */
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struct mmc_card *card; /* device attached to this host */
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wait_queue_head_t wq;
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@@ -391,12 +398,13 @@ static inline void mmc_signal_sdio_irq(struct mmc_host *host)
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wake_up_process(host->sdio_irq_thread);
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}
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void sdio_run_irqs(struct mmc_host *host);
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#ifdef CONFIG_REGULATOR
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int mmc_regulator_get_ocrmask(struct regulator *supply);
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int mmc_regulator_set_ocr(struct mmc_host *mmc,
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struct regulator *supply,
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unsigned short vdd_bit);
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int mmc_regulator_get_supply(struct mmc_host *mmc);
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#else
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static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
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{
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@@ -409,13 +417,10 @@ static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
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{
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return 0;
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}
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static inline int mmc_regulator_get_supply(struct mmc_host *mmc)
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{
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return 0;
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}
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#endif
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int mmc_regulator_get_supply(struct mmc_host *mmc);
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int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
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static inline int mmc_card_is_removable(struct mmc_host *host)
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@@ -475,4 +480,32 @@ static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
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return host->ios.clock;
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}
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#endif
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static inline int mmc_card_hs(struct mmc_card *card)
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{
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return card->host->ios.timing == MMC_TIMING_SD_HS ||
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card->host->ios.timing == MMC_TIMING_MMC_HS;
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}
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static inline int mmc_card_uhs(struct mmc_card *card)
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{
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return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
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card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
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}
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static inline bool mmc_card_hs200(struct mmc_card *card)
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{
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return card->host->ios.timing == MMC_TIMING_MMC_HS200;
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}
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static inline bool mmc_card_ddr52(struct mmc_card *card)
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{
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return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
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}
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static inline bool mmc_card_hs400(struct mmc_card *card)
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{
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return card->host->ios.timing == MMC_TIMING_MMC_HS400;
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}
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#endif /* LINUX_MMC_HOST_H */
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+18
-5
@@ -325,6 +325,7 @@ struct _mmc_csd {
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#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */
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#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */
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#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */
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#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */
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#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */
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#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */
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#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */
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@@ -354,18 +355,25 @@ struct _mmc_csd {
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#define EXT_CSD_CMD_SET_SECURE (1<<1)
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#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
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#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
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#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
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#define EXT_CSD_CARD_TYPE_MASK 0x3F /* Mask out reserved bits */
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#define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */
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#define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */
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#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \
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EXT_CSD_CARD_TYPE_HS_52)
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#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */
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/* DDR mode @1.8V or 3V I/O */
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#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */
|
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/* DDR mode @1.2V I/O */
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#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
|
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| EXT_CSD_CARD_TYPE_DDR_1_2V)
|
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#define EXT_CSD_CARD_TYPE_SDR_1_8V (1<<4) /* Card can run at 200MHz */
|
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#define EXT_CSD_CARD_TYPE_SDR_1_2V (1<<5) /* Card can run at 200MHz */
|
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#define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */
|
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#define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */
|
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/* SDR mode @1.2V I/O */
|
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#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \
|
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EXT_CSD_CARD_TYPE_HS200_1_2V)
|
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#define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */
|
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#define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */
|
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#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \
|
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EXT_CSD_CARD_TYPE_HS400_1_2V)
|
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|
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
|
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
|
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@@ -373,6 +381,11 @@ struct _mmc_csd {
|
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#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
|
||||
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
|
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|
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#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */
|
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#define EXT_CSD_TIMING_HS 1 /* High speed */
|
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#define EXT_CSD_TIMING_HS200 2 /* HS200 */
|
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#define EXT_CSD_TIMING_HS400 3 /* HS400 */
|
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|
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#define EXT_CSD_SEC_ER_EN BIT(0)
|
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#define EXT_CSD_SEC_BD_BLK_EN BIT(2)
|
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#define EXT_CSD_SEC_GB_CL_EN BIT(4)
|
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|
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@@ -57,12 +57,8 @@ struct sdhci_host {
|
||||
#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15)
|
||||
/* Controller reports inverted write-protect state */
|
||||
#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16)
|
||||
/* Controller has nonstandard clock management */
|
||||
#define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17)
|
||||
/* Controller does not like fast PIO transfers */
|
||||
#define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18)
|
||||
/* Controller losing signal/interrupt enable states after reset */
|
||||
#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19)
|
||||
/* Controller has to be forced to use block size of 2048 bytes */
|
||||
#define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20)
|
||||
/* Controller cannot do multi-block transfers */
|
||||
@@ -147,6 +143,7 @@ struct sdhci_host {
|
||||
|
||||
bool runtime_suspended; /* Host is runtime suspended */
|
||||
bool bus_on; /* Bus power prevents runtime suspend */
|
||||
bool preset_enabled; /* Preset is enabled */
|
||||
|
||||
struct mmc_request *mrq; /* Current request */
|
||||
struct mmc_command *cmd; /* Current command */
|
||||
@@ -164,8 +161,7 @@ struct sdhci_host {
|
||||
dma_addr_t adma_addr; /* Mapped ADMA descr. table */
|
||||
dma_addr_t align_addr; /* Mapped bounce buffer */
|
||||
|
||||
struct tasklet_struct card_tasklet; /* Tasklet structures */
|
||||
struct tasklet_struct finish_tasklet;
|
||||
struct tasklet_struct finish_tasklet; /* Tasklet structures */
|
||||
|
||||
struct timer_list timer; /* Timer for timeouts */
|
||||
|
||||
@@ -177,6 +173,13 @@ struct sdhci_host {
|
||||
unsigned int ocr_avail_mmc;
|
||||
u32 ocr_mask; /* available voltages */
|
||||
|
||||
unsigned timing; /* Current timing */
|
||||
|
||||
u32 thread_isr;
|
||||
|
||||
/* cached registers */
|
||||
u32 ier;
|
||||
|
||||
wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
|
||||
unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
|
||||
|
||||
|
||||
@@ -1,23 +1,6 @@
|
||||
/*
|
||||
* OMAP DMA Engine support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __LINUX_OMAP_DMA_H
|
||||
#define __LINUX_OMAP_DMA_H
|
||||
|
||||
struct dma_chan;
|
||||
|
||||
#if defined(CONFIG_DMA_OMAP) || (defined(CONFIG_DMA_OMAP_MODULE) && defined(MODULE))
|
||||
bool omap_dma_filter_fn(struct dma_chan *, void *);
|
||||
#else
|
||||
static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
#include <linux/omap-dmaengine.h>
|
||||
|
||||
/*
|
||||
* Legacy OMAP DMA handling defines and functions
|
||||
|
||||
@@ -0,0 +1,21 @@
|
||||
/*
|
||||
* OMAP DMA Engine support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __LINUX_OMAP_DMAENGINE_H
|
||||
#define __LINUX_OMAP_DMAENGINE_H
|
||||
|
||||
struct dma_chan;
|
||||
|
||||
#if defined(CONFIG_DMA_OMAP) || (defined(CONFIG_DMA_OMAP_MODULE) && defined(MODULE))
|
||||
bool omap_dma_filter_fn(struct dma_chan *, void *);
|
||||
#else
|
||||
static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
#endif /* __LINUX_OMAP_DMAENGINE_H */
|
||||
Reference in New Issue
Block a user