ecf5e527ca
Add the driver for PowerVR Rogue graphics hardware. Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
524 lines
15 KiB
C
524 lines
15 KiB
C
/*************************************************************************/ /*!
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@File dma_support.c
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@Title System DMA support
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description Provides a contiguous memory allocator (i.e. DMA allocator);
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APIs are used for allocation/ioremapping (DMA/PA <-> CPU/VA)
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#include <linux/mm.h>
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#include <asm/page.h>
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#include <linux/device.h>
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#include <linux/highmem.h>
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#include <linux/vmalloc.h>
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#include <linux/dma-mapping.h>
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#include <asm-generic/getorder.h>
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#include "allocmem.h"
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#include "dma_support.h"
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#include "pvr_vmap.h"
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#include "kernel_compatibility.h"
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#define DMA_MAX_IOREMAP_ENTRIES 2
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static IMG_BOOL gbEnableDmaIoRemapping = IMG_FALSE;
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static DMA_ALLOC gsDmaIoRemapArray[DMA_MAX_IOREMAP_ENTRIES] = {{0}};
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static void*
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SysDmaAcquireKernelAddress(struct page *psPage, IMG_UINT64 ui64Size, DMA_ALLOC *psDmaAlloc)
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{
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IMG_BOOL bPageByPage = IMG_TRUE;
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IMG_UINT32 uiIdx;
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void *pvVirtAddr = NULL;
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IMG_UINT32 ui32PgCount = (IMG_UINT32)(ui64Size >> OSGetPageShift());
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PVRSRV_DEVICE_NODE *psDevNode = OSAllocZMemNoStats(sizeof(*psDevNode));
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PVRSRV_DEVICE_CONFIG *psDevConfig = OSAllocZMemNoStats(sizeof(*psDevConfig));
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struct page **pagearray = OSAllocZMemNoStats(ui32PgCount * sizeof(struct page *));
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void *pvOSDevice = psDmaAlloc->pvOSDevice;
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#if defined(CONFIG_ARM64)
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pgprot_t prot = pgprot_writecombine(PAGE_KERNEL);
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#else
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pgprot_t prot = pgprot_noncached(PAGE_KERNEL);
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#endif
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/* Validate all required dynamic tmp buffer allocations */
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if (psDevNode == NULL || psDevConfig == NULL || pagearray == NULL)
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{
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if (psDevNode)
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{
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OSFreeMem(psDevNode);
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}
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if (psDevConfig)
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{
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OSFreeMem(psDevConfig);
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}
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if (pagearray)
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{
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OSFreeMem(pagearray);
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}
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goto e0;
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}
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/* Fake psDevNode->psDevConfig->pvOSDevice */
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psDevConfig->pvOSDevice = pvOSDevice;
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psDevNode->psDevConfig = psDevConfig;
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/* Evict any page data contents from d-cache */
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for (uiIdx = 0; uiIdx < ui32PgCount; uiIdx++)
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{
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void *pvVirtStart, *pvVirtEnd;
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IMG_CPU_PHYADDR sCPUPhysStart, sCPUPhysEnd;
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/* Prepare array required for vmap */
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pagearray[uiIdx] = &psPage[uiIdx];
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if (bPageByPage)
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{
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#if defined(CONFIG_64BIT)
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bPageByPage = IMG_FALSE;
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pvVirtStart = kmap(&psPage[uiIdx]);
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pvVirtEnd = pvVirtStart + ui64Size;
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sCPUPhysStart.uiAddr = page_to_phys(&psPage[uiIdx]);
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sCPUPhysEnd.uiAddr = sCPUPhysStart.uiAddr + ui64Size;
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/* all pages have a kernel linear address, flush entire range */
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#else
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pvVirtStart = kmap(&psPage[uiIdx]);
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pvVirtEnd = pvVirtStart + PAGE_SIZE;
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sCPUPhysStart.uiAddr = page_to_phys(&psPage[uiIdx]);
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sCPUPhysEnd.uiAddr = sCPUPhysStart.uiAddr + PAGE_SIZE;
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/* pages might be from HIGHMEM, need to kmap/flush per page */
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#endif
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/* Fallback to range-based d-cache flush */
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OSCPUCacheInvalidateRangeKM(psDevNode,
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pvVirtStart, pvVirtEnd,
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sCPUPhysStart, sCPUPhysEnd);
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kunmap(&psPage[uiIdx]);
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}
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}
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/* Remap pages into VMALLOC space */
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pvVirtAddr = pvr_vmap(pagearray, ui32PgCount, VM_MAP, prot);
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psDmaAlloc->PageProps = prot;
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/* Clean-up tmp buffers */
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OSFreeMem(psDevConfig);
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OSFreeMem(psDevNode);
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OSFreeMem(pagearray);
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e0:
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return pvVirtAddr;
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}
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static void SysDmaReleaseKernelAddress(void *pvVirtAddr, IMG_UINT64 ui64Size, pgprot_t pgprot)
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{
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pvr_vunmap(pvVirtAddr, ui64Size >> OSGetPageShift(), pgprot);
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}
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/*!
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******************************************************************************
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@Function SysDmaAllocMem
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@Description Allocates physically contiguous memory
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@Return PVRSRV_ERROR PVRSRV_OK on success. Otherwise, a PVRSRV_
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error code
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******************************************************************************/
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PVRSRV_ERROR SysDmaAllocMem(DMA_ALLOC *psDmaAlloc)
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{
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PVRSRV_ERROR eError = PVRSRV_OK;
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struct device *psDev;
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struct page *psPage;
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size_t uiSize;
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if (psDmaAlloc == NULL ||
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psDmaAlloc->hHandle ||
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psDmaAlloc->pvVirtAddr ||
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psDmaAlloc->ui64Size == 0 ||
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psDmaAlloc->sBusAddr.uiAddr ||
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psDmaAlloc->pvOSDevice == NULL)
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{
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PVR_LOG_IF_FALSE((IMG_FALSE), "Invalid parameter");
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return PVRSRV_ERROR_INVALID_PARAMS;
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}
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uiSize = PVR_ALIGN(psDmaAlloc->ui64Size, PAGE_SIZE);
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psDev = (struct device *)psDmaAlloc->pvOSDevice;
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psDmaAlloc->hHandle = dma_alloc_coherent(psDev, uiSize, (dma_addr_t *)&psDmaAlloc->sBusAddr.uiAddr, GFP_KERNEL);
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if (psDmaAlloc->hHandle)
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{
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psDmaAlloc->pvVirtAddr = psDmaAlloc->hHandle;
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PVR_DPF((PVR_DBG_MESSAGE,
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"Allocated DMA buffer V:0x%p P:0x%llx S:0x"IMG_SIZE_FMTSPECX,
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psDmaAlloc->pvVirtAddr,
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psDmaAlloc->sBusAddr.uiAddr,
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uiSize));
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}
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else if ((psPage = alloc_pages(GFP_KERNEL, get_order(uiSize))))
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{
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psDmaAlloc->sBusAddr.uiAddr = dma_map_page(psDev, psPage, 0, uiSize, DMA_BIDIRECTIONAL);
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if (dma_mapping_error(psDev, psDmaAlloc->sBusAddr.uiAddr))
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{
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PVR_DPF((PVR_DBG_ERROR,
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"dma_map_page() failed, page 0x%p order %d",
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psPage,
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get_order(uiSize)));
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__free_pages(psPage, get_order(uiSize));
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goto e0;
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}
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psDmaAlloc->psPage = psPage;
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psDmaAlloc->pvVirtAddr = SysDmaAcquireKernelAddress(psPage, uiSize, psDmaAlloc);
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if (! psDmaAlloc->pvVirtAddr)
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{
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PVR_DPF((PVR_DBG_ERROR,
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"SysDmaAcquireKernelAddress() failed, page 0x%p order %d",
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psPage,
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get_order(uiSize)));
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dma_unmap_page(psDev, psDmaAlloc->sBusAddr.uiAddr, uiSize, DMA_BIDIRECTIONAL);
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__free_pages(psPage, get_order(uiSize));
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goto e0;
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}
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PVR_DPF((PVR_DBG_MESSAGE,
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"Allocated contiguous buffer V:0x%p P:0x%llx S:0x"IMG_SIZE_FMTSPECX,
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psDmaAlloc->pvVirtAddr,
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psDmaAlloc->sBusAddr.uiAddr,
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uiSize));
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}
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else
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{
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PVR_DPF((PVR_DBG_ERROR, "Unable to allocate contiguous buffer, size: 0x"IMG_SIZE_FMTSPECX, uiSize));
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eError = PVRSRV_ERROR_FAILED_TO_ALLOC_PAGES;
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}
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e0:
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PVR_LOG_RETURN_IF_FALSE((psDmaAlloc->pvVirtAddr), "DMA/CMA allocation failed", PVRSRV_ERROR_FAILED_TO_ALLOC_PAGES);
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return eError;
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}
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/*!
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******************************************************************************
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@Function SysDmaFreeMem
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@Description Free physically contiguous memory
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@Return void
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******************************************************************************/
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void SysDmaFreeMem(DMA_ALLOC *psDmaAlloc)
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{
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size_t uiSize;
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struct device *psDev;
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if (psDmaAlloc == NULL ||
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psDmaAlloc->ui64Size == 0 ||
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psDmaAlloc->pvOSDevice == NULL ||
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psDmaAlloc->pvVirtAddr == NULL ||
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psDmaAlloc->sBusAddr.uiAddr == 0)
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{
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PVR_LOG_IF_FALSE((IMG_FALSE), "Invalid parameter");
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return;
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}
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uiSize = PVR_ALIGN(psDmaAlloc->ui64Size, PAGE_SIZE);
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psDev = (struct device *)psDmaAlloc->pvOSDevice;
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if (psDmaAlloc->pvVirtAddr != psDmaAlloc->hHandle)
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{
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SysDmaReleaseKernelAddress(psDmaAlloc->pvVirtAddr, uiSize, psDmaAlloc->PageProps);
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}
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if (! psDmaAlloc->hHandle)
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{
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struct page *psPage;
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dma_unmap_page(psDev, psDmaAlloc->sBusAddr.uiAddr, uiSize, DMA_BIDIRECTIONAL);
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psPage = psDmaAlloc->psPage;
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__free_pages(psPage, get_order(uiSize));
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return;
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}
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dma_free_coherent(psDev, uiSize, psDmaAlloc->hHandle, (dma_addr_t )psDmaAlloc->sBusAddr.uiAddr);
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}
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/*!
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******************************************************************************
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@Function SysDmaRegisterForIoRemapping
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@Description Registers DMA_ALLOC for manual I/O remapping
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@Return PVRSRV_ERROR PVRSRV_OK on success. Otherwise, a PVRSRV_
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error code
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******************************************************************************/
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PVRSRV_ERROR SysDmaRegisterForIoRemapping(DMA_ALLOC *psDmaAlloc)
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{
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size_t uiSize;
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IMG_UINT32 ui32Idx;
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IMG_BOOL bTabEntryFound = IMG_TRUE;
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PVRSRV_ERROR eError = PVRSRV_ERROR_TOO_FEW_BUFFERS;
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if (psDmaAlloc == NULL ||
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psDmaAlloc->ui64Size == 0 ||
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psDmaAlloc->pvOSDevice == NULL ||
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psDmaAlloc->pvVirtAddr == NULL ||
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psDmaAlloc->sBusAddr.uiAddr == 0)
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{
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PVR_LOG_IF_FALSE((IMG_FALSE), "Invalid parameter");
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return PVRSRV_ERROR_INVALID_PARAMS;
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}
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uiSize = PVR_ALIGN(psDmaAlloc->ui64Size, PAGE_SIZE);
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for (ui32Idx = 0; ui32Idx < DMA_MAX_IOREMAP_ENTRIES; ++ui32Idx)
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{
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/* Check if an I/O remap entry exists for remapping */
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if (gsDmaIoRemapArray[ui32Idx].pvVirtAddr == NULL)
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{
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PVR_ASSERT(gsDmaIoRemapArray[ui32Idx].sBusAddr.uiAddr == 0);
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PVR_ASSERT(gsDmaIoRemapArray[ui32Idx].ui64Size == 0);
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break;
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}
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}
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if (ui32Idx >= DMA_MAX_IOREMAP_ENTRIES)
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{
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bTabEntryFound = IMG_FALSE;
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}
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if (bTabEntryFound)
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{
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IMG_BOOL bSameVAddr, bSamePAddr, bSameSize;
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bSamePAddr = gsDmaIoRemapArray[ui32Idx].sBusAddr.uiAddr == psDmaAlloc->sBusAddr.uiAddr;
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bSameVAddr = gsDmaIoRemapArray[ui32Idx].pvVirtAddr == psDmaAlloc->pvVirtAddr;
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bSameSize = gsDmaIoRemapArray[ui32Idx].ui64Size == uiSize;
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if (bSameVAddr)
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{
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if (bSamePAddr && bSameSize)
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{
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eError = PVRSRV_OK;
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}
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else
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{
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eError = PVRSRV_ERROR_ALREADY_EXISTS;
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}
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}
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else
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{
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PVR_ASSERT(bSamePAddr == IMG_FALSE);
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gsDmaIoRemapArray[ui32Idx].ui64Size = uiSize;
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gsDmaIoRemapArray[ui32Idx].sBusAddr = psDmaAlloc->sBusAddr;
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gsDmaIoRemapArray[ui32Idx].pvVirtAddr = psDmaAlloc->pvVirtAddr;
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PVR_DPF((PVR_DBG_MESSAGE,
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"DMA: register I/O remap: "
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"VA: 0x%p, PA: 0x%llx, Size: 0x"IMG_SIZE_FMTSPECX,
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psDmaAlloc->pvVirtAddr,
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psDmaAlloc->sBusAddr.uiAddr,
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uiSize));
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gbEnableDmaIoRemapping = IMG_TRUE;
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eError = PVRSRV_OK;
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}
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}
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return eError;
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}
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/*!
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******************************************************************************
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@Function SysDmaDeregisterForIoRemapping
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@Description Deregisters DMA_ALLOC from manual I/O remapping
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@Return void
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******************************************************************************/
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void SysDmaDeregisterForIoRemapping(DMA_ALLOC *psDmaAlloc)
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{
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__maybe_unused size_t uiSize;
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IMG_UINT32 ui32Idx;
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if (psDmaAlloc == NULL ||
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psDmaAlloc->ui64Size == 0 ||
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psDmaAlloc->pvOSDevice == NULL ||
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psDmaAlloc->pvVirtAddr == NULL ||
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psDmaAlloc->sBusAddr.uiAddr == 0)
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{
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PVR_LOG_IF_FALSE((IMG_FALSE), "Invalid parameter");
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return;
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}
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uiSize = PVR_ALIGN(psDmaAlloc->ui64Size, PAGE_SIZE);
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/* Remove specified entries from list of I/O remap entries */
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for (ui32Idx = 0; ui32Idx < DMA_MAX_IOREMAP_ENTRIES; ++ui32Idx)
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{
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if (gsDmaIoRemapArray[ui32Idx].pvVirtAddr == psDmaAlloc->pvVirtAddr)
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{
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gsDmaIoRemapArray[ui32Idx].sBusAddr.uiAddr = 0;
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gsDmaIoRemapArray[ui32Idx].pvVirtAddr = NULL;
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gsDmaIoRemapArray[ui32Idx].ui64Size = 0;
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PVR_DPF((PVR_DBG_MESSAGE,
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"DMA: deregister I/O remap: "
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"VA: 0x%p, PA: 0x%llx, Size: 0x"IMG_SIZE_FMTSPECX,
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psDmaAlloc->pvVirtAddr,
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psDmaAlloc->sBusAddr.uiAddr,
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uiSize));
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break;
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}
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}
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/* Check if no other I/O remap entries exists for remapping */
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for (ui32Idx = 0; ui32Idx < DMA_MAX_IOREMAP_ENTRIES; ++ui32Idx)
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{
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if (gsDmaIoRemapArray[ui32Idx].pvVirtAddr != NULL)
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{
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break;
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}
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}
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if (ui32Idx == DMA_MAX_IOREMAP_ENTRIES)
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{
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/* No entries found so disable remapping */
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gbEnableDmaIoRemapping = IMG_FALSE;
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}
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}
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/*!
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******************************************************************************
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@Function SysDmaDevPAddrToCpuVAddr
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@Description Maps a DMA_ALLOC physical address to CPU virtual address
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@Return IMG_CPU_VIRTADDR on success. Otherwise, a NULL
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******************************************************************************/
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IMG_CPU_VIRTADDR SysDmaDevPAddrToCpuVAddr(IMG_UINT64 uiAddr, IMG_UINT64 ui64Size)
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{
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IMG_CPU_VIRTADDR pvDMAVirtAddr = NULL;
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DMA_ALLOC *psHeapDmaAlloc;
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IMG_UINT32 ui32Idx;
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if (gbEnableDmaIoRemapping == IMG_FALSE)
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{
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return pvDMAVirtAddr;
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}
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for (ui32Idx = 0; ui32Idx < DMA_MAX_IOREMAP_ENTRIES; ++ui32Idx)
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{
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psHeapDmaAlloc = &gsDmaIoRemapArray[ui32Idx];
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if (psHeapDmaAlloc->sBusAddr.uiAddr && uiAddr >= psHeapDmaAlloc->sBusAddr.uiAddr)
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{
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IMG_UINT64 uiSpan = psHeapDmaAlloc->ui64Size;
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IMG_UINT64 uiOffset = uiAddr - psHeapDmaAlloc->sBusAddr.uiAddr;
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if (uiOffset < uiSpan)
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{
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PVR_ASSERT((uiOffset+ui64Size-1) < uiSpan);
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pvDMAVirtAddr = psHeapDmaAlloc->pvVirtAddr + uiOffset;
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PVR_DPF((PVR_DBG_MESSAGE,
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"DMA: remap: PA: 0x%llx => VA: 0x%p",
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uiAddr, pvDMAVirtAddr));
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break;
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}
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}
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}
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return pvDMAVirtAddr;
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}
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/*!
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******************************************************************************
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@Function SysDmaCpuVAddrToDevPAddr
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@Description Maps a DMA_ALLOC CPU virtual address to physical address
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@Return Non-zero value on success. Otherwise, a 0
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******************************************************************************/
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IMG_UINT64 SysDmaCpuVAddrToDevPAddr(IMG_CPU_VIRTADDR pvDMAVirtAddr)
|
|
{
|
|
IMG_UINT64 uiAddr = 0;
|
|
DMA_ALLOC *psHeapDmaAlloc;
|
|
IMG_UINT32 ui32Idx;
|
|
|
|
if (gbEnableDmaIoRemapping == IMG_FALSE)
|
|
{
|
|
return uiAddr;
|
|
}
|
|
|
|
for (ui32Idx = 0; ui32Idx < DMA_MAX_IOREMAP_ENTRIES; ++ui32Idx)
|
|
{
|
|
psHeapDmaAlloc = &gsDmaIoRemapArray[ui32Idx];
|
|
if (psHeapDmaAlloc->pvVirtAddr && pvDMAVirtAddr >= psHeapDmaAlloc->pvVirtAddr)
|
|
{
|
|
IMG_UINT64 uiSpan = psHeapDmaAlloc->ui64Size;
|
|
IMG_UINT64 uiOffset = pvDMAVirtAddr - psHeapDmaAlloc->pvVirtAddr;
|
|
|
|
if (uiOffset < uiSpan)
|
|
{
|
|
uiAddr = psHeapDmaAlloc->sBusAddr.uiAddr + uiOffset;
|
|
|
|
PVR_DPF((PVR_DBG_MESSAGE,
|
|
"DMA: remap: VA: 0x%p => PA: 0x%llx",
|
|
pvDMAVirtAddr, uiAddr));
|
|
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
return uiAddr;
|
|
}
|
|
|
|
/******************************************************************************
|
|
End of file (dma_support.c)
|
|
******************************************************************************/
|