845 lines
16 KiB
Plaintext
845 lines
16 KiB
Plaintext
/dts-v1/;
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#include "a210-soc-core.dtsi"
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#include "a210-soc-peri.dtsi"
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#include "a210-platform-evb.dtsi"
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#define SOUND_CARD_LINK(REG, FMT, CPU, M, CODEC, N) \
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simple-audio-card,dai-link@##REG { \
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reg = <REG>; \
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format = #FMT; \
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cpu { \
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sound-dai = <&audio_##CPU M>; \
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}; \
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codec { \
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sound-dai = <&codec_##CODEC N>; \
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}; \
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}
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/ {
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model = "A210 EVB configuration";
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aliases {
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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gpio4 = &gpio4;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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i2c7 = &i2c7;
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can0 = &can0;
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can1 = &can1;
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can2 = &can2;
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mmc0 = &emmc;
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mmc1 = &sdhci0;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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serial6 = &uart6;
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serial7 = &uart7;
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serial8 = &uart8;
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serial9 = &uart9;
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spi0 = &qspi0;
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spi1 = &qspi1;
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spi2 = &spi0;
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spi3 = &spi1;
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pcie3x4 = &dm3x4;
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pcie3x1 = &rp3x1;
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};
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/* The first 2M will be reserved in the Kernel, and the entire available range is set here */
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memory@0 {
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device_type = "memory";
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reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G - 64MB */
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numa-node-id = <0>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x00 0x4000000>;
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alloc-ranges = <0x00 0x90000000 0x00 0x4000000>;
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linux,cma-default;
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};
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memory@1c000000 {
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reg = <0x00 0x1c000000 0x00 0x2000000>;
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no-map;
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};
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framebuffer: framebuffer@10000000 {
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reg = <0x01 0x00 0x00 0x20000000>;
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no-map;
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};
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zh_videomem@100000000 {
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reg = <0x01 0x00 0x00 0x20000000>;
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no-map;
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};
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npu_mmu_memory@130000000 {
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reg = <0x01 0x30000000 0x00 0x04000000>;
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no-map;
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};
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memblock-memory@17b800000 {
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reg = <0x01 0x7b800000 0x00 0x04000000>;
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no-map;
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};
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};
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/* The bootargs in U-Boot will override the configuration set here. */
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chosen {
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stdout-path = "serial4";
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};
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};
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&peri1_padctrl {
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gmac0_pins: gmac0-0 {
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tx-pins {
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pins = "GPIO0_0", /* GMAC0_TX_CLK */
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"GPIO0_2", /* GMAC0_TXEN */
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"GPIO0_3", /* GMAC0_TXD0 */
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"GPIO0_4", /* GMAC0_TXD1 */
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"GPIO0_5", /* GMAC0_TXD2 */
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"GPIO0_6"; /* GMAC0_TXD3 */
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function = "gmac0";
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bias-disable;
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drive-strength = <25>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GPIO0_1", /* GMAC0_RX_CLK */
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"GPIO0_7", /* GMAC0_RXDV */
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"GPIO0_8", /* GMAC0_RXD0 */
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"GPIO0_9", /* GMAC0_RXD1 */
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"GPIO0_10", /* GMAC0_RXD2 */
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"GPIO0_11"; /* GMAC0_RXD3 */
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function = "gmac0";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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};
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mdio0_pins: mdio0-0 {
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mdc-pins {
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pins = "GPIO0_12"; /* GMAC0_MDC */
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function = "gmac0";
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bias-disable;
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drive-strength = <13>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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mdio-pins {
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pins = "GPIO0_13"; /* GMAC0_MDIO */
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function = "gmac0";
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bias-disable;
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drive-strength = <13>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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i2c0_pins: i2c0-1 {
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i2c-pins {
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pins = "GPIO0_24", "GPIO0_25";
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function = "i2c0";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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i2c1_pins: i2c1-1 {
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i2c-pins {
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pins = "GPIO0_26", "GPIO0_27";
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function = "i2c1";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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pcie_x1_pins: pcie_x1-1 {
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pcie_x1-pins {
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pins = "GPIO0_24", "GPIO0_25", "GPIO0_26", "GPIO0_27";
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function = "pcie_x1";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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pcie_x4_pins: pcie_x4-1 {
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pcie_x4-pins {
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pins = "GPIO0_28", "GPIO0_29", "GPIO0_30", "GPIO0_31";
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function = "pcie_x4";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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gmac1_pins: gmac1-0 {
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tx-pins {
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pins = "GPIO1_2", /* GMAC1_TX_CLK */
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"GPIO1_4", /* GMAC1_TXEN */
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"GPIO1_5", /* GMAC1_TXD0 */
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"GPIO1_6", /* GMAC1_TXD1 */
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"GPIO1_7", /* GMAC1_TXD2 */
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"GPIO1_8"; /* GMAC1_TXD3 */
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function = "gmac1";
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bias-disable;
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drive-strength = <25>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GPIO1_3", /* GMAC1_RX_CLK */
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"GPIO1_9", /* GMAC1_RXDV */
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"GPIO1_10", /* GMAC1_RXD0 */
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"GPIO1_11", /* GMAC1_RXD1 */
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"GPIO1_12", /* GMAC1_RXD2 */
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"GPIO1_13"; /* GMAC1_RXD3 */
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function = "gmac1";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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};
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mdio1_pins: mdio1-0 {
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mdc-pins {
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pins = "GPIO1_14"; /* GMAC1_MDC */
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function = "gmac1";
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bias-disable;
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drive-strength = <13>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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mdio-pins {
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pins = "GPIO1_15"; /* GMAC1_MDIO */
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function = "gmac1";
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bias-disable;
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drive-strength = <13>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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};
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&peri2_padctrl {
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uart4_pins: uart4-0 {
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tx-pins {
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pins = "GPIO2_0";
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function = "uart4";
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bias-disable;
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drive-strength = <3>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GPIO2_1";
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function = "uart4";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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i2c5_pins: i2c5-0 {
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i2c-pins {
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pins = "GPIO2_2", "GPIO2_3";
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function = "i2c5";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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uart5_pins: uart5-0 {
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tx-pins {
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pins = "GPIO2_2";
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function = "uart5";
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bias-disable;
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drive-strength = <3>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GPIO2_3";
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function = "uart5";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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i2c6_pins: i2c6-0 {
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i2c-pins {
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pins = "GPIO2_4", "GPIO2_5";
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function = "i2c6";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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uart7_pins: uart7-0 {
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tx-pins {
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pins = "GPIO2_6";
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function = "uart7";
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bias-disable;
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drive-strength = <3>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GPIO2_7";
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function = "uart7";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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// i2c4_pins: i2c4-0 {
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// i2c-pins {
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// pins = "GPIO2_6", "GPIO2_7";
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// function = "i2c4";
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// bias-disable;
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// drive-strength = <7>;
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// input-enable;
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// input-schmitt-enable;
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// slew-rate = <0>;
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// };
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// };
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i2c7_pins: i2c7-0 {
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i2c-pins {
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pins = "GPIO2_10", "GPIO2_11";
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function = "i2c7";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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spi1_pins: spi1-1 {
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spi-pins {
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pins = "GPIO2_17", "GPIO2_21", "GPIO2_22";
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function = "spi1";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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i2c4_pins: i2c4-2 {
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i2c-pins {
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pins = "GPIO2_26", "GPIO2_27";
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function = "i2c4";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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hdmi_pins: hdmi-0 {
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hdmi-pins {
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pins = "GPIO2_25", "GPIO2_30", "GPIO2_31";
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function = "hdmi";
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bias-disable;
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drive-strength = <3>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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};
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sen_vclk_pins: sen_vclk-1 {
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sen_vclk-pins {
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pins = "GPIO3_0", "GPIO3_2";
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function = "sen_vclk";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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qspi1_pins: qspi1-1 {
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qspi-pins {
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pins = "GPIO3_2", "GPIO3_5", "GPIO3_6", "GPIO3_7", "GPIO3_8";
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function = "qspi1";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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qspi0_pins: qspi0-0 {
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qspi-pins {
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pins = "GPIO0_18", "GPIO0_20", "GPIO0_21", "GPIO0_22", "GPIO0_23";
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function = "qspi0";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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i2c7_smb_pins: i2c7-smb-0 {
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i2c-pins {
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pins = "GPIO3_6", "GPIO3_7", "GPIO3_8", "GPIO3_9", "GPIO3_10";
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function = "i2c7_smb";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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usb31_pins: usb31-0 {
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usb31-pins {
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pins = "GPIO3_10";
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function = "usb31";
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bias-disable;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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};
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&gmac0 {
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phy-mode = "rgmii-id";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_pins>;
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rx-clk-delay = <0x00>; /* for RGMII */
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tx-clk-delay = <0x00>; /* for RGMII */
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phy-handle = <&phy0>;
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};
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&mdio0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio0_pins>;
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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};
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&gmac1 {
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phy-mode = "rgmii-id";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1_pins>;
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rx-clk-delay = <0x00>; /* for RGMII */
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tx-clk-delay = <0x00>; /* for RGMII */
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phy-handle = <&phy1>;
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status = "okay";
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};
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&mdio1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio1_pins>;
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phy1: ethernet-phy@0 {
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reg = <0x0>;
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};
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};
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&spi1 {
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cs-gpios = <&gpio2_porta 18 0>;
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rx-sample-delay-ns = <10>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins>;
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status = "okay";
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spi_norflash@0 {
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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w25q,fast-read;
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};
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};
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&qspi0 {
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cs-gpios = <&gpio0_porta 15 0>; // QSPI0_CSN1
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// cs-gpios = <&gpio0_porta 19 0>; // QSPI0_CSN0
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rx-sample-dly = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&qspi0_pins>;
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spi_norflash@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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status = "disabled";
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};
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spi-nandflash@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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spi-max-frequency = <100000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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reg = <1>;
|
|
status = "disabled";
|
|
|
|
partition@0 {
|
|
label = "nand1";
|
|
reg = <0x00000000 0x08000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&qspi1 {
|
|
cs-gpios = <&gpio2_porta 29 0>;
|
|
rx-sample-dly = <4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&qspi1_pins>;
|
|
|
|
spi_norflash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-max-frequency = <50000000>;
|
|
reg = <0>;
|
|
status = "okay";
|
|
};
|
|
|
|
spi-nandflash@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "spi-nand";
|
|
spi-max-frequency = <100000000>;
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
reg = <1>;
|
|
status = "disabled";
|
|
|
|
partition@0 {
|
|
label = "nand1";
|
|
reg = <0x00000000 0x08000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
clock-frequency = <400000>;
|
|
|
|
eeprom@50 {
|
|
status = "okay";
|
|
compatible = "atmel,24c02";
|
|
reg = <0x50>;
|
|
pagesize = <16>;
|
|
};
|
|
|
|
codec_es8156_dac0: es8156@8 {
|
|
compatible = "everest,es8156";
|
|
reg = <0x8>;
|
|
#sound-dai-cells = <1>;
|
|
sound-name-prefix = "ES8156_DAC0";
|
|
mclk-sclk-ratio = <4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
codec_es7210_adc0: es7210@40 {
|
|
compatible = "MicArray_0";
|
|
reg = <0x40>;
|
|
#sound-dai-cells = <1>;
|
|
work-mode = "ES7210_NORMAL_I2S";
|
|
channels-max = <2>;
|
|
mclk-sclk-ratio = <4>;
|
|
sound-name-prefix = "ES7210_ADC0";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio_aw87565_pa0: audio_pa0@58 {
|
|
compatible = "awinic,aw87565_pa";
|
|
reg = <0x58>;
|
|
sound-name-prefix = "AW87565_PA0";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio_aw87565_pa1: audio_pa1@5b {
|
|
compatible = "awinic,aw87565_pa";
|
|
reg = <0x5b>;
|
|
sound-name-prefix = "AW87565_PA1";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c1_pins>;
|
|
clock-frequency = <400000>;
|
|
|
|
codec_es8156_dac1: es8156@8 {
|
|
compatible = "everest,es8156";
|
|
reg = <0x8>;
|
|
#sound-dai-cells = <1>;
|
|
sound-name-prefix = "ES8156_DAC1";
|
|
mclk-sclk-ratio = <4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
codec_es7210_adc1: es7210@40 {
|
|
compatible = "MicArray_1";
|
|
reg = <0x40>;
|
|
#sound-dai-cells = <1>;
|
|
work-mode = "ES7210_NORMAL_I2S";
|
|
channels-max = <2>;
|
|
mclk-sclk-ratio = <4>;
|
|
sound-name-prefix = "ES7210_ADC1";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio_aw87565_pa2: audio_pa2@58 {
|
|
compatible = "awinic,aw87565_pa";
|
|
reg = <0x58>;
|
|
sound-name-prefix = "AW87565_PA2";
|
|
status = "disabled";
|
|
};
|
|
|
|
audio_aw87565_pa3: audio_pa3@5b {
|
|
compatible = "awinic,aw87565_pa";
|
|
reg = <0x5b>;
|
|
sound-name-prefix = "AW87565_PA3";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c4_pins>;
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&i2c5 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c5_pins>;
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&i2c6 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c6_pins>;
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart4_pins>;
|
|
};
|
|
|
|
&uart7 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart7_pins>;
|
|
};
|
|
|
|
&emmc {
|
|
max-frequency = <196608000>;
|
|
non-removable;
|
|
mmc-hs200-1_8v;
|
|
io_fixed_1v8;
|
|
is_emmc;
|
|
no-sdio;
|
|
no-sd;
|
|
pull_up;
|
|
bus-width = <8>;
|
|
};
|
|
|
|
&sdhci0 {
|
|
max-frequency = <196608000>;
|
|
bus-width = <4>;
|
|
pull_up;
|
|
wprtn_ignore;
|
|
};
|
|
|
|
&vp_dfmu_iommu {
|
|
status = "disabled";
|
|
};
|
|
|
|
&vp_dfmu_mt {
|
|
status = "disabled";
|
|
};
|
|
|
|
&npu_dfmu_iommu {
|
|
status = "disabled";
|
|
};
|
|
|
|
&npu_dfmu_mt {
|
|
status = "disabled";
|
|
};
|
|
|
|
&vi_dfmu_iommu {
|
|
status = "disabled";
|
|
};
|
|
|
|
&vi_dfmu_mt {
|
|
status = "disabled";
|
|
};
|
|
|
|
&vo_dfmu_iommu {
|
|
status = "disabled";
|
|
};
|
|
|
|
&vo_dfmu_mt {
|
|
status = "disabled";
|
|
};
|
|
|
|
&peri1_dfmu_iommu {
|
|
status = "okay";
|
|
};
|
|
|
|
&peri1_dfmu_mt {
|
|
status = "disabled";
|
|
};
|
|
|
|
&pcie_dfmu_iommu {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie_dfmu_mt {
|
|
status = "disabled";
|
|
};
|
|
|
|
&usb_dfmu_iommu {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_dfmu_mt {
|
|
status = "disabled";
|
|
};
|
|
|
|
//////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
/* FIXME: clk stages overlay to be selected for real SOC. */
|
|
|
|
/* bringup stage 3: full subsys + high freq */
|
|
/* refer to maximum clk freq in p100-soc-core.dtsi */
|
|
|
|
/* bringup stage 2: full subsys + medium freq*/
|
|
&clk_peri {
|
|
peri1_spi_ssi_clk_frequency = <220000000>;
|
|
peri2_spi_ssi_clk_frequency = <220000000>;
|
|
peri1_qspi_ssi_clk_frequency = <220000000>;
|
|
peri2_qspi_ssi_clk_frequency = <220000000>;
|
|
uart_sclk_frequency = <24000000>;
|
|
emmc_ref_clk_frequency = <203076924>;
|
|
tee_clk_frequency = <200000000>;
|
|
};
|
|
|
|
&clk_pcie {
|
|
pcie_ss_axi_m_aclk_frequency = <240000000>;
|
|
};
|
|
|
|
&clk_npu {
|
|
npu_cclk_frequency = <600000000>;
|
|
npu_aclk_frequency = <600000000>;
|
|
};
|
|
|
|
&emmc {
|
|
max-frequency = <49152000>;
|
|
};
|
|
|
|
&sdhci0 {
|
|
max-frequency = <49152000>;
|
|
};
|
|
|
|
/* bringup stage 1: minisys + low freq */
|
|
&clk {
|
|
top_cfg_aclk_frequency = <165000000>;
|
|
top_pclk_frequency = <82500000>;
|
|
top_amux_clk_frequency = <240000000>;
|
|
iommu_ptw_aclk_frequency = <165000000>;
|
|
noc_cclk_frequency = <240000000>;
|
|
top_cpusys_bus_clk_frequency = <220000000>;
|
|
top_cpusys_pic_clk_frequency = <250000000>;
|
|
};
|
|
|
|
&clk_peri {
|
|
peri1_spi_ssi_clk_frequency = <220000000>;
|
|
peri2_spi_ssi_clk_frequency = <220000000>;
|
|
peri1_qspi_ssi_clk_frequency = <220000000>;
|
|
peri2_qspi_ssi_clk_frequency = <220000000>;
|
|
uart_sclk_frequency = <24000000>;
|
|
emmc_ref_clk_frequency = <203076924>;
|
|
peri1_mst_aclk_frequency = <165000000>;
|
|
peri3_mst_aclk_frequency = <220000000>;
|
|
tee_clk_frequency = <200000000>;
|
|
};
|
|
|
|
&emmc {
|
|
max-frequency = <49152000>;
|
|
};
|
|
|
|
&sdhci0 {
|
|
max-frequency = <49152000>;
|
|
};
|