Release develop 251204

.cicd/.gitlab-ci.yml

@@ -1,4 +0,0 @@
-include:
-  - project: 'linux_sdk/cicd-pipeline'
-    ref: develop
-    file: '/gitlabci/gitlab-ci.yml'

arch/riscv/boot/dts/thead/a200-evb.dts

@@ -1182,22 +1182,12 @@
 		detn-pins {
 			pins = "SDIO0_DETN";
 			function = "sdio";
-			bias-disable; /* external pull-up */
+			bias-disable;
 			drive-strength = <1>;
 			input-enable;
 			input-schmitt-enable;
 			slew-rate = <0>;
 		};
-		/* SDIO_RSTN */
-		rstn-pins {
-			pins = "GPIO0_30";
-			function = "gpio";
-			bias-disable;
-			drive-strength = <7>;
-			input-disable;
-			input-schmitt-disable;
-			slew-rate = <0>;
-		};
 	};
 
 	i2c2_pins: i2c2-0 {

arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts

@@ -1213,7 +1213,7 @@
 		broken-cd;
 		io_fixed_1v8;
 		non-removable;
-		post-power-on-delay-ms = <200>;
+		post-power-on-delay-ms = <1000>;
 		wprtn_ignore;
 		cap-sd-highspeed;
 		wakeup-source;

arch/riscv/boot/dts/zhihe/Makefile

@@ -1,3 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
 
-dtb-$(CONFIG_ARCH_ZHIHE) += a210-emu.dtb a210-emu-d2d.dtb a210-som-v1.dtb a210-evb.dtb a210-dev.dtb a210-evb-d2d.dtb a210-evb-sec.dtb a210-dev-sec.dtb
+dtb-$(CONFIG_ARCH_ZHIHE) += a210-evb.dtb a210-dev.dtb a210-evb-d2d.dtb 
+dtb-$(CONFIG_ARCH_ZHIHE) += a210-evb-sec.dtb a210-dev-sec.dtb
+dtb-$(CONFIG_ARCH_ZHIHE) += a210-som-v1.dtb a210-usb-aistick.dtb

arch/riscv/boot/dts/zhihe/a210-dev.dts

@@ -221,6 +221,22 @@
 	};
 };
 
+&ao_gpio0 {
+	pwoer-5v-en-hog {
+		gpio-hog;
+		gpios = <29 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "power_5v_en";
+	};
+
+	pwoer-3v3-en-hog {
+		gpio-hog;
+		gpios = <26 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "power_3v3_en";
+	};
+};
+
 &aon {
 	regulators {
 		compatible = "zhihe,a210-aon-regulator";

arch/riscv/boot/dts/zhihe/a210-soc-core.dtsi

@@ -20,8 +20,9 @@
 			device_type = "cpu";
 			reg = <0>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "1.9Ghz";
 			i-cache-block-size = <64>;
@@ -49,8 +50,9 @@
 			device_type = "cpu";
 			reg = <1>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "1.9Ghz";
 			i-cache-block-size = <64>;
@@ -77,8 +79,9 @@
 			device_type = "cpu";
 			reg = <2>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "1.9Ghz";
 			i-cache-block-size = <64>;
@@ -105,8 +108,9 @@
 			device_type = "cpu";
 			reg = <3>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "1.9Ghz";
 			i-cache-block-size = <64>;
@@ -134,8 +138,9 @@
 			device_type = "cpu";
 			reg = <4>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "2.3Ghz";
 			i-cache-block-size = <64>;
@@ -163,8 +168,9 @@
 			device_type = "cpu";
 			reg = <5>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "2.3Ghz";
 			i-cache-block-size = <64>;
@@ -191,8 +197,9 @@
 			device_type = "cpu";
 			reg = <6>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "2.3Ghz";
 			i-cache-block-size = <64>;
@@ -219,8 +226,9 @@
 			device_type = "cpu";
 			reg = <7>;
 			compatible = "riscv";
+			riscv,isa = "rv64imac";
 			riscv,isa-base = "rv64i";
-			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "svpbmt", "sscofpmf";
+			riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicntr", "zicsr", "zifencei", "zihpm", "zba", "zbb", "zbc", "zbs", "svpbmt", "sscofpmf";
 			mmu-type = "riscv,sv39";
 			cpu-freq = "2.3Ghz";
 			i-cache-block-size = <64>;

arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi

@@ -1421,6 +1421,7 @@
 				dr_mode = "host";
 				power-domains = <&power_usb>;
 				// iommus = <&usb_dfmu_iommu DEVID_DIE0_USB2_0>;
+				snps,need-phy-for-wake;
 				status = "okay";
 			};
 
@@ -1435,6 +1436,7 @@
 				dr_mode = "host";
 				power-domains = <&power_usb>;
 				// iommus = <&usb_dfmu_iommu DEVID_DIE0_USB2_1>;
+				snps,need-phy-for-wake;
 				status = "okay";
 			};
 		};

arch/riscv/boot/dts/zhihe/a210-usb-aistick.dts

@@ -0,0 +1,636 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "a210-soc-core.dtsi"
+#include "a210-soc-peri.dtsi"
+#include "a210-platform-dev.dtsi"
+
+#define SOUND_CARD_LINK(REG, FMT, CPU, M, CODEC, N) \
+	simple-audio-card,dai-link@##REG { \
+		reg = <REG>; \
+		format = #FMT; \
+		cpu { \
+			sound-dai = <&audio_##CPU M>; \
+		}; \
+		codec { \
+			sound-dai = <&codec_##CODEC N>; \
+		}; \
+	}
+
+/ {
+	model = "A210 DEV configuration";
+
+	aliases {
+		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
+
+		gpio0 = &ao_gpio0;
+		gpio1 = &ao_gpio1;
+		gpio2 = &gpio0;
+		gpio3 = &gpio1;
+		gpio4 = &gpio2;
+		gpio5 = &gpio3;
+		gpio6 = &gpio4;
+
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		i2c7 = &i2c7;
+		i2c8 = &aoi2c1;
+
+		can0 = &can0;
+		can1 = &can1;
+		can2 = &can2;
+
+		mmc0 = &emmc;
+		mmc1 = &sdhci0;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+		serial4 = &uart4;
+		serial5 = &uart5;
+		serial6 = &uart6;
+		serial7 = &uart7;
+		serial8 = &uart8;
+		serial9 = &uart9;
+		spi0 = &qspi0;
+		spi1 = &qspi1;
+		spi2 = &spi0;
+		spi3 = &spi1;
+		pcie3x4 = &dm3x4;
+		pcie3x1 = &rp3x1;
+	};
+
+	/* The actual capacity will be adjusted through SPL */
+	memory@0 {
+		device_type = "memory";
+		reg = <0x00 0x80000000  0x01 0x00000000>; /* 4G */
+		numa-node-id = <0>;
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		linux,cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x00 0x40000000>;
+			alloc-ranges = <0x00 0x90000000 0x00 0x40000000>;
+			linux,cma-default;
+		};
+
+		memory@1c000000 {
+			reg = <0x00 0x1c000000 0x00 0x2000000>;
+			no-map;
+		};
+
+		framebuffer: framebuffer@10000000 {
+			reg = <0x01 0x00 0x00 0x5000000>;
+			no-map;
+		};
+
+		npu_mmu_memory@130000000 {
+			reg = <0x01 0x30000000 0x00 0x04000000>;
+			no-map;
+		};
+
+		memblock-memory@17b800000 {
+			reg = <0x01 0x7b800000 0x00 0x04000000>;
+			no-map;
+		};
+	};
+
+	/* The bootargs in U-Boot will override the configuration set here. */
+	chosen {
+		stdout-path = "serial4";
+	};
+};
+
+&aon {
+	regulators {
+		compatible = "zhihe,a210-aon-regulator";
+
+		avdd33_emmc_reg: avdd33_emmc {
+			regulator-name = "avdd33_emmc";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		avdd33_usb2_reg: avdd33_usb2 {
+			regulator-name = "avdd33_usb2";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		dvdd08_aon_reg: dvdd08_aon {
+			regulator-name = "dvdd08_aon";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		avdd18_aon_reg: avdd18_aon {
+			regulator-name = "avdd18_aon";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		avdd18_emmc_usb2_reg: avdd18_emmc_usb2 {
+			regulator-name = "avdd18_emmc_usb2";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		avdd18_emmc_peri_reg: avdd18_emmc_peri {
+			regulator-name = "avdd18_emmc_peri";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		avdd18_top_reg: avdd18_top {
+			regulator-name = "avdd18_top";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		avdd18_pll_reg: avdd18_pll {
+			regulator-name = "avdd18_pll";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		avdd18_reg: avdd18 {
+			regulator-name = "avdd18";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		dvdd18_ddr_vaa_reg: dvdd18_ddr_vaa {
+			regulator-name = "dvdd18_ddr_vaa";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		p3v3_reg: p3v3 {
+			regulator-name = "p3v3";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		dvdd08_top_reg: dvdd08_top {
+			regulator-name = "dvdd08_top";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		dvdd06_ddr_vddqlp_reg: dvdd06_ddr_vddqlp {
+			regulator-name = "dvdd06_ddr_vddqlp";
+			regulator-type = "voltage";
+			regulator-always-on;
+		};
+
+		dvdd08_ddr_reg: dvdd08_ddr {
+			regulator-name = "dvdd08_ddr";
+			regulator-type = "voltage";
+			regulator-ramp-delay = <100>;
+			regulator-min-microvolt = <750000>;
+			regulator-max-microvolt = <800000>;
+			regulator-always-on;
+		};
+
+		dvdd_cpu_reg: dvdd_cpu {
+			regulator-name = "dvdd_cpu";
+			regulator-type = "voltage";
+			regulator-ramp-delay = <100>;
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-always-on;
+		};
+
+		dvddm_cpu_reg: dvddm_cpu {
+			regulator-name = "dvddm_cpu";
+			regulator-type = "voltage";
+			regulator-ramp-delay = <100>;
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-always-on;
+		};
+
+		dvdd_vp_reg: dvdd_vp {
+			regulator-name = "dvdd_vp";
+			regulator-type = "voltage";
+			regulator-ramp-delay = <100>;
+			regulator-min-microvolt = <750000>;
+			regulator-max-microvolt = <800000>;
+			regulator-always-on;
+		};
+
+		dvdd_npu_vip_reg: dvdd_npu_vip {
+			regulator-name = "dvdd_npu_vip";
+			regulator-type = "voltage";
+			regulator-ramp-delay = <100>;
+			regulator-min-microvolt = <750000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-always-on;
+		};
+
+		dvdd_cpu_p_reg: dvdd_cpu_p {
+			regulator-name = "dvdd_cpu_p";
+			regulator-type = "voltage";
+			regulator-ramp-delay = <100>;
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-always-on;
+		};
+
+		dvdd_gpu_reg: dvdd_gpu {
+			regulator-name = "dvdd_gpu";
+			regulator-type = "voltage";
+			regulator-ramp-delay = <100>;
+			regulator-min-microvolt = <750000>;
+			regulator-max-microvolt = <800000>;
+			regulator-always-on;
+		};
+
+	};
+
+	cpufreq: a210_cpufreq {
+		compatible = "zhihe,a210-cpufreq";
+		clocks = <&clk TOP_CPUSYS_BUS_CLK_DIV>,
+			 <&clk TOP_CPUSYS_PIC_CLK_DIV>,
+			 <&clk TOP_CPUSYS_CFG_ACLK_DIV>,
+			 <&clk TOP_CPUSYS_COM_APB_CLK_DIV>,
+			 <&clk TOP_CPUSYS_APB_CLK_DIV>;
+		clock-names = "bus_clk", "pic_clk", "cfg_clk", "com_clk", "apb_clk";
+		status = "okay";
+	};
+};
+
+&aon_padctrl {
+	rtc_pins: rtc {
+		rtc-pins {
+			pins = "AOGPIO0_27";
+			function = "aogpio0";
+			bias-disable;
+			drive-strength = <13>;
+			input-enable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+	};
+    aoi2c1_pins: aoi2c1-0 {
+		i2c-pins {
+			pins = "AOI2C1_SCL", "AOI2C1_SDA";
+			function = "aoi2c1";
+			bias-disable;
+			drive-strength = <7>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+};
+
+&peri1_padctrl {
+	sdhci_pins: sdhci0-1 {
+		sd-pins {
+			pins = "GPIO1_1";
+			function = "sdio";
+			bias-disable;
+			drive-strength = <13>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	usb3_pins: usb3-1 {
+		usb3-pins {
+			pins = "GPIO0_27";
+			function = "gpio0";
+			bias-disable;
+			drive-strength = <13>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+	};
+};
+
+&peri2_padctrl {
+	uart4_pins: uart4-0 {
+		tx-pins {
+			pins = "GPIO2_0";
+			function = "uart4";
+			bias-disable;
+			drive-strength = <3>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+
+		rx-pins {
+			pins = "GPIO2_1";
+			function = "uart4";
+			bias-disable;
+			drive-strength = <1>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	i2c5_pins: i2c5-1 {
+		i2c-pins {
+			pins = "GPIO2_28", "GPIO2_29";
+			function = "i2c5";
+			bias-disable;
+			drive-strength = <7>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	uart5_pins: uart5-1 {
+		tx-pins {
+			pins = "GPIO2_18", "GPIO3_10";	// TXD, RTSN
+			function = "uart5";
+			bias-disable;
+			drive-strength = <3>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+
+		rx-pins {
+			pins = "GPIO2_19", "GPIO3_9";	// RXD, CTSN
+			function = "uart5";
+			bias-disable;
+			drive-strength = <1>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	i2c6_pins: i2c6-1 {
+		i2c-pins {
+			pins = "GPIO2_8", "GPIO2_9";
+			function = "i2c6";
+			bias-disable;
+			drive-strength = <7>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	i2s1_pins: i2s1-0 {
+		i2s-pins {
+			pins = "GPIO2_2", "GPIO2_3", "GPIO2_4", "GPIO2_5", "GPIO2_6";
+			function = "i2s1";
+			bias-disable;
+			drive-strength = <13>;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+	};
+	i2c7_pins: i2c7-0 {
+		i2c-pins {
+			pins = "GPIO2_10", "GPIO2_11";
+			function = "i2c7";
+			bias-disable;
+			drive-strength = <7>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	i2c4_pins: i2c4-2 {
+		i2c-pins {
+			pins = "GPIO2_26", "GPIO2_27";
+			function = "i2c4";
+			bias-disable;
+			drive-strength = <7>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	sen_vclk_pin0: sen_vclk0 {
+		sen_vclk0-pins {
+			pins = "GPIO3_0";
+			function = "sen_vclk";
+			bias-disable;
+			drive-strength = <7>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	sen_vclk_pin1: sen_vclk1 {
+		sen_vclk1-pins {
+			pins = "GPIO3_1";
+			function = "sen_vclk";
+			bias-disable;
+			drive-strength = <7>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+	uart8_pins: uart8-1 {
+		tx-pins {
+			pins = "GPIO3_2";	// TXD
+			function = "uart8";
+			bias-disable;
+			drive-strength = <3>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+
+		rx-pins {
+			pins = "GPIO3_3";	// RXD
+			function = "uart8";
+			bias-disable;
+			drive-strength = <1>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+};
+
+&gmac0 {
+	status = "disabled";
+};
+
+&mdio0 {
+	status = "disabled";
+};
+
+&gmac1 {
+	status = "disabled";
+};
+
+&mdio1 {
+	status = "disabled";
+};
+
+&qspi0 {
+	status = "disabled";
+};
+
+&i2c4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c4_pins>;
+	clock-frequency = <400000>;
+};
+
+&i2c5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c5_pins>;
+	clock-frequency = <400000>;
+};
+
+&i2c6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c6_pins>;
+	clock-frequency = <400000>;
+};
+
+&i2c7 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c7_pins>;
+	clock-frequency = <400000>;
+};
+
+&aoi2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&aoi2c1_pins>;
+	clock-frequency = <400000>;
+	status = "okay";
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart4_pins>;
+};
+
+&uart5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart5_pins>;
+};
+
+&uart8 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart8_pins>;
+};
+
+&rp3x1 {
+	status = "disabled";
+};
+
+&dm3x4 {
+	status = "disabled";
+};
+
+&audio_i2s1 {
+	status = "disabled";
+};
+
+&adc {
+	status = "disabled";
+};
+
+&pwm0 {
+	status = "disabled";
+};
+
+&pwm1 {
+	status = "disabled";
+};
+
+&can0 {
+	status = "disabled";
+};
+
+&hdmi_tx {
+	status = "disabled";
+};
+
+&vidmem {
+  memory-region = <&framebuffer>;
+};
+
+&emmc {
+	max-frequency = <196608000>;
+	non-removable;
+	mmc-hs400-1_8v;
+	mmc-hs200-1_8v;
+	io_fixed_1v8;
+	is_emmc;
+	no-sdio;
+	no-sd;
+	pull_up;
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	clk-delay-mmc-hs200 = <60>;
+};
+
+&sdhci0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdhci_pins>;
+	max-frequency = <196608000>;
+	cap-sd-highspeed;
+	bus-width = <4>;
+	sd-uhs-sdr104;
+	pull_up;
+	no-sd;
+	no-mmc;
+	non-removable;
+	io_fixed_1v8;
+	post-power-on-delay-ms = <200>;
+	wprtn_ignore;
+	wakeup-source;
+};
+
+&usb3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usb3_pins>;
+	typec-pwren-gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+};
+
+&sata {
+	status = "disabled";
+};
+
+&mipi0_csi0 {
+	status = "disabled";
+};
+
+&mipi0_csi1 {
+	status = "disabled";
+};
+
+//config dsi display: dpu_disp0->dup_enc0->dsi0->lcd_plane
+
+&dpu_enc0 {
+    status = "disabled";
+};
+
+&dhost_0 {
+	status = "disabled";
+};
+
+&c920_4 {
+	dvdd-cpu-p-supply = <&dvdd_cpu_p_reg>;
+};
+
+&c908_0 {
+	dvdd-cpu-supply = <&dvdd_cpu_reg>;
+	dvddm-cpu-supply = <&dvddm_cpu_reg>;
+};

arch/riscv/configs/a210_evb_defconfig

@@ -1,7 +1,6 @@
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
-CONFIG_AUDIT=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BPF_SYSCALL=y
@@ -39,13 +38,15 @@ CONFIG_PERF_EVENTS=y
 CONFIG_CRASH_DUMP=y
 CONFIG_ARCH_ZHIHE=y
 CONFIG_XUANTIE_SSTC=y
-CONFIG_ERRATA_THEAD=y
+CONFIG_ARCH_THEAD=y
-# CONFIG_ERRATA_THEAD_PBMT is not set
+CONFIG_ARCH_XUANTIE=y
+CONFIG_SOC_VIRT=y
 CONFIG_NONPORTABLE=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=16
 CONFIG_NUMA=y
 CONFIG_XUANTIE_ISA=y
+CONFIG_RISCV_SBI_V01=y
 # CONFIG_SUSPEND is not set
 CONFIG_PM=y
 CONFIG_PM_DEBUG=y
@@ -56,7 +57,10 @@ CONFIG_CPU_FREQ_STAT=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_RISCV_XUANTIE_TH1520_CPUFREQ=y
 CONFIG_RISCV_ZHIHE_CPUFREQ=y
 CONFIG_KPROBES=y
 CONFIG_MODULES=y
@@ -69,8 +73,6 @@ CONFIG_CMA_SYSFS=y
 CONFIG_CMA_AREAS=16
 CONFIG_NET=y
 CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_ADVANCED_ROUTER=y
 CONFIG_IP_PNP=y
@@ -84,45 +86,66 @@ CONFIG_NF_TABLES_INET=y
 CONFIG_BPFILTER=y
 CONFIG_BRIDGE=y
 CONFIG_DNS_RESOLVER=y
+CONFIG_NETLINK_DIAG=y
 CONFIG_CAN=m
 CONFIG_CAN_J1939=m
 CONFIG_CAN_ISOTP=m
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_RTL3WIRE=y
 CONFIG_CFG80211=m
 CONFIG_CFG80211_WEXT=y
 CONFIG_MAC80211=m
-CONFIG_RFKILL=m
+CONFIG_RFKILL=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
 # CONFIG_ETHTOOL_NETLINK is not set
 CONFIG_PCI=y
 CONFIG_PCIE_ZH=m
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_TH1520_AON_PD=y
+CONFIG_TH1520_PROC_DEBUG=y
 CONFIG_ZHIHE_PROC_DEBUG=y
 CONFIG_MTD=y
+CONFIG_MTD_TESTS=m
 CONFIG_MTD_OF_PARTS=m
 CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SLRAM=m
+CONFIG_MTD_PHRAM=m
 CONFIG_MTD_SPI_NAND=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_UBI=y
 CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=1
+CONFIG_VIRTIO_BLK=y
 CONFIG_PA_BLK_DEV=y
 CONFIG_BLK_DEV_NVME=m
+CONFIG_TH1520_DSMART_CARD=y
 CONFIG_IO_EVENT_WRAPER=y
-CONFIG_EEPROM_AT24=m
+CONFIG_EEPROM_AT24=y
 CONFIG_BLK_DEV_SD=m
 CONFIG_ATA=m
 CONFIG_AHCI_DWC=m
 CONFIG_MD=y
-CONFIG_BLK_DEV_MD=m
+CONFIG_BLK_DEV_MD=y
 CONFIG_MD_RAID0=m
 CONFIG_MD_RAID1=m
 CONFIG_MD_RAID456=m
 CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
 CONFIG_NETDEVICES=y
 CONFIG_MACVLAN=y
 CONFIG_IPVLAN=y
 CONFIG_VETH=y
+CONFIG_VIRTIO_NET=y
 CONFIG_NLMON=y
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_NET_VENDOR_ADAPTEC is not set
@@ -184,6 +207,7 @@ CONFIG_NLMON=y
 # CONFIG_NET_VENDOR_SOCIONEXT is not set
 CONFIG_STMMAC_ETH=y
 # CONFIG_DWMAC_GENERIC is not set
+CONFIG_DWMAC_THEAD=y
 CONFIG_DWMAC_ZHIHE=y
 # CONFIG_NET_VENDOR_SUN is not set
 # CONFIG_NET_VENDOR_SYNOPSYS is not set
@@ -194,18 +218,29 @@ CONFIG_DWMAC_ZHIHE=y
 # CONFIG_NET_VENDOR_WANGXUN is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_NET_VENDOR_XILINX is not set
+CONFIG_MICROSEMI_PHY=y
 CONFIG_MOTORCOMM_PHY=y
 CONFIG_REALTEK_PHY=y
 CONFIG_CAN_FLEXCAN=m
+CONFIG_USB_USBNET=m
+# CONFIG_USB_NET_AX8817X is not set
+# CONFIG_USB_NET_AX88179_178A is not set
+# CONFIG_USB_NET_NET1080 is not set
 CONFIG_IWLWIFI=m
 CONFIG_IWLMVM=m
+CONFIG_HOSTAP=y
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
 # CONFIG_RTL_CARDS is not set
 CONFIG_RTW88=m
 CONFIG_RTW88_8822CS=m
-CONFIG_INPUT_EVDEV=m
+CONFIG_RTW88_8723DS=m
-# CONFIG_INPUT_KEYBOARD is not set
+CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_EVDEV=y
-# CONFIG_SERIO is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
 CONFIG_SERIAL_8250=y
 # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
 CONFIG_SERIAL_8250_CONSOLE=y
@@ -213,7 +248,12 @@ CONFIG_SERIAL_8250_NR_UARTS=10
 CONFIG_SERIAL_8250_RUNTIME_UARTS=10
 CONFIG_SERIAL_8250_DW=y
 CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
 CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_TCG_TPM=y
+CONFIG_TCG_TIS_SPI=y
 CONFIG_I2C_CHARDEV=y
 # CONFIG_I2C_HELPER_AUTO is not set
 CONFIG_I2C_SMBUS=m
@@ -225,13 +265,20 @@ CONFIG_SPI_DW_MMIO=y
 CONFIG_SPI_SPIDEV=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_PINCTRL=y
+CONFIG_PINCTRL_TH1520=y
 CONFIG_PINCTRL_A210=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_DWAPB=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
-CONFIG_SENSORS_MR75203=y
+CONFIG_BATTERY_CW2015=m
+CONFIG_SENSORS_MR75203=m
+CONFIG_SENSORS_PWM_FAN=m
 CONFIG_SENSORS_TMP102=m
+CONFIG_THERMAL=y
+CONFIG_THERMAL_STATISTICS=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_WATCHDOG_OPEN_TIMEOUT=32
@@ -241,18 +288,61 @@ CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP=m
 CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=m
 CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y
 CONFIG_DW_WATCHDOG=y
+CONFIG_TH1520_PMIC_WATCHDOG=y
 CONFIG_ZHIHE_WATCHDOG=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_WL2866D=y
 # CONFIG_MEDIA_CEC_SUPPORT is not set
 CONFIG_MEDIA_SUPPORT=y
+# CONFIG_DVB_CORE is not set
 CONFIG_MEDIA_USB_SUPPORT=y
 CONFIG_USB_VIDEO_CLASS=m
+# CONFIG_RADIO_ADAPTERS is not set
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
 CONFIG_DRM=y
 CONFIG_DRM_LOAD_EDID_FIRMWARE=y
 CONFIG_DRM_DP_AUX_CHARDEV=y
 CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_PANEL_ILITEK_ILI9881C=m
 CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=m
 CONFIG_DRM_VERISILICON=m
 CONFIG_VERISILICON_DW_DP_P100=y
@@ -267,33 +357,51 @@ CONFIG_SND=m
 CONFIG_SND_USB_AUDIO=m
 CONFIG_SND_USB_AUDIO_MIDI_V2=y
 CONFIG_SND_SOC=m
+CONFIG_SND_SOC_XUANTIE=m
+CONFIG_SND_SOC_XUANTIE_TH1520_I2S_CH8=m
+CONFIG_SND_SOC_XUANTIE_TH1520_HDMI_PCM=m
+CONFIG_SND_SOC_XUANTIE_TH1520_TDM=m
+CONFIG_SND_SOC_XUANTIE_TH1520_SPDIF=m
 CONFIG_SND_SOC_ZHIHE_I2S=m
 CONFIG_SND_SOC_ZHIHE_TDM=m
 CONFIG_SND_SOC_ZHIHE_PDM=m
+CONFIG_SND_SOC_AW87519=m
 CONFIG_SND_SOC_AW87565=m
 CONFIG_SND_SOC_ES7210=m
 CONFIG_SND_SOC_ES8156=m
+CONFIG_SND_SOC_ES8323=m
 CONFIG_SND_SIMPLE_CARD=m
 CONFIG_USB=m
 CONFIG_USB_XHCI_HCD=m
 CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_OHCI_HCD=m
 CONFIG_USB_PRINTER=m
 CONFIG_USB_WDM=m
 CONFIG_USB_STORAGE=m
+CONFIG_USB_STORAGE_SDDR09=m
+CONFIG_USB_STORAGE_SDDR55=m
 CONFIG_USB_DWC3=m
 # CONFIG_USB_DWC3_OF_SIMPLE is not set
 CONFIG_USB_DWC2=m
+CONFIG_USB_ONBOARD_HUB=m
 CONFIG_USB_GADGET=m
 CONFIG_USB_CONFIGFS=m
 CONFIG_USB_CONFIGFS_RNDIS=y
+CONFIG_USB_CONFIGFS_F_FS=y
+CONFIG_USB_ZERO=m
 CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
 CONFIG_USB_GADGETFS=m
 CONFIG_USB_FUNCTIONFS=m
 CONFIG_USB_FUNCTIONFS_RNDIS=y
 CONFIG_USB_FUNCTIONFS_GENERIC=y
 CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_G_SERIAL=m
+CONFIG_USB_G_MULTI=m
+CONFIG_USB_G_MULTI_CDC=y
 CONFIG_TYPEC=m
 CONFIG_TYPEC_TCPM=m
+CONFIG_TYPEC_TCPCI=m
 CONFIG_TYPEC_FUSB302=m
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
@@ -301,6 +409,7 @@ CONFIG_MMC_SDHCI_PLTFM=y
 CONFIG_MMC_SDHCI_OF_DWCMSHC=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PCF8563=m
 CONFIG_RTC_DRV_XGENE=y
@@ -310,20 +419,30 @@ CONFIG_DMATEST=m
 CONFIG_SW_SYNC=y
 CONFIG_UDMABUF=y
 CONFIG_DMABUF_SELFTESTS=m
-# CONFIG_VIRTIO_MENU is not set
+CONFIG_VIRTIO_MMIO=y
 # CONFIG_VHOST_MENU is not set
+CONFIG_CLK_TH1520_FM=y
 CONFIG_CLK_A210=y
 CONFIG_HWSPINLOCK=y
+CONFIG_HWSPINLOCK_TH1520=y
 CONFIG_MAILBOX=y
 CONFIG_RISCV_IOMMU=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_CTRL=y
+CONFIG_RPMSG_TH1520=y
+CONFIG_RPMSG_VIRTIO=y
 CONFIG_A210_BMU=y
 CONFIG_EXTCON=y
 CONFIG_IIO=y
+CONFIG_IIO_SW_DEVICE=y
+CONFIG_THEAD_TH1520_ADC=m
 CONFIG_PWM=y
 CONFIG_PWM_THEAD=y
+CONFIG_PHY_DW_DPHY=y
+CONFIG_NVMEM_XUANTIE_TH1520_EFUSE=y
 CONFIG_NVMEM_ZH_EFUSE=y
-CONFIG_TEE=y
+CONFIG_TEE=m
-CONFIG_OPTEE=y
+CONFIG_OPTEE=m
 CONFIG_IOPMP=y
 CONFIG_ZH_IOPMP=y
 CONFIG_EXT4_FS=y
@@ -342,7 +461,7 @@ CONFIG_NTFS3_FS=m
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_HUGETLBFS=y
-CONFIG_CONFIGFS_FS=y
+CONFIG_JFFS2_FS=y
 CONFIG_UBIFS_FS=y
 CONFIG_EROFS_FS=y
 CONFIG_NFS_FS=y
@@ -358,7 +477,19 @@ CONFIG_NFS_USE_LEGACY_DNS=y
 CONFIG_NLS_CODEPAGE_437=m
 CONFIG_NLS_ISO8859_1=m
 CONFIG_NLS_UTF8=m
+CONFIG_CRYPTO_USER=y
 # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+CONFIG_CRYPTO_DH=y
+CONFIG_CRYPTO_CURVE25519=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_OFB=y
+CONFIG_CRYPTO_XTS=y
+CONFIG_CRYPTO_CHACHA20POLY1305=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_USER_API_RNG=y
+CONFIG_CRYPTO_USER_API_AEAD=y
 CONFIG_CRYPTO_DEV_ZHIHE=m
 CONFIG_DMA_CMA=y
 CONFIG_CMA_SIZE_MBYTES=32
@@ -368,9 +499,11 @@ CONFIG_DYNAMIC_DEBUG=y
 CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
-CONFIG_DETECT_HUNG_TASK=y
+CONFIG_SOFTLOCKUP_DETECTOR=y
 CONFIG_SCHEDSTATS=y
 CONFIG_DEBUG_ATOMIC_SLEEP=y
+CONFIG_LOCK_TORTURE_TEST=m
+CONFIG_RCU_TORTURE_TEST=m
 # CONFIG_RCU_TRACE is not set
 CONFIG_FTRACE_SYSCALLS=y
 CONFIG_BPF_KPROBE_OVERRIDE=y

arch/riscv/configs/th1520_defconfig

@@ -88,8 +88,8 @@ CONFIG_BT_HCIUART_H4=y
 CONFIG_BT_HCIUART_RTL3WIRE=y
 CONFIG_CFG80211=m
 CONFIG_CFG80211_WEXT=y
-CONFIG_MAC80211=m
+CONFIG_MAC80211=y
-CONFIG_RFKILL=m
+CONFIG_RFKILL=y
 CONFIG_NET_9P=y
 CONFIG_NET_9P_VIRTIO=y
 CONFIG_DEVTMPFS=y

drivers/misc/io_event_wraper.c

@@ -11,6 +11,7 @@
 #define DEVICE_NAME "io_event"
 #define DEFAULT_BUFFER_SIZE 4096
 #define MY_IOCTL_RESIZE _IOW('k', 1, int)
+#define MY_IOCTL_GET_COUNT _IOR('k', 2, int)
 
 MODULE_LICENSE("GPL");
 
@@ -240,6 +241,19 @@ static long io_event_ioctl(struct file *filp, unsigned int cmd,
 		mutex_unlock(&priv->lock);
 		break;
 
+	case MY_IOCTL_GET_COUNT:
+		mutex_lock(&priv->lock);
+		if (priv->is_closing) {
+			ret = -ENODEV;
+		} else {
+			unsigned int count = kfifo_len(&priv->fifo);
+			if (copy_to_user((int __user *)arg, &count, sizeof(count))) {
+				ret = -EFAULT;
+			}
+		}
+		mutex_unlock(&priv->lock);
+		break;
+
 	default:
 		return -ENOTTY;
 	}

drivers/usb/dwc2/params.c

@@ -137,6 +137,12 @@ static void dwc2_set_zhihe_params(struct dwc2_hsotg *hsotg)
 	struct dwc2_core_params *p = &hsotg->params;
 
 	p->phy_utmi_width = 8;
+	/* Use INCR4 burst length to prevent AHB ERROR during long-term USB storage operations */
+	p->ahbcfg = GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT;
+	/* Configure FIFO sizes for stable bulk transfers */
+	p->host_rx_fifo_size = 1024;
+	p->host_nperio_tx_fifo_size = 1024;
+	p->host_perio_tx_fifo_size = 1024;
 }
 
 static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)

sound/soc/zhihe/zhihe-i2s.c

@@ -23,6 +23,15 @@
 
 #define DRV_NAME "zhihe-i2s"
 
+/**
+ * buffer_size default: 23 * 1024 (bit)
+ * width min: 8 (bit)
+ * sample_rate min: 8000 (hz)
+ * time: 10 (us)
+ * max poll count = 23Kbit / (8bit * 8000hz) / 10us = 36800
+ */
+#define MAX_POLL_CNT 40000
+
 static int i2s3_probe_flag = 0;
 static void __iomem *i2s3_host_regs = NULL;
 
@@ -144,43 +153,36 @@ static int a210_i2s_set_div(struct zhihe_i2s_priv *i2s_priv, unsigned int rate,
 	return ret;
 }
 
-static bool tx_fifo_empty(void __iomem *addr)
+static bool tx_fifo_empty(void __iomem *addr, unsigned int channels)
 {
-	unsigned int status = readl(addr + I2S_SR);
+	unsigned int tx_fifo_mty_msk = 0, tx_fifo_mty = 0;
-	return ((status & SR_TFE_TX_FIFO_EMPTY_Msk) == SR_TFE_TX_FIFO_EMPTY) &&
-	       !(status & SR_TXBUSY_STATUS);
-}
-
-static bool rx_fifo_full(void __iomem *addr, unsigned int channels)
-{
-	unsigned int rx_fifo_full_msk = 0, rx_fifo_full = 0;
 	unsigned int status = readl(addr + I2S_SR);
 
 	switch (channels) {
 	case 8:
-		rx_fifo_full_msk |= SR_RFF3_Msk;
+		tx_fifo_mty_msk |= SR_TFE3_Msk;
-		rx_fifo_full |= SR_RFF3_RX_FIFO_FULL;
+		tx_fifo_mty |= SR_TFE3_TX_FIFO_EMPTY;
 		fallthrough;
 	case 6:
-		rx_fifo_full_msk |= SR_RFF2_Msk;
+		tx_fifo_mty_msk |= SR_TFE2_Msk;
-		rx_fifo_full |= SR_RFF2_RX_FIFO_FULL;
+		tx_fifo_mty |= SR_TFE2_TX_FIFO_EMPTY;
 		fallthrough;
 	case 4:
-		rx_fifo_full_msk |= SR_RFF1_Msk;
+		tx_fifo_mty_msk |= SR_TFE1_Msk;
-		rx_fifo_full |= SR_RFF1_RX_FIFO_FULL;
+		tx_fifo_mty |= SR_TFE1_TX_FIFO_EMPTY;
 		fallthrough;
 	case 2:
-		rx_fifo_full_msk |= SR_RFF0_Msk;
+		tx_fifo_mty_msk |= SR_TFE0_Msk;
-		rx_fifo_full |= SR_RFF0_RX_FIFO_FULL;
+		tx_fifo_mty |= SR_TFE0_TX_FIFO_EMPTY;
 		break;
 	default:
-		rx_fifo_full_msk |= SR_RFF0_Msk;
+		tx_fifo_mty_msk |= SR_TFE0_Msk;
-		rx_fifo_full |= SR_RFF0_RX_FIFO_FULL;
+		tx_fifo_mty |= SR_TFE0_TX_FIFO_EMPTY;
 		break;
 	}
 
-	return ((status & rx_fifo_full_msk) == rx_fifo_full) &&
+	return ((status & tx_fifo_mty_msk) == tx_fifo_mty) &&
-	       (status & SR_RXBUSY_STATUS);
+	       !(status & SR_TXBUSY_STATUS);
 }
 
 static int i2s_multi_channel_sync(void __iomem *addr, unsigned int channels,
@@ -192,19 +194,21 @@ static int i2s_multi_channel_sync(void __iomem *addr, unsigned int channels,
 	if (!addr)
 		return -EINVAL;
 	
+	int i = MAX_POLL_CNT;
+	
 	do {
-		if (tx && tx_fifo_empty(addr))
+		if (tx && tx_fifo_empty(addr, channels))
 			break;
 		else if (!tx) {
 			if (!master)
 				break;
-			else if (rx_fifo_full(addr, channels) && atomic_read(&rx_device_usage) == 0) {
+			else if (atomic_read(&rx_device_usage) == 0) {
 				udelay(100);
 				break;
 			}
 		}
 		udelay(10);
-	} while (1);
+	} while (i--);
 
 	return 0;
 }