diff --git a/arch/riscv/boot/dts/zhihe/a210-dev.dts b/arch/riscv/boot/dts/zhihe/a210-dev.dts
index 36c40ea5e..ae7c81fa2 100755
--- a/arch/riscv/boot/dts/zhihe/a210-dev.dts
+++ b/arch/riscv/boot/dts/zhihe/a210-dev.dts
@@ -1041,7 +1041,6 @@
 	pull_up;
 	bus-width = <8>;
 	cap-mmc-highspeed;
-	clk-delay-mmc-hs200 = <60>;
 };
 
 &sdhci0 {
diff --git a/arch/riscv/boot/dts/zhihe/a210-evb.dts b/arch/riscv/boot/dts/zhihe/a210-evb.dts
index 351f66e8d..128848be9 100644
--- a/arch/riscv/boot/dts/zhihe/a210-evb.dts
+++ b/arch/riscv/boot/dts/zhihe/a210-evb.dts
@@ -1379,7 +1379,6 @@
 	pull_up;
 	bus-width = <8>;
 	cap-mmc-highspeed;
-	clk-delay-mmc-hs200 = <60>;
 };
 
 &sdhci0 {
diff --git a/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi b/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi
index 5ebf6f5ee..d2883fe2e 100755
--- a/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi
+++ b/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi
@@ -602,7 +602,7 @@
 			clock-names = "core", "bus";
 			power-domains = <&power_peri3>;
 			//iommus = <&iommu DEVID_DIE0_EMMC>;
-			clk-delay-mmc-hs200 = <45>;
+			clk-delay-mmc-hs200 = <50>;
 			clk-delay-mmc-hs400 = <24>;
 		};
 
diff --git a/arch/riscv/boot/dts/zhihe/a210-usb-aistick.dts b/arch/riscv/boot/dts/zhihe/a210-usb-aistick.dts
index 6f0416efb..1ec1f29f4 100755
--- a/arch/riscv/boot/dts/zhihe/a210-usb-aistick.dts
+++ b/arch/riscv/boot/dts/zhihe/a210-usb-aistick.dts
@@ -578,7 +578,6 @@
 	pull_up;
 	bus-width = <8>;
 	cap-mmc-highspeed;
-	clk-delay-mmc-hs200 = <60>;
 };
 
 &sdhci0 {
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 0f7682370..ed95145bf 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -519,26 +519,26 @@ static void th1520_set_uhs_signaling(struct sdhci_host *host,
 		*  - center phase select code driven in block gap interval
 		*  - disable reporting of framing errors
 		*  - disable software managed tuning
+		*  - disable sampling window threshold
+		*     Choose largest sampling window tuning schema, do not care AT_CTRL_SWIN_TH_VAL
 		*  - disable user selection of sampling window edges,
 		*    instead tuning calculated edges are used
 		*/
 		val = sdhci_readl(host, priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL);
-		val &= ~(AT_CTRL_CI_SEL | AT_CTRL_RPT_TUNE_ERR | AT_CTRL_SW_TUNE_EN |
-			FIELD_PREP(AT_CTRL_WIN_EDGE_SEL_MASK, AT_CTRL_WIN_EDGE_SEL));
+		val &= ~(AT_CTRL_CI_SEL | AT_CTRL_RPT_TUNE_ERR | AT_CTRL_SW_TUNE_EN | AT_CTRL_SWIN_TH_EN |
+			AT_CTRL_WIN_EDGE_SEL_MASK | AT_CTRL_SWIN_TH_VAL_MASK);
 
 		/*
 		* Configure tuning settings:
 		*  - enable auto-tuning
-		*  - enable sampling window threshold
 		*  - stop clocks during phase code change
 		*  - set max latency in cycles between tx and rx clocks
 		*  - set max latency in cycles to switch output phase
 		*  - set max sampling window threshold value
 		*/
-		val |= AT_CTRL_AT_EN | AT_CTRL_SWIN_TH_EN | AT_CTRL_TUNE_CLK_STOP_EN;
+		val |= AT_CTRL_AT_EN | AT_CTRL_TUNE_CLK_STOP_EN;
 		val |= FIELD_PREP(AT_CTRL_PRE_CHANGE_DLY_MASK, AT_CTRL_PRE_CHANGE_DLY);
 		val |= FIELD_PREP(AT_CTRL_POST_CHANGE_DLY_MASK, AT_CTRL_POST_CHANGE_DLY);
-		val |= FIELD_PREP(AT_CTRL_SWIN_TH_VAL_MASK, AT_CTRL_SWIN_TH_VAL);
 		sdhci_writel(host, val, priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL);
 
 		/* Update tx delay */