diff --git a/.cicd/.gitlab-ci.yml b/.cicd/.gitlab-ci.yml index 831a16ece..787aceb49 100644 --- a/.cicd/.gitlab-ci.yml +++ b/.cicd/.gitlab-ci.yml @@ -46,7 +46,7 @@ mr-test-virt: mr-test-a200-evb: stage: test script: - - zb gitlab run --timeout 600 --board "p1-*" .cicd/runtest-a200-evb.sh + - zb gitlab run --timeout 600 --board "p1-*" --board-label "cicd" .cicd/runtest-a200-evb.sh dependencies: - mr-build-a200-evb tags: @@ -57,7 +57,7 @@ mr-test-a200-evb: mr-test-a210-evb: stage: test script: - - zb gitlab run --timeout 600 --board "a210-evb-3-*" .cicd/runtest-a210-evb.sh + - zb gitlab run --timeout 600 --board "a210-*" --board-label "cicd" .cicd/runtest-a210-evb.sh dependencies: - mr-build-a210-evb tags: diff --git a/arch/riscv/boot/dts/zhihe/a210-evb-d2d.dts b/arch/riscv/boot/dts/zhihe/a210-evb-d2d.dts index 1ddcc2b78..9137057f0 100644 --- a/arch/riscv/boot/dts/zhihe/a210-evb-d2d.dts +++ b/arch/riscv/boot/dts/zhihe/a210-evb-d2d.dts @@ -3,15 +3,49 @@ #include "a210-soc-core.dtsi" #include "a210-soc-core-die1.dtsi" #include "a210-soc-peri.dtsi" +#include "a210-soc-peri-die1.dtsi" +#include "a210-platform-d2d.dtsi" / { model = "A210 EVB D2D configuration"; aliases { - mmc0 = &emmc; - serial4 = &uart4; ethernet0 = &gmac0; ethernet1 = &gmac1; + + gpio0 = &ao_gpio0; + gpio1 = &ao_gpio1; + gpio2 = &gpio0; + gpio3 = &gpio1; + gpio4 = &gpio2; + gpio5 = &gpio3; + gpio6 = &gpio4; + gpio7 = &gpio0_die1; + gpio8 = &gpio1_die1; + gpio9 = &gpio2_die1; + gpio10 = &gpio3_die1; + + mmc0 = &emmc; + mmc1 = &sdhci0; + + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial7 = &uart7; + serial8 = &uart8; + serial9 = &uart9; + serial14 = &uart4_die1; + + spi0 = &qspi0; + spi1 = &qspi1; + spi2 = &spi0; + spi3 = &spi1; + spi4 = &qspi0_die1; + spi5 = &qspi1_die1; }; /* The first 2M will be reserved in the Kernel, and the entire available range is set here */ @@ -72,6 +106,7 @@ }; }; +/* DIE0 */ &peri1_padctrl { gmac0_pins: gmac0-0 { txclk-pins { @@ -115,179 +150,63 @@ slew-rate = <0>; }; }; + qspi0_pins: qspi0-0 { + qspi-pins { + pins = "GPIO0_18", "GPIO0_20", "GPIO0_21", "GPIO0_22", "GPIO0_23"; + function = "qspi0"; + bias-disable; + drive-strength = <13>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + sdhci_pins: sdhci0-1 { + sd-pins { + pins = "GPIO1_0"; + function = "sdio"; + bias-disable; + drive-strength = <13>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; }; -&uart0 { - status = "disabled"; -}; +&peri2_padctrl { + uart4_pins: uart4-0 { + tx-pins { + pins = "GPIO2_0"; + function = "uart4"; + bias-disable; + drive-strength = <3>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; -&uart1 { - status = "disabled"; -}; - -&uart3 { - status = "disabled"; -}; - -&uart4 { - current-speed = <115200>; /* OpenSBI */ -}; - -&uart5 { - status = "disabled"; -}; - -&uart6 { - status = "disabled"; -}; - -&uart7 { - status = "disabled"; -}; - -&uart8 { - status = "disabled"; -}; - -&uart9 { - status = "disabled"; -}; - -&spi0 { - status = "disabled"; -}; - -&qspi0 { - status = "disabled"; -}; - -&i2c1 { - status = "disabled"; -}; - -&i2c2 { - status = "disabled"; -}; - -&i2c3 { - status = "disabled"; -}; - -&i2c5 { - status = "disabled"; -}; - -&i2c6 { - status = "disabled"; -}; - -&i2c7 { - status = "disabled"; -}; - -&pwm0 { - status = "disabled"; -}; - -&pwm2 { - status = "disabled"; -}; - -&audio_i2s2 { - status = "disabled"; -}; - -&audio_i2s_8ch_sd1 { - status = "disabled"; -}; - -&audio_i2s_8ch_sd2 { - status = "disabled"; -}; - -&audio_i2s_8ch_sd3 { - status = "disabled"; -}; - -&peri3_padctrl { - status = "disabled"; -}; - -&gpio4 { - status = "disabled"; -}; - -&gmac1 { - status = "disabled"; -}; - -/* FIXME: Disabled non-critical peripherals in the bringup phase */ -&can0 { - status = "disabled"; -}; - -&can1 { - status = "disabled"; -}; - -&can2 { - status = "disabled"; -}; - -&dmac1 { - status = "disabled"; -}; - -&uart2 { - status = "disabled"; -}; - -&timer0 { - status = "disabled"; -}; - -&timer1 { - status = "disabled"; -}; - -&timer3 { - status = "disabled"; -}; - -&timer4 { - status = "disabled"; -}; - -&timer5 { - status = "disabled"; -}; - -&timer6 { - status = "disabled"; -}; - -&timer7 { - status = "disabled"; -}; - -&i2c4 { - status = "disabled"; -}; - -&audio_i2s0 { - status = "disabled"; -}; - -&dm3x4 { - status = "disabled"; -}; - -&rp3x1 { - status = "disabled"; -}; - -&usb31_zhihe { - status = "disabled"; + rx-pins { + pins = "GPIO2_1"; + function = "uart4"; + bias-disable; + drive-strength = <1>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + qspi1_pins: qspi1-1 { + qspi-pins { + pins = "GPIO3_2", "GPIO3_5", "GPIO3_6", "GPIO3_7", "GPIO3_8"; + function = "qspi1"; + bias-disable; + drive-strength = <13>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; }; &gmac0 { @@ -305,50 +224,6 @@ }; }; -&gmac1 { - status = "disabled"; -}; - -&mdio1 { - status = "disabled"; -}; - -&audio_i2s0 { - status = "disabled"; -}; - -&spi0 { - status = "disabled"; -}; - -&spi1 { - status = "disabled"; -}; - -&rp3x1 { - status = "disabled"; -}; - -&audio_i2s2 { - status = "disabled"; -}; - -&audio_pdm0 { // Load the module using insmod - status = "disabled"; -}; - -&pwm1 { - status = "disabled"; -}; - -&sata { - status = "disabled"; -}; - -&hdmi_tx { - status = "disabled"; -}; - &emmc { max-frequency = <196608000>; non-removable; @@ -365,89 +240,155 @@ }; &sdhci0 { - status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + max-frequency = <196608000>; + cap-sd-highspeed; + bus-width = <4>; + sd-uhs-sdr104; + no-sdio; + pull_up; + wprtn_ignore; }; -&adc { - status = "disabled"; +&qspi0 { + cs-gpios = <&gpio0_porta 19 0>; + rx-sample-dly = <2>; + spi-swap-data = <1>; + spi-max-frequency = <55000000>; + pinctrl-names = "default"; + pinctrl-0 = <&qspi0_pins>; + + spi_norflash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <55000000>; + #address-cells = <1>; + #size-cells = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + status = "okay"; + }; }; -&vp_dfmu_iommu { - status = "disabled"; +&qspi1 { + cs-gpios = <&gpio2_porta 29 0>; + rx-sample-dly = <2>; + spi-swap-data = <1>; + spi-max-frequency = <55000000>; + pinctrl-names = "default"; + pinctrl-0 = <&qspi1_pins>; + + spi_norflash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <55000000>; + #address-cells = <1>; + #size-cells = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + status = "okay"; + }; }; -&vp_dfmu_mt { - status = "disabled"; +&uart4 { + current-speed = <115200>; /* OpenSBI */ + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins>; }; -&npu_dfmu_iommu { - status = "disabled"; +/* DIE1 */ +&peri1_padctrl_die1 { + qspi0_pins_die1: qspi0-0 { + qspi-pins { + pins = "GPIO0_18", "GPIO0_20", "GPIO0_21", "GPIO0_22", "GPIO0_23"; + function = "qspi0"; + bias-disable; + drive-strength = <13>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; }; -&npu_dfmu_mt { - status = "disabled"; +&peri2_padctrl_die1 { + uart4_pins_die1: uart4-0 { + tx-pins { + pins = "GPIO2_0"; + function = "uart4"; + bias-disable; + drive-strength = <3>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + rx-pins { + pins = "GPIO2_1"; + function = "uart4"; + bias-disable; + drive-strength = <1>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + qspi1_pins_die1: qspi1-1 { + qspi-pins { + pins = "GPIO3_2", "GPIO3_5", "GPIO3_6", "GPIO3_7", "GPIO3_8"; + function = "qspi1"; + bias-disable; + drive-strength = <13>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; }; -&vi_dfmu_iommu { - status = "disabled"; +&qspi0_die1 { + cs-gpios = <&gpio0_porta_die1 19 0>; + rx-sample-dly = <2>; + spi-swap-data = <1>; + spi-max-frequency = <55000000>; + pinctrl-names = "default"; + pinctrl-0 = <&qspi0_pins_die1>; + + spi_norflash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <55000000>; + #address-cells = <1>; + #size-cells = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + status = "okay"; + }; }; -&vi_dfmu_mt { - status = "disabled"; +&qspi1_die1 { + cs-gpios = <&gpio2_porta_die1 29 0>; + rx-sample-dly = <2>; + spi-swap-data = <1>; + spi-max-frequency = <55000000>; + pinctrl-names = "default"; + pinctrl-0 = <&qspi1_pins_die1>; + + spi_norflash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <55000000>; + #address-cells = <1>; + #size-cells = <1>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + reg = <0>; + status = "okay"; + }; }; -&vo_dfmu_iommu { - status = "disabled"; -}; - -&vo_dfmu_mt { - status = "disabled"; -}; - -&peri1_dfmu_iommu { - status = "okay"; -}; - -&peri1_dfmu_mt { - status = "disabled"; -}; - -&pcie_dfmu_iommu { - status = "disabled"; -}; - -&pcie_dfmu_mt { - status = "disabled"; -}; - -&usb_dfmu_iommu { - status = "okay"; -}; - -&usb_dfmu_mt { - status = "disabled"; -}; - -&vidmem { - status = "disabled"; -}; - -&usb2_0 { - status = "disabled"; -}; - -&gpio0 { - status = "disabled"; -}; -&gpio1 { - status = "disabled"; -}; -&gpio2 { - status = "disabled"; -}; -&gpio3 { - status = "disabled"; -}; -&gpio4 { - status = "disabled"; +&uart4_die1 { + current-speed = <115200>; + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_die1>; }; diff --git a/arch/riscv/boot/dts/zhihe/a210-platform-d2d.dtsi b/arch/riscv/boot/dts/zhihe/a210-platform-d2d.dtsi new file mode 100644 index 000000000..2fcdb1ab5 --- /dev/null +++ b/arch/riscv/boot/dts/zhihe/a210-platform-d2d.dtsi @@ -0,0 +1,277 @@ +/* DIE0 */ +&uart0 { + status = "disabled"; +}; + +&uart1 { + status = "disabled"; +}; + +&uart2 { + status = "disabled"; +}; + +&uart3 { + status = "disabled"; +}; + +&uart5 { + status = "disabled"; +}; + +&uart6 { + status = "disabled"; +}; + +&uart7 { + status = "disabled"; +}; + +&uart8 { + status = "disabled"; +}; + +&uart9 { + status = "disabled"; +}; + +&spi0 { + status = "disabled"; +}; + +&spi1 { + status = "disabled"; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "disabled"; +}; + +&i2c2 { + status = "disabled"; +}; + +&i2c3 { + status = "disabled"; +}; + +&i2c4 { + status = "disabled"; +}; + +&i2c5 { + status = "disabled"; +}; + +&i2c6 { + status = "disabled"; +}; + +&i2c7 { + status = "disabled"; +}; + +&pwm0 { + status = "disabled"; +}; + +&pwm1 { + status = "disabled"; +}; + +&pwm2 { + status = "disabled"; +}; + +&audio_i2s0 { + status = "disabled"; +}; + +&audio_i2s1 { + status = "disabled"; +}; + +&audio_i2s2 { + status = "disabled"; +}; + +&audio_i2s_8ch_sd1 { + status = "disabled"; +}; + +&audio_i2s_8ch_sd2 { + status = "disabled"; +}; + +&audio_i2s_8ch_sd3 { + status = "disabled"; +}; + +&audio_pdm0 { + status = "disabled"; +}; + +&peri3_padctrl { + status = "disabled"; +}; + +&gpio1 { + status = "disabled"; +}; + +&gpio4 { + status = "disabled"; +}; + +&gmac1 { + status = "disabled"; +}; + +&mdio1 { + status = "disabled"; +}; + +&can0 { + status = "disabled"; +}; + +&can1 { + status = "disabled"; +}; + +&can2 { + status = "disabled"; +}; + +&dmac1 { + status = "disabled"; +}; + +&timer0 { + status = "disabled"; +}; + +&timer1 { + status = "disabled"; +}; + +&timer3 { + status = "disabled"; +}; + +&timer4 { + status = "disabled"; +}; + +&timer5 { + status = "disabled"; +}; + +&timer6 { + status = "disabled"; +}; + +&timer7 { + status = "disabled"; +}; + +&dm3x4 { + status = "disabled"; +}; + +&rp3x1 { + status = "disabled"; +}; + +&usb2_0 { + status = "disabled"; +}; + +&usb31_zhihe { + status = "disabled"; +}; + +&sata { + status = "disabled"; +}; + +&hdmi_tx { + status = "disabled"; +}; + +&adc { + status = "disabled"; +}; + +&rtc { + status = "disabled"; +}; + +&vp_dfmu_iommu { + status = "disabled"; +}; + +&vp_dfmu_mt { + status = "disabled"; +}; + +&npu_dfmu_iommu { + status = "disabled"; +}; + +&npu_dfmu_mt { + status = "disabled"; +}; + +&vi_dfmu_iommu { + status = "disabled"; +}; + +&vi_dfmu_mt { + status = "disabled"; +}; + +&vo_dfmu_iommu { + status = "disabled"; +}; + +&vo_dfmu_mt { + status = "disabled"; +}; + +&peri1_dfmu_iommu { + status = "disabled"; +}; + +&peri1_dfmu_mt { + status = "disabled"; +}; + +&pcie_dfmu_iommu { + status = "disabled"; +}; + +&pcie_dfmu_mt { + status = "disabled"; +}; + +&usb_dfmu_iommu { + status = "disabled"; +}; + +&usb_dfmu_mt { + status = "disabled"; +}; + +&vidmem { + status = "disabled"; +}; + +/* DIE1 */ +&uart4_die1 { + status = "disabled"; +}; diff --git a/arch/riscv/boot/dts/zhihe/a210-sec-tee.dtsi b/arch/riscv/boot/dts/zhihe/a210-sec-tee.dtsi index 5f108d563..b023b750d 100644 --- a/arch/riscv/boot/dts/zhihe/a210-sec-tee.dtsi +++ b/arch/riscv/boot/dts/zhihe/a210-sec-tee.dtsi @@ -122,13 +122,12 @@ optee { compatible = "linaro,optee-tz"; method = "smc"; - memory-region = <&optee_shm>; }; }; reserved-memory { - optee_shm: optee@8a000000 { - reg = <0x0 0x8a000000 0x0 0x02000000>; + optee_mem: optee@88000000 { + reg = <0x0 0x88000000 0x0 0x04000000>; no-map; }; }; diff --git a/arch/riscv/boot/dts/zhihe/a210-soc-peri-die1.dtsi b/arch/riscv/boot/dts/zhihe/a210-soc-peri-die1.dtsi index 86e94f7d3..ad1c30d24 100644 --- a/arch/riscv/boot/dts/zhihe/a210-soc-peri-die1.dtsi +++ b/arch/riscv/boot/dts/zhihe/a210-soc-peri-die1.dtsi @@ -21,69 +21,161 @@ status = "okay"; }; - uart0_die1: serial@2002014000 { - compatible = "snps,dw-apb-uart", "ns16550"; - reg = <0x20 0x02014000 0x0 0x400>; - interrupt-parent = <&intc_die1>; - interrupts = <321>; - clock-names = "baudclk"; - reg-shift = <2>; - reg-io-width = <4>; - hw-flow-control = "unsupport"; + peri1_padctrl_die1: peri1-padctrl@2002026000 { + compatible = "zhihe,a210-group1-pinctrl"; + reg = <0x20 0x02026000 0x0 0x1000>; + clocks = <&clk_peri_die1 PERI1_PAD_CTRL_PCLK_EN>; + clock-names = "pclk"; status = "okay"; }; - uart1_die1: serial@2002015000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20 0x02015000 0x0 0x1000>; - interrupt-parent = <&intc_die1>; - interrupts = <322>; - clocks = <&clk PERI1_UART1_SCLK_EN>; - clock-names = "baudclk"; - reg-shift = <2>; - reg-io-width = <4>; - hw-flow-control = "unsupport"; - status = "disabled"; + peri2_padctrl_die1: peri2-padctrl@2008411000 { + compatible = "zhihe,a210-group2-pinctrl"; + reg = <0x20 0x08411000 0x0 0x1000>; + clocks = <&clk_peri_die1 PERI2_PAD_CTRL_PCLK_EN>; + clock-names = "pclk"; + status = "okay"; }; - uart2_die1: serial@2002016000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20 0x02016000 0x0 0x1000>; - interrupt-parent = <&intc_die1>; - interrupts = <323>; - clocks = <&clk PERI1_UART2_SCLK_EN>; - clock-names = "baudclk"; - reg-shift = <2>; - reg-io-width = <4>; - hw-flow-control = "unsupport"; - status = "disabled"; + gpio0_die1: gpio@2002012000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x20 0x02012000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_peri_die1 PERI1_GPIO0_PCLK_EN>, + <&clk_peri_die1 PERI1_GPIO0_DBCLK_EN>; + clock-names = "bus", "db"; + status = "okay"; + + gpio0_porta_die1: gpio0-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + gpio-ranges = <&peri1_padctrl_die1 0 0 32>; + reg = <0>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&intc_die1>; + interrupts = <289>; + }; }; - uart3_die1: serial@2002017000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20 0x02017000 0x0 0x1000>; - interrupt-parent = <&intc_die1>; - interrupts = <37>; - clocks = <&clk PERI1_UART3_SCLK_EN>; - clock-names = "baudclk"; - reg-shift = <2>; - reg-io-width = <4>; - hw-flow-control = "unsupport"; - status = "disabled"; + gpio1_die1: gpio@2002013000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x20 0x02013000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_peri_die1 PERI1_GPIO1_PCLK_EN>, + <&clk_peri_die1 PERI1_GPIO1_DBCLK_EN>; + clock-names = "bus", "db"; + status = "okay"; + + gpio1_porta_die1: gpio1-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <18>; + gpio-ranges = <&peri1_padctrl_die1 0 32 18>; + reg = <0>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&intc_die1>; + interrupts = <290>; + }; }; - uart4_die1: serial@200008401000 { + gpio2_die1: gpio@2008410000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x20 0x08410000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_peri_die1 PERI2_GPIO2_PCLK_EN>, + <&clk_peri_die1 PERI2_GPIO2_DBCLK_EN>; + clock-names = "bus", "db"; + status = "okay"; + + gpio2_porta_die1: gpio2-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + gpio-ranges = <&peri2_padctrl_die1 0 0 32>; + reg = <0>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&intc_die1>; + interrupts = <291>; + }; + }; + + gpio3_die1: gpio@2008412000 { + compatible = "snps,dw-apb-gpio"; + reg = <0x20 0x08412000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_peri_die1 PERI2_GPIO3_PCLK_EN>, + <&clk_peri_die1 PERI2_GPIO3_DBCLK_EN>; + clock-names = "bus", "db"; + status = "okay"; + + gpio3_porta_die1: gpio3-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + gpio-controller; + #gpio-cells = <2>; + ngpios = <11>; + gpio-ranges = <&peri2_padctrl_die1 0 32 11>; + reg = <0>; + + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&intc_die1>; + interrupts = <292>; + }; + }; + + qspi0_die1: spi@2001000000 { + compatible = "snps,dw-apb-ssi-quad"; + reg = <0x20 0x01000000 0x0 0x4000>; + interrupt-parent = <&intc_die1>; + interrupts = <308>; + clocks = <&clk_peri_die1 PERI1_QSPI0_SSI_CLK_EN>; + clock-names = "sclk"; + num-cs = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; + + qspi1_die1: spi@2008428000 { + compatible = "snps,dw-apb-ssi-quad"; + reg = <0x20 0x08428000 0x0 0x4000>; + interrupt-parent = <&intc_die1>; + interrupts = <309>; + clocks = <&clk_peri_die1 PERI2_QSPI1_SSI_CLK_EN>; + clock-names = "sclk"; + num-cs = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + }; + + uart4_die1: serial@2008401000 { compatible = "snps,dw-apb-uart"; - reg = <0x20 0x0008401000 0x0 0x400>; + reg = <0x20 0x08401000 0x0 0x400>; interrupt-parent = <&intc_die1>; interrupts = <325>; - clocks = <&clk PERI2_UART4_SCLK_EN>; - clock-names = "baudclk"; + clocks = <&clk_peri_die1 PERI2_UART4_PCLK_EN>, <&clk_peri_die1 PERI2_UART4_SCLK_EN>; + clock-names = "apb_pclk", "baudclk"; reg-shift = <2>; reg-io-width = <4>; hw-flow-control = "unsupport"; status = "okay"; }; + mbox_920_die1: mbox@2000320000 { compatible = "zhihe,a210-mbox"; reg = <0x20 0x00321000 0x0 0x1000>, //mailbox1的中断通道 @@ -102,6 +194,7 @@ #mbox-cells = <2>; status = "okay"; }; + aon_die1_to_die0: aon_subsys_die1_to_die0 { compatible = "zhihe,a210-aon"; mbox-names = "aon2"; @@ -109,6 +202,7 @@ #mbox-cells = <2>; status = "okay"; }; + aon_die1_to_die1: aon_subsys_die1_to_die1 { compatible = "zhihe,a210-aon"; mbox-names = "aon3"; diff --git a/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi b/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi index a5bd1cab3..fc63b9bc7 100755 --- a/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi +++ b/arch/riscv/boot/dts/zhihe/a210-soc-peri.dtsi @@ -395,9 +395,9 @@ status = "okay"; }; - uart4: serial@0008401000 { + uart4: serial@08401000 { compatible = "snps,dw-apb-uart"; - reg = <0x00 0x0008401000 0x0 0x400>; + reg = <0x00 0x08401000 0x0 0x400>; interrupt-parent = <&intc>; interrupts = <325>; clocks = <&clk_peri PERI2_UART4_PCLK_EN>, <&clk_peri PERI2_UART4_SCLK_EN>;