OERV-BSP/kernel-zhihe-a210
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Release develop 251024

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hongyi
2025-10-24 10:02:40 +08:00
parent ac5bae38b9
commit 21d7f0476f
8 changed files with 26 additions and 13 deletions
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2
arch/riscv/boot/dts/zhihe/Makefile
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@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_ZHIHE) += a210-emu.dtb a210-emu-d2d.dtb a210-evb.dtb a210-dev.dtb a210-evb-d2d.dtb
dtb-$(CONFIG_ARCH_ZHIHE) += a210-emu.dtb a210-emu-d2d.dtb a210-som-v1.dtb a210-evb.dtb a210-dev.dtb a210-evb-d2d.dtb

4
arch/riscv/boot/dts/zhihe/a210-dev.dts
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@@ -64,10 +64,10 @@
pcie3x1 = &rp3x1;
};
/* The first 2M will be reserved in the Kernel, and the entire available range is set here */
/* The actual capacity will be adjusted through SPL */
memory@0 {
device_type = "memory";
reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G - 64MB */
reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G */
numa-node-id = <0>;
};

4
arch/riscv/boot/dts/zhihe/a210-evb.dts
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@@ -62,10 +62,10 @@
pcie3x1 = &rp3x1;
};
/* The first 2M will be reserved in the Kernel, and the entire available range is set here */
/* The actual capacity will be adjusted through SPL */
memory@0 {
device_type = "memory";
reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G - 64MB */
reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G */
numa-node-id = <0>;
};

5
arch/riscv/boot/dts/zhihe/a210-soc-core.dtsi
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@@ -410,9 +410,10 @@
reg = <0x00 0x00260000 0x0 0x1000>,<0x00 0x00250000 0x0 0x1000>,
<0x00 0x10141600 0x0 0x100>,<0x00 0x10141400 0x0 0x100>,
<0x00 0x04810000 0x0 0x1000>,<0x00 0x05810000 0x0 0x1000>,
<0x00 0x04900000 0x0 0x1000>,<0x00 0x20250000 0x0 0x1000>;
<0x00 0x04900000 0x0 0x1000>,<0x00 0x20250000 0x0 0x1000>,
<0x00 0x10140000 0x0 0xE00>;
reg-names = "PLL_WRAP","TOP_CRG","CPU_SS_CLK_SYSREG","CPU_SS_CPU_PLL",
"DDR0_SYSREG","DDR1_SYSREG","SLC_DUAL_SYSREG","TOP_CRG_T";
"DDR0_SYSREG","DDR1_SYSREG","SLC_DUAL_SYSREG","TOP_CRG_T","CPU_SS_CCU";
#clock-cells = <1>;
clocks = <&osc_32k>, <&osc_24m>, <&rc_24m>;
clock-names = "osc_32k", "osc_24m", "rc_24m";

6
arch/riscv/boot/dts/zhihe/a210-som-v1.dts
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@@ -18,7 +18,7 @@
}
/ {
model = "A210 DEV configuration";
model = "A210 SOM-V1 configuration";
aliases {
ethernet0 = &gmac0;
@@ -64,10 +64,10 @@
pcie3x1 = &rp3x1;
};
/* The first 2M will be reserved in the Kernel, and the entire available range is set here */
/* The actual capacity will be adjusted through SPL */
memory@0 {
device_type = "memory";
reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G - 64MB */
reg = <0x00 0x80000000 0x01 0x00000000>; /* 4G */
numa-node-id = <0>;
};