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kernel-starfive-jh7110/arch/powerpc/kernel
Kumar Gala a6f7174596 [POWERPC] 85xx: Only invalidate TLB0 and TLB1
All current 85xx/e500 implementations only have two TLB
arrays.  We are wasting cycles by invalidating TLB2 and TLB3.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-28 13:23:42 -06:00
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