57cfc280b5
The SiFive private L2 cache PMU is supports per-task profiling
and event counting. Users can use the perf tool to profile by
event name and event id.
Example: $ perf stat -e /sifive_u74_l2_pmu/inner_acquire_block_btot/
-e /sifive_u74_l2_pmu/inner_acquire_block_ntob/
-e /sifive_u74_l2_pmu/inner_acquire_block_ntot/ ls
Performance counter stats for 'CPU(s) 0':
300 sifive_u74_l2_pmu/inner_acquire_block_btot/
17801 sifive_u74_l2_pmu/inner_acquire_block_ntob/
5253 sifive_u74_l2_pmu/inner_acquire_block_ntot/
0.088917326 seconds time elapsed
$ perf stat -e /sifive_u74_l2_pmu/event=0x10001/
-e /sifive_u74_l2_pmu/event=0x4001/
-e /sifive_u74_l2_pmu/event=0x8001/ ls
Performance counter stats for 'CPU(s) 0':
251 sifive_u74_l2_pmu/event=0x10001/
2620 sifive_u74_l2_pmu/event=0x4001/
644 sifive_u74_l2_pmu/event=0x8001/
0.092827110 seconds time elapsed
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
30 lines
1.3 KiB
Makefile
30 lines
1.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_ARM_CCI_PMU) += arm-cci.o
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obj-$(CONFIG_ARM_CCN) += arm-ccn.o
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obj-$(CONFIG_ARM_CMN) += arm-cmn.o
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obj-$(CONFIG_ARM_DSU_PMU) += arm_dsu_pmu.o
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obj-$(CONFIG_ARM_PMU) += arm_pmu.o arm_pmu_platform.o
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obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o
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obj-$(CONFIG_ARM_PMUV3) += arm_pmuv3.o
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obj-$(CONFIG_ARM_SMMU_V3_PMU) += arm_smmuv3_pmu.o
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obj-$(CONFIG_FSL_IMX8_DDR_PMU) += fsl_imx8_ddr_perf.o
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obj-$(CONFIG_FSL_IMX9_DDR_PMU) += fsl_imx9_ddr_perf.o
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obj-$(CONFIG_HISI_PMU) += hisilicon/
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obj-$(CONFIG_QCOM_L2_PMU) += qcom_l2_pmu.o
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obj-$(CONFIG_QCOM_L3_PMU) += qcom_l3_pmu.o
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obj-$(CONFIG_RISCV_PMU) += riscv_pmu.o
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obj-$(CONFIG_RISCV_PMU_LEGACY) += riscv_pmu_legacy.o
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obj-$(CONFIG_RISCV_PMU_SBI) += riscv_pmu_sbi.o
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obj-$(CONFIG_THUNDERX2_PMU) += thunderx2_pmu.o
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obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o
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obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
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obj-$(CONFIG_ARM_DMC620_PMU) += arm_dmc620_pmu.o
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obj-$(CONFIG_MARVELL_CN10K_TAD_PMU) += marvell_cn10k_tad_pmu.o
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obj-$(CONFIG_MARVELL_CN10K_DDR_PMU) += marvell_cn10k_ddr_pmu.o
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obj-$(CONFIG_APPLE_M1_CPU_PMU) += apple_m1_cpu_pmu.o
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obj-$(CONFIG_ALIBABA_UNCORE_DRW_PMU) += alibaba_uncore_drw_pmu.o
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obj-$(CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU) += arm_cspmu/
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obj-$(CONFIG_MESON_DDR_PMU) += amlogic/
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obj-$(CONFIG_CXL_PMU) += cxl_pmu.o
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obj-$(CONFIG_SIFIVE_U74_L2_PMU) += sifive_u74_l2_pmu.o
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