soc: ti: pruss: support CORECLK_MUX and IEPCLK_MUX

The IEPCLK_MUX is present on all SoCs whereas the CORECLK_MUX is present
only on AM65x SoCs and J721E. Add support for both these CLK muxes.

This allows the clock rates and clock parents for these to be controlled
through DT leveraging the clk infrastructure for configuring the default
parents and rates.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
This commit is contained in:
Grzegorz Jaszczyk
2020-09-11 21:47:10 -07:00
committed by Santosh Shilimkar
parent 25bafac940
commit ba59c9b43c
2 changed files with 183 additions and 7 deletions

View File

@@ -36,13 +36,19 @@ struct pruss_mem_region {
/**
* struct pruss - PRUSS parent structure
* @dev: pruss device pointer
* @cfg_base: base iomap for CFG region
* @cfg_regmap: regmap for config region
* @mem_regions: data for each of the PRUSS memory regions
* @core_clk_mux: clk handle for PRUSS CORE_CLK_MUX
* @iep_clk_mux: clk handle for PRUSS IEP_CLK_MUX
*/
struct pruss {
struct device *dev;
void __iomem *cfg_base;
struct regmap *cfg_regmap;
struct pruss_mem_region mem_regions[PRUSS_MEM_MAX];
struct clk *core_clk_mux;
struct clk *iep_clk_mux;
};
#endif /* _PRUSS_DRIVER_H_ */