From 2ace592a74fd556ac9992bfff2d98e4959a7a9a8 Mon Sep 17 00:00:00 2001 From: wanlong Date: Thu, 10 Jul 2025 18:12:42 +0800 Subject: [PATCH 1/9] wireless: rtl8852bs: fix the warning about rg_interface lock not initialized INFO: trying to register non-static key. The code is fine but needs lockdep annotation, or maybe you didn't initialize this object before use? turning off the locking correctness validator. CPU: 1 PID: 2165 Comm: wpa_supplicant Not tainted 6.6.36+ #82 Hardware name: spacemit k1-x FusionOne board (DT) Call Trace: [] dump_backtrace+0x1c/0x24 [] show_stack+0x2c/0x38 [] dump_stack_lvl+0x3c/0x54 [] dump_stack+0x14/0x1c [] register_lock_class+0x42e/0x47e [] __lock_acquire.isra.0+0x48/0x694 [] lock_acquire+0xec/0x1c2 [] _raw_spin_lock_bh+0x38/0x76 [] rtw_phl_query_regulation_info+0x26/0x56 [8852bs] [] rtw_hal_query_regulation+0x10/0x18 [8852bs] [] _send_bt_country_code+0xc2/0x108 [8852bs] [] _update_bt_scbd+0xbc/0x404 [8852bs] [] _ntfy_wl_rfk+0x10a/0x264 [8852bs] [] rtw_hal_btc_wl_rfk_ntfy+0x24/0x32 [8852bs] [] halrf_btc_rfk_ntfy+0xf8/0x15e [8852bs] [] halrf_dack_trigger+0x2c/0x18c [8852bs] [] halrf_dm_init+0x90/0x156 [8852bs] [] rtw_hal_rf_dm_init+0x14/0x1c [8852bs] [] hal_start_8852b+0x17c/0x2d0 [8852bs] [] hal_start_8852bs+0x4c/0x6e [8852bs] [] rtw_hal_start+0x24/0x210 [8852bs] [] rtw_phl_start+0xc0/0x128 [8852bs] [] rtw_hw_start+0x28/0x50 [8852bs] [] netdev_open+0xce/0x33c [8852bs] [] __dev_open+0xcc/0x174 [] __dev_change_flags+0x15c/0x1cc [] dev_change_flags+0x1e/0x56 [] devinet_ioctl+0x1ec/0x5fc [] inet_ioctl+0x11c/0x152 [] sock_do_ioctl+0x32/0xb4 [] sock_ioctl+0xf2/0x2e8 [] __riscv_sys_ioctl+0x86/0xae [] do_trap_ecall_u+0xba/0x12e [] ret_from_exception+0x0/0x6e Change-Id: I8315279ed046109a171b73376c60bb622c0f4ca3 --- drivers/net/wireless/realtek/rtl8852bs/phl/phl_init.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtl8852bs/phl/phl_init.c b/drivers/net/wireless/realtek/rtl8852bs/phl/phl_init.c index 155aa18e9c7c..fedcaf652dcf 100644 --- a/drivers/net/wireless/realtek/rtl8852bs/phl/phl_init.c +++ b/drivers/net/wireless/realtek/rtl8852bs/phl/phl_init.c @@ -995,6 +995,12 @@ enum rtw_phl_status rtw_phl_init(void *drv_priv, void **phl, goto error_vers_check; } + if (false == rtw_phl_regu_interface_init(phl_info)) { + phl_status = RTW_PHL_STATUS_HAL_INIT_FAILURE; + PHL_ERR("rtw_phl_regu_interface_init failed\n"); + goto error_phl_regu_interface_init; + } + hal_status = rtw_hal_init(drv_priv, phl_info->phl_com, &(phl_info->hal), ic_info->ic_id); if ((hal_status != RTW_HAL_STATUS_SUCCESS) || (phl_info->hal == NULL)) { @@ -1096,8 +1102,10 @@ error_phl_var_init: error_hal_var_init: error_hal_read_chip_info: rtw_hal_deinit(phl_info->phl_com, phl_info->hal); -error_vers_check: error_hal_init: + rtw_phl_regu_interface_deinit(phl_info); +error_phl_regu_interface_init: +error_vers_check: #ifdef CONFIG_RTW_ACS phl_acs_info_deinit(phl_info); error_phl_acs_info_init: @@ -1156,6 +1164,7 @@ void rtw_phl_deinit(void *phl) phl_qm_deinit(phl_info); #endif /* CONFIG_QOS_MG */ rtw_hal_deinit(phl_info->phl_com, phl_info->hal); + rtw_phl_regu_interface_deinit(phl_info); phl_var_deinit(phl_info); #ifdef CONFIG_FSM phl_fsm_module_deinit(phl_info); From 89b76ac21d12025cc94dd2e62fd8229b3325ce01 Mon Sep 17 00:00:00 2001 From: huanghaiqiang Date: Tue, 8 Jul 2025 21:22:18 +0800 Subject: [PATCH 2/9] add RV4B solution Change-Id: I011de8ba866873b0343fa71af0c2f641f56f111a --- arch/riscv/boot/dts/spacemit/Makefile | 2 +- arch/riscv/boot/dts/spacemit/k1-x_RV4B.dts | 1109 ++++++++++++++++++++ 2 files changed, 1110 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/boot/dts/spacemit/k1-x_RV4B.dts diff --git a/arch/riscv/boot/dts/spacemit/Makefile b/arch/riscv/boot/dts/spacemit/Makefile index 479778fcf0b2..ce9ba4670fa8 100644 --- a/arch/riscv/boot/dts/spacemit/Makefile +++ b/arch/riscv/boot/dts/spacemit/Makefile @@ -8,5 +8,5 @@ dtb-$(CONFIG_SOC_SPACEMIT_K1X) += k1-x_fpga.dtb k1-x_fpga_1x4.dtb k1-x_fpga_2x2. k1-x_baton-camera.dtb k1-x_FusionOne.dtb k1-x_InnoBoard-Pi.dtb \ k1-x_ZT001H.dtb k1-x_uav.dtb k1-x_MUSE-Paper2.dtb \ k1-x_bit-brick.dtb k1-x_LX-V10.dtb k1-x_NetBridge-C1.dtb \ - k1-x_MUSE-Pi-Pro.dtb k1-x_som.dtb k1-x_ZT_RVOH007.dtb + k1-x_MUSE-Pi-Pro.dtb k1-x_som.dtb k1-x_ZT_RVOH007.dtb k1-x_RV4B.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) diff --git a/arch/riscv/boot/dts/spacemit/k1-x_RV4B.dts b/arch/riscv/boot/dts/spacemit/k1-x_RV4B.dts new file mode 100644 index 000000000000..0568da2e259f --- /dev/null +++ b/arch/riscv/boot/dts/spacemit/k1-x_RV4B.dts @@ -0,0 +1,1109 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* Copyright (c) 2023 Spacemit, Inc */ + +/dts-v1/; + +#include "k1-x.dtsi" +#include "k1-x-efuse.dtsi" +#include "k1-x_pinctrl.dtsi" +#include "lcd/lcd_tc358762xbg_dpi_800x480.dtsi" +#include "k1-x-hdmi.dtsi" +#include "k1-x-lcd.dtsi" +#include "k1-x-camera-sdk.dtsi" +#include "k1-x_opp_table.dtsi" +#include "k1-x_thermal_cooling.dtsi" + +/ { + model = "spacemit k1-x RV4B board"; + modules_usrload = "8852bs"; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <24000000>; + + cpu_0: cpu@0 { + cpu-ai = "true"; + }; + + cpu_1: cpu@1 { + cpu-ai = "true"; + }; + + cpu_2: cpu@2 { + reg = <2>; + cpu-ai = "true"; + }; + + cpu_3: cpu@3 { + reg = <3>; + cpu-ai = "true"; + }; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu_0>; + }; + + core1 { + cpu = <&cpu_1>; + }; + + core2 { + cpu = <&cpu_2>; + }; + + core3 { + cpu = <&cpu_3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu_4>; + }; + + core1 { + cpu = <&cpu_5>; + }; + + core2 { + cpu = <&cpu_6>; + }; + + core3 { + cpu = <&cpu_7>; + }; + }; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x00000000 0x0 0x80000000>; + }; + + memory@100000000 { + device_type = "memory"; + reg = <0x1 0x00000000 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + /* alloc memory from 0x40000000~0x70000000 */ + alloc-ranges = <0 0x40000000 0 0x30000000>; + /* size of cma buffer is 384MByte */ + size = <0 0x18000000>; + /* start address is 1Mbyte aligned */ + alignment = <0x0 0x100000>; + linux,cma-default; + /* besides hardware, dma for ex. buffer can be used by memory management */ + reusable; + }; + + /* reserved 384K for dpu, including mmu table(256K) and cmdlist(128K) */ + dpu_resv: dpu_reserved@2ff40000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x2ff40000 0x0 0x000C0000>; + no-map; + }; + }; + + chosen { + bootargs = "earlycon=sbi console=ttyS0,115200n8 loglevel=8 swiotlb=65536 rdinit=/init"; + stdout-path = "serial0:115200n8"; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc4v0_baseboard: vcc4v0-baseboard { + compatible = "regulator-fixed"; + regulator-name = "vcc4v0_baseboard"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + vin-supply = <&dc_12v>; + }; + + rf_pwrseq: rf-pwrseq { + compatible = "spacemit,rf-pwrseq"; + vdd-supply = <&ldo_7>; + vdd_voltage = <3300000>; + io-supply = <&dcdc_3>; + io_voltage = <1800000>; + pwr-gpios = <&gpio 67 0>; + status = "okay"; + + wlan_pwrseq: wlan-pwrseq { + compatible = "spacemit,wlan-pwrseq"; + regon-gpios = <&gpio 123 0>; + interrupt-parent = <&pinctrl>; + interrupts = <268>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wlan_wakeup>; + }; + + bt_pwrseq: bt-pwrseq { + compatible = "spacemit,bt-pwrseq"; + reset-gpios = <&gpio 63 0>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led1 { + label = "sys-led"; + gpios = <&gpio 96 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + status = "okay"; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_2>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&r_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_r_uart0_0>; + status = "okay"; +}; + +&r_uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_r_uart1_0>; + status = "disabled"; +}; + +&pwm14 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm14_1>; + status = "disabled"; +}; + +&dpu_online2_dsi { + memory-region = <&dpu_resv>; + spacemit-dpu-bitclk = <700000000>; + + spacemit-dpu-escclk = <76800000>; + dsi_1v2-supply = <&ldo_5>; + vin-supply-names = "dsi_1v2"; + status = "okay"; +}; + +&dsi2 { + status = "okay"; + force-attached = "lcd_tc358762xbg_dpi_800x480"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dsi1_output: endpoint@1 { + reg = <1>; + remote-endpoint = <&panel_in>; + }; + }; + }; + + dpi_panel: panel@0 { + status = "ok"; + compatible = "raspberrypi,dpi-panel"; + }; +}; + +&lcds { + status = "okay"; +}; + +&dpu_online2_hdmi { + memory-region = <&dpu_resv>; + status = "okay"; +}; + +&hdmi{ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi_0>; + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + /* spacemit,i2c-fast-mode; */ + status = "okay"; + + raspits-panel@45 { + status = "okay"; + compatible = "raspberrypi,7inch-touchscreen-panel"; + reg = <0x45>; + /* enable-gpio = <&gpio 83 0>; */ + + port { + panel_in: endpoint { + remote-endpoint = <&dsi1_output>; + }; + }; + }; + + raspits-touch-ft5426@38 { + status = "okay"; + compatible = "raspits_ft5426"; + reg = <0x38>; + }; + +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + spacemit,i2c-fast-mode; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_0>; + spacemit,i2c-fast-mode; + status = "okay"; + + eeprom@50{ + compatible = "atmel,24c02"; + reg = <0x50>; + #address-cells = <1>; + #size-cells = <1>; + + power-domains = <&power K1X_PMU_DUMMY_PWR_DOMAIN>; + status = "okay"; + + mac_address0: mac_address0@0 { + reg = <0x0 6>; + }; + + mac_address1: mac_address1@6 { + reg = <0x6 6>; + }; + }; + + es8326: es8326@19{ + compatible = "everest,es8326"; + reg = <0x19>; + #sound-dai-cells = <0>; + interrupt-parent = <&gpio>; + interrupts = <126 1>; + spk-ctl-gpio = <&gpio 127 0>; + everest,mic1-src = [44]; + everest,mic2-src = [66]; + status = "okay"; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_0>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4_0>; + status = "okay"; +}; + +&i2c6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c6_2>; + status = "disabled"; +}; + +&i2c7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c7>; + status = "disabled"; +}; + +&i2c8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c8>; + status = "okay"; + + spm8821@41 { + compatible = "spacemit,spm8821"; + reg = <0x41>; + interrupt-parent = <&intc>; + interrupts = <64>; + status = "okay"; + + vcc_sys-supply = <&vcc4v0_baseboard>; + dcdc5-supply = <&dcdc_5>; + + regulators { + compatible = "pmic,regulator,spm8821"; + + /* buck */ + dcdc_1: DCDC_REG1 { + regulator-name = "dcdc1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3450000>; + regulator-ramp-delay = <5000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <650000>; + }; + }; + + dcdc_2: DCDC_REG2 { + regulator-name = "dcdc2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3450000>; + regulator-ramp-delay = <5000>; + regulator-always-on; + }; + + dcdc_3: DCDC_REG3 { + regulator-name = "dcdc3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1800000>; + regulator-ramp-delay = <5000>; + regulator-always-on; + }; + + dcdc_4: DCDC_REG4 { + regulator-name = "dcdc4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <5000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + dcdc_5: DCDC_REG5 { + regulator-name = "dcdc5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3450000>; + regulator-ramp-delay = <5000>; + regulator-always-on; + }; + + dcdc_6: DCDC_REG6 { + regulator-name = "dcdc6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3450000>; + regulator-ramp-delay = <5000>; + regulator-always-on; + }; + + /* aldo */ + ldo_1: LDO_REG1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <500000>; + }; + }; + + ldo_2: LDO_REG2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <500000>; + }; + }; + + ldo_3: LDO_REG3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <500000>; + }; + }; + + ldo_4: LDO_REG4 { + regulator-name = "ldo4"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <500000>; + }; + }; + + /* dldo */ + ldo_5: LDO_REG5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <500000>; + }; + }; + + ldo_6: LDO_REG6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <500000>; + }; + }; + + ldo_7: LDO_REG7 { + regulator-name = "ldo7"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <500000>; + }; + }; + + ldo_8: LDO_REG8 { + regulator-name = "ldo8"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-always-on; + }; + + ldo_9: LDO_REG9 { + regulator-name = "ldo9"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + }; + + ldo_10: LDO_REG10 { + regulator-name = "ldo10"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + regulator-always-on; + }; + + ldo_11: LDO_REG11 { + regulator-name = "ldo11"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <3400000>; + }; + + sw_1: SWITCH_REG1 { + regulator-name = "switch1"; + }; + }; + + pmic_pinctrl: pinctrl { + compatible = "pmic,pinctrl,spm8821"; + gpio-controller; + #gpio-cells = <2>; + spacemit,npins = <6>; +/** + * led_pins: led-pins { + * pins = "PIN3"; + * function = "sleep"; + * bias-disable = <0>; + * drive-open-drain = <0x1>; + * }; + */ + }; + + pwr_key: key { + compatible = "pmic,pwrkey,spm8821"; + }; + + ext_rtc: rtc { + compatible = "pmic,rtc,spm8821"; + }; + + ext_adc: adc { + compatible = "pmic,adc,spm8821"; + }; + }; +}; + +&pinctrl { + pinctrl-single,gpio-range = < + &range GPIO_40 5 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_3V_DS4) + &range GPIO_49 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4) + &range GPIO_58 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_63 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_64 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_65 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_67 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4) + &range PRI_TDI 2 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range PRI_TCK 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range PRI_TDO 1 (MUX_MODE1 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_74 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_79 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_80 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_3V_DS4) + &range GPIO_81 3 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_90 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range GPIO_91 2 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range DVL0 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range DVL1 1 (MUX_MODE1 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0) + &range GPIO_110 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range GPIO_111 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range GPIO_113 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range GPIO_114 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range GPIO_115 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + &range GPIO_116 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_118 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_123 1 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS0) + &range GPIO_124 1 (MUX_MODE0 | EDGE_NONE | PULL_UP | PAD_1V8_DS2) + &range GPIO_125 3 (MUX_MODE0 | EDGE_NONE | PULL_DOWN | PAD_1V8_DS2) + >; + + pinctrl_r_uart0_0: pinctrl_r_uart0_0_grp { + pinctrl-single,pins = < + K1X_PADCONF(GPIO_47, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_tx */ + K1X_PADCONF(GPIO_48, MUX_MODE1, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart0_rx */ + >; + }; + + pinctrl_gmac0: gmac0_grp { + pinctrl-single,pins =< + K1X_PADCONF(GPIO_00, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rxdv */ + K1X_PADCONF(GPIO_01, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d0 */ + K1X_PADCONF(GPIO_02, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d1 */ + K1X_PADCONF(GPIO_03, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_clk */ + K1X_PADCONF(GPIO_04, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d2 */ + K1X_PADCONF(GPIO_05, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_rx_d3 */ + K1X_PADCONF(GPIO_06, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d0 */ + K1X_PADCONF(GPIO_07, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d1 */ + K1X_PADCONF(GPIO_08, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx */ + K1X_PADCONF(GPIO_09, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d2 */ + K1X_PADCONF(GPIO_10, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_d3 */ + K1X_PADCONF(GPIO_11, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_tx_en */ + K1X_PADCONF(GPIO_12, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdc */ + K1X_PADCONF(GPIO_13, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac0_mdio */ + K1X_PADCONF(GPIO_14, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac0_int_n */ + K1X_PADCONF(GPIO_45, MUX_MODE0, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* use as gpio */ + >; + }; + + pinctrl_gmac1: gmac1_grp { + pinctrl-single,pins =< + K1X_PADCONF(GPIO_29, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rxdv */ + K1X_PADCONF(GPIO_30, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d0 */ + K1X_PADCONF(GPIO_31, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d1 */ + K1X_PADCONF(GPIO_32, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_clk */ + K1X_PADCONF(GPIO_33, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d2 */ + K1X_PADCONF(GPIO_34, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_rx_d3 */ + K1X_PADCONF(GPIO_35, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d0 */ + K1X_PADCONF(GPIO_36, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d1 */ + K1X_PADCONF(GPIO_37, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_tx */ + K1X_PADCONF(GPIO_38, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d2 */ + K1X_PADCONF(GPIO_39, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_d3 */ + K1X_PADCONF(GPIO_40, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_tx_en */ + K1X_PADCONF(GPIO_41, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdc */ + K1X_PADCONF(GPIO_42, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS0)) /* gmac1_mdio */ + K1X_PADCONF(GPIO_43, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_int_n */ + K1X_PADCONF(GPIO_46, MUX_MODE1, (EDGE_NONE | PULL_DIS | PAD_1V8_DS2)) /* gmac1_clk_ref */ + >; + }; + + pinctrl_wlan_wakeup: wlan_wakeup_grp { + pinctrl-single,pins =< + K1X_PADCONF(GPIO_66, MUX_MODE0, (EDGE_FALL | PULL_DOWN | PAD_3V_DS2)) /* wifi edge detect */ + >; + }; + + pinctrl_r_uart1_0: r_uart1_grp { + pinctrl-single,pins =< + K1X_PADCONF(GPIO_51, MUX_MODE2, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart1_txd */ + K1X_PADCONF(GPIO_52, MUX_MODE2, (EDGE_NONE | PULL_UP | PAD_3V_DS4)) /* r_uart1_rxd */ + >; + }; + +}; + +&gpio{ + gpio-ranges = < + &pinctrl 40 GPIO_40 5 + &pinctrl 49 GPIO_49 2 + &pinctrl 58 GPIO_58 3 + &pinctrl 63 GPIO_63 1 + &pinctrl 65 GPIO_65 1 + &pinctrl 67 GPIO_67 1 + &pinctrl 70 PRI_TDI 4 + &pinctrl 74 GPIO_74 1 + &pinctrl 79 GPIO_79 1 + &pinctrl 80 GPIO_80 4 + &pinctrl 90 GPIO_90 3 + &pinctrl 96 DVL0 2 + &pinctrl 110 GPIO_110 1 + &pinctrl 111 GPIO_111 1 + &pinctrl 113 GPIO_113 1 + &pinctrl 114 GPIO_114 3 + &pinctrl 118 GPIO_118 1 + &pinctrl 123 GPIO_123 5 + >; +}; + +/* SD */ +&sdhci0 { + pinctrl-names = "default","fast"; + pinctrl-0 = <&pinctrl_mmc1>; + pinctrl-1 = <&pinctrl_mmc1_fast>; + bus-width = <4>; + cd-gpios = <&gpio 80 0>; + vmmc-supply = <&dcdc_4>; + vqmmc-supply = <&ldo_1>; + no-mmc; + no-sdio; + spacemit,sdh-host-caps-disable = <( + MMC_CAP_UHS_SDR12 | + MMC_CAP_UHS_SDR25 + )>; + spacemit,sdh-quirks = <( + SDHCI_QUIRK_BROKEN_CARD_DETECTION | + SDHCI_QUIRK_INVERTED_WRITE_PROTECT | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL + )>; + spacemit,sdh-quirks2 = <( + SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_BROKEN_PHY_MODULE | + SDHCI_QUIRK2_SET_AIB_MMC + )>; + spacemit,aib_mmc1_io_reg = <0xD401E81C>; + spacemit,apbc_asfar_reg = <0xD4015050>; + spacemit,apbc_assar_reg = <0xD4015054>; + spacemit,rx_dline_reg = <0x0>; + spacemit,tx_dline_reg = <0x0>; + spacemit,tx_delaycode = <0x9f>; + spacemit,rx_tuning_limit = <50>; + spacemit,sdh-freq = <204800000>; + status = "okay"; +}; + +/* SDIO */ +&sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc2>; + bus-width = <4>; + non-removable; + vqmmc-supply = <&dcdc_3>; + no-mmc; + no-sd; + keep-power-in-suspend; + /* bcmdhd use private oob solution rather than dat1/standard wakeup */ + /delete-property/ enable-sdio-wakeup; + spacemit,sdh-host-caps-disable = <( + MMC_CAP_UHS_DDR50 | + MMC_CAP_NEEDS_POLL + )>; + spacemit,sdh-quirks = <( + SDHCI_QUIRK_BROKEN_CARD_DETECTION | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL + )>; + spacemit,sdh-quirks2 = <( + SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_BROKEN_PHY_MODULE + )>; + spacemit,rx_dline_reg = <0x0>; + spacemit,tx_delaycode = <0x9f>; + spacemit,rx_tuning_limit = <50>; + spacemit,sdh-freq = <375000000>; + status = "okay"; +}; + +/* eMMC */ +&sdhci2 { + bus-width = <8>; + non-removable; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + no-sd; + no-sdio; + spacemit,sdh-quirks = <( + SDHCI_QUIRK_BROKEN_CARD_DETECTION | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL + )>; + spacemit,sdh-quirks2 = <( + SDHCI_QUIRK2_PRESET_VALUE_BROKEN + )>; + spacemit,sdh-freq = <375000000>; + status = "okay"; +}; + +ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac0>; + + emac,reset-gpio = <&gpio 45 0>; + emac,reset-active-low; + emac,reset-delays-us = <0 10000 100000>; + + /* store forward mode */ + tx-threshold = <1518>; + rx-threshold = <12>; + tx-ring-num = <1024>; + rx-ring-num = <1024>; + dma-burst-len = <5>; + + ref-clock-from-phy; + + clk-tuning-enable; + clk-tuning-by-delayline; + tx-phase = <60>; + rx-phase = <73>; + + nvmem-cells = <&mac_address0>; + nvmem-cell-names = "mac-address"; + + phy-handle = <&rgmii0>; + + status = "okay"; + + mdio-bus { + #address-cells = <0x1>; + #size-cells = <0x0>; + rgmii0: phy@0 { + compatible = "ethernet-phy-id001c.c916"; + device_type = "ethernet-phy"; + reg = <0x1>; + phy-mode = "rgmii"; + }; + }; +}; + +ð1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac1>; + + emac,reset-gpio = <&gpio 115 0>; + emac,reset-active-low; + emac,reset-delays-us = <0 10000 100000>; + + /* store forward mode */ + tx-threshold = <1518>; + rx-threshold = <12>; + tx-ring-num = <1024>; + rx-ring-num = <1024>; + dma-burst-len = <5>; + + ref-clock-from-phy; + + clk-tuning-enable; + clk-tuning-by-delayline; + tx-phase = <90>; + rx-phase = <73>; + nvmem-cells = <&mac_address1>; + nvmem-cell-names = "mac-address"; + + phy-handle = <&rgmii1>; + + status = "disabled"; + + mdio-bus { + #address-cells = <0x1>; + #size-cells = <0x0>; + rgmii1: phy@1 { + compatible = "ethernet-phy-id001c.c916"; + device_type = "ethernet-phy"; + reg = <0x1>; + phy-mode = "rgmii"; + }; + }; +}; + +&usbphy { + status = "okay"; +}; + +&udc { + spacemit,udc-mode = ; + status = "okay"; +}; + +&ehci { + spacemit,reset-on-resume; + spacemit,udc-mode = ; + status = "disabled"; +}; + +&otg { + usb-role-switch; + role-switch-user-control; + spacemit,reset-on-resume; + role-switch-default-mode = "peripheral"; + vbus-gpios = <&gpio 123 0>; + status = "disabled"; +}; + +&usbphy1 { + status = "okay"; +}; + +&udc1 { + spacemit,udc-mode = ; + status = "disabled"; +}; + +&ehci1 { + /* spacemit,udc-mode = ; */ + spacemit,reset-on-resume; + status = "okay"; +}; + +&otg1 { + usb-role-switch; + role-switch-user-control; + spacemit,reset-on-resume; + role-switch-default-mode = "host"; + vbus-gpios = <&gpio 123 0>; + status = "disabled"; +}; + +&usb2phy { + status = "okay"; +}; + +&combphy { + status = "okay"; +}; + +&usb3hub { + hub-gpios = < + &gpio 60 0 /* usb3 hub en */ + &gpio 59 0>; /* usb3 hub rst*/ + vbus-gpios = < + &gpio 40 0 + &gpio 41 0 + &gpio 42 0 + &gpio 43 0>; /* gpio for usb3 hub output vbus */ + status = "okay"; +}; + +&usbdrd3 { + status = "okay"; + reset-on-resume; + dwc3@c0a00000 { + dr_mode = "host"; + phy_type = "utmi"; + snps,hsphy_interface = "utmi"; + snps,dis_enblslpm_quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,dis-del-phy-power-chg-quirk; + snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-ss-quirk; + }; +}; + +&pcie1_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie1_3>; + status = "disabled"; +}; + +&pcie2_rc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie2_4>; + status = "disabled"; +}; + +&imggpu { + status = "okay"; +}; + +&qspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <26500000>; + m25p,fast-read; + broken-flash-reset; + status = "okay"; + }; +}; + +&spi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssp3_0>; + status = "disabled"; +}; + +&pwm_bl { + pwms = <&pwm14 2000>; + brightness-levels = < + 0 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 + 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 + 40 40 40 40 40 40 40 40 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <100>; + + status = "okay"; +}; + +/* MIPI CSI1, clk lane1 */ +&backsensor { + pwdn-gpios = <&gpio 113 0>; + dvdd-powen-gpios = <&gpio 115 0>; + + mclk-disable; + + status = "disabled"; +}; + +/* MIPI CSI3 data line2,3 clk lane2 */ +&backsensor_aux { + //af_2v8-supply = <&ldo_3>; + //avdd_2v8-supply = <&ldo_2>; + //dovdd_1v8-supply = <&ldo_7>; + //dvdd_1v2-supply = <&ldo_6>; + + pwdn-gpios = <&gpio 111 0>; + //reset-gpios = <&gpio 97 0>; + + //pinmulti-enable; + mclk-disable; + twsi-index = <1>; + /* pinctrl-names = "default"; */ + /* pinctrl-0 = <&pinctrl_camera1>; */ + + status = "okay"; +}; + +/* MIPI CSI3 data line0,1 clk lane3 */ +&frontsensor { + pwdn-gpios = <&gpio 114 0>; + dvdd-powen-gpios = <&gpio 115 0>; + + twsi-index = <1>; + + //mclk can disable + mclk-disable; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_camera1>; + + status = "disabled"; +}; +&csiphy0 { + + status = "okay"; +}; +&csiphy1 { + + status = "disabled"; +}; +&csiphy2 { + spacemit,bifmode-enable; + status = "okay"; +}; + +&ccic0 { + power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; + + status = "okay"; +}; +&ccic1 { + power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; + + status = "okay"; +}; +&ccic2 { + power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; + + status = "okay"; +}; +&isp { + power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; +}; + +&cpp { + power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; +}; + +&vi { + power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; +}; + +&rcpu { + status = "okay"; +}; + +&i2s0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sspa0_0>; + status = "okay"; +}; + +&hdmiaudio { + status = "okay"; +}; + +&sound_hdmi { + status = "okay"; + simple-audio-card,cpu { + sound-dai = <&hdmiaudio>; + }; +}; + +&sound_codec { + status = "okay"; + simple-audio-card,name = "snd-es8326"; + spacemit,mclk-fs = <64>; + simple-audio-card,codec { + sound-dai = <&es8326>; + }; +}; From e3914cc9e63eb540d1b33b8a3b89a60f1633727b Mon Sep 17 00:00:00 2001 From: wanlong Date: Thu, 10 Jul 2025 11:25:39 +0800 Subject: [PATCH 3/9] usb: typec: husb239: add delay work for pd contract update Change-Id: I2287a56cd8a31451c8f207bf5fdae3932b17b5b8 --- drivers/usb/typec/husb239.c | 83 ++++++++++++++++++++++++++----------- 1 file changed, 59 insertions(+), 24 deletions(-) diff --git a/drivers/usb/typec/husb239.c b/drivers/usb/typec/husb239.c index 2d0efaceb9a7..8f3fedb905b9 100644 --- a/drivers/usb/typec/husb239.c +++ b/drivers/usb/typec/husb239.c @@ -50,6 +50,8 @@ #define HUSB239_REG_SRC_PDO_5V 0x6A #define HUSB239_REG_SRC_PDO_9V 0x6B #define HUSB239_REG_SRC_PDO_12V 0x6C +#define HUSB239_REG_SRC_PDO_15V 0x6D +#define HUSB239_REG_SRC_PDO_20V 0x6E #define HUSB239_REG_MAX 0xFF @@ -156,6 +158,8 @@ #define HUSB239_PD_COMM(s) (!!((s) & BIT(4))) #define HUSB239_POWER_ROLE(s) (!!((s) & BIT(6))) +#define PD_DEETCT_DELAY_MS 1000 + enum husb239_snkcap { SNKCAP_5V = 1, SNKCAP_9V, @@ -204,6 +208,7 @@ struct husb239 { struct gpio_desc *int_gpiod; int gpio_irq; struct work_struct work; + struct delayed_work pd_work; struct workqueue_struct *workqueue; struct mutex lock; @@ -347,10 +352,15 @@ static void husb239_update_operating_status(struct husb239 *husb239) else op_current = 3000 + (status1 - STEP_BOUNDARY) * 40; - /* covert mV/mA to uV/uA */ - husb239->voltage = voltage * 1000; - husb239->op_current = op_current * 1000; - husb239->psy_online = true; + if ((husb239->voltage != voltage * 1000) + || (husb239->op_current != op_current * 1000)) { + /* covert mV/mA to uV/uA */ + husb239->voltage = voltage * 1000; + husb239->op_current = op_current * 1000; + husb239->psy_online = true; + goto out; + } + return; out: dev_info(husb239->dev, "update sink voltage: %d current: %d\n", husb239->voltage, husb239->op_current); @@ -456,9 +466,9 @@ static int husb239_usbpd_detect(struct husb239 *husb239) return ret; dev_dbg(husb239->dev, "husb239 detect pd, contract status0: %x\n", status0); - if (((status0 & HUSB239_PD_CONTRACT_MASK) >> HUSB239_PD_CONTRACT_SHIFT) == SNKCAP_5V) { + if (((status0 & HUSB239_PD_CONTRACT_MASK) >> HUSB239_PD_CONTRACT_SHIFT)) { husb239_update_operating_status(husb239); - break; + return 0; } /* check attach status */ ret = regmap_read(husb239->regmap, HUSB239_REG_STATUS, &status); @@ -512,30 +522,30 @@ static int husb239_usbpd_request_voltage(struct husb239 *husb239) break; } - while(--count) { - ret = regmap_read(husb239->regmap, HUSB239_REG_SRC_PDO_5V + snk_sel - 1, &src_pdo); - if (ret) - return ret; + for (; snk_sel >= SNKCAP_5V; snk_sel--) { + for (count = 10; count > 0; count--) { + ret = regmap_read(husb239->regmap, HUSB239_REG_SRC_PDO_5V + snk_sel - 1, &src_pdo); + if (ret) + return ret; - dev_dbg(husb239->dev, "husb239_attach src_pdo: %x\n", src_pdo); - if (src_pdo & HUSB239_REG_SRC_DETECT) - break; + dev_dbg(husb239->dev, "husb239_attach src_pdo: %x\n", src_pdo); + if (src_pdo & HUSB239_REG_SRC_DETECT) + goto pd_detect; - /* check attach status */ - ret = regmap_read(husb239->regmap, HUSB239_REG_STATUS, &status); - if (ret) - return ret; + /* check attach status */ + ret = regmap_read(husb239->regmap, HUSB239_REG_STATUS, &status); + if (ret) + return ret; - if (!(status & HUSB239_REG_STATUS_ATTACH)) - return -ENODEV; + if (!(status & HUSB239_REG_STATUS_ATTACH)) + return -ENODEV; - msleep(100); + msleep(100); + } } - if (count == 0) - return -EINVAL; - - dev_info(husb239->dev, "pd detect \n"); +pd_detect: + dev_info(husb239->dev, "pd detect, snk_sel: %d\n", snk_sel); ret = regmap_update_bits(husb239->regmap, HUSB239_REG_SRC_PDO, HUSB239_REG_SRC_PDO_SEL_MASK, (snk_sel << 3)); if (ret) @@ -567,6 +577,8 @@ static int husb239_usbpd_request_voltage(struct husb239 *husb239) if (ret) return ret; + queue_delayed_work(husb239->workqueue, + &husb239->pd_work, msecs_to_jiffies(PD_DEETCT_DELAY_MS)); return ret; } @@ -810,6 +822,17 @@ static int husb239_chip_init(struct husb239 *husb239) return 0; } +static void husb239_pd_func(struct work_struct *work) +{ + struct husb239 *husb239 = container_of(work, struct husb239, pd_work.work); + + mutex_lock(&husb239->lock); + husb239_update_operating_status(husb239); + mutex_unlock(&husb239->lock); + + return; +} + static void husb239_work_func(struct work_struct *work) { struct husb239 *husb239 = container_of(work, struct husb239, work); @@ -856,6 +879,7 @@ static int husb239_irq_init(struct husb239 *husb239) int ret, status; INIT_WORK(&husb239->work, husb239_work_func); + INIT_DELAYED_WORK(&husb239->pd_work, husb239_pd_func); husb239->workqueue = alloc_workqueue("husb239_work", WQ_FREEZABLE | WQ_MEM_RECLAIM, @@ -1285,6 +1309,9 @@ static void husb239_remove(struct i2c_client *client) struct husb239 *husb239 = i2c_get_clientdata(client); struct typec_info *info = &husb239->info; + cancel_work_sync(&husb239->work); + cancel_delayed_work_sync(&husb239->pd_work); + if (husb239->workqueue) destroy_workqueue(husb239->workqueue); @@ -1303,6 +1330,10 @@ static int __maybe_unused husb239_suspend(struct device *dev) { struct husb239 *husb239 = dev_get_drvdata(dev); + /* Make sure any pending irq work is finished before suspends */ + flush_work(&husb239->work); + flush_delayed_work(&husb239->pd_work); + /* Clear all interruption */ regmap_write(husb239->regmap, HUSB239_REG_INT, 0xFF); regmap_write(husb239->regmap, HUSB239_REG_INT1, 0xFF); @@ -1313,6 +1344,10 @@ static int __maybe_unused husb239_suspend(struct device *dev) static int __maybe_unused husb239_resume(struct device *dev) { + struct husb239 *husb239 = dev_get_drvdata(dev); + + queue_delayed_work(husb239->workqueue, + &husb239->pd_work, msecs_to_jiffies(PD_DEETCT_DELAY_MS)); return 0; } From 120edd4c6091dbae71cb89a9f941e3a979bed378 Mon Sep 17 00:00:00 2001 From: Junzhong Pan Date: Wed, 9 Jul 2025 20:44:15 +0800 Subject: [PATCH 4/9] pinctrl: k1x: set strict for pinmux_ops This will not allow simultaneous use of the same pin for GPIO and another function. If user use a pin in such way, an error would be reported, make it easier to debug. d401e000.pinctrl: pin PIN80 already requested by k1x-gpio:79; cannot claim for xxx Signed-off-by: Junzhong Pan Change-Id: I0aad1e6a55ac46c47537d18bdb8586779f290435 --- drivers/pinctrl/pinctrl-single.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index d5037b6923c7..318f650611fa 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -501,6 +501,9 @@ static const struct pinmux_ops pcs_pinmux_ops = { .get_function_groups = pinmux_generic_get_function_groups, .set_mux = pcs_set_mux, .gpio_request_enable = pcs_request_gpio, +#ifdef CONFIG_SOC_SPACEMIT_K1X + .strict = true, +#endif }; /* Clear BIAS value */ From fdee3b35a0a5a03452c03744d5f64a042dad1f90 Mon Sep 17 00:00:00 2001 From: huzhen Date: Mon, 14 Jul 2025 13:54:51 +0800 Subject: [PATCH 5/9] PCI: k1x: Add hold_phy_rst before phy enable During the probe and resume processes, phy_enable will clear the app_hold_phy_rst bit. app_hold_phy_rst must be set before this bit is cleared. Change-Id: Ia9332c041199095dbfb9c0059b4704db743f189a --- drivers/pci/controller/dwc/pcie-k1x.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-k1x.c b/drivers/pci/controller/dwc/pcie-k1x.c index 7283018f82b9..be4d75e11ff3 100644 --- a/drivers/pci/controller/dwc/pcie-k1x.c +++ b/drivers/pci/controller/dwc/pcie-k1x.c @@ -1547,6 +1547,19 @@ static int k1x_power_on(struct k1x_pcie *k1x, int on) return 0; } +static void k1x_pcie_hold_phy_rst(struct k1x_pcie *k1x) +{ + u32 reg; + + reg = k1x_pcie_readl(k1x, PCIECTRL_K1X_CONF_DEVICE_CMD); + if (reg & APP_HOLD_PHY_RST) { + dev_dbg(k1x->pci->dev, "k1x_pcie_hold_phy_rst: phy reset already held\n"); + return; + } + reg |= APP_HOLD_PHY_RST; + k1x_pcie_writel(k1x, PCIECTRL_K1X_CONF_DEVICE_CMD, reg); +} + static int k1x_pcie_probe(struct platform_device *pdev) { u32 reg; @@ -1650,6 +1663,8 @@ static int k1x_pcie_probe(struct platform_device *pdev) k1x->pci = pci; platform_set_drvdata(pdev, k1x); + k1x_pcie_hold_phy_rst(k1x); + pm_runtime_enable(&pdev->dev); pm_runtime_get_sync(&pdev->dev); pm_runtime_get_noresume(&pdev->dev); @@ -1818,6 +1833,8 @@ static int k1x_pcie_resume_noirq(struct device *dev) struct dw_pcie_rp *pp = &pci->pp; u32 reg; + k1x_pcie_hold_phy_rst(k1x); + /* soft no reset */ reg = k1x_pcie_readl(k1x, PCIE_CTRL_LOGIC); reg &= ~(1 << 0); From 746ca835041a7db05e34cc8f438d962214047257 Mon Sep 17 00:00:00 2001 From: xuhaodong Date: Wed, 16 Jul 2025 09:57:00 +0800 Subject: [PATCH 6/9] camera: sensor: fix multiple sensors cannot get power simultaneously Change-Id: I63888dae42983961609e0102d7fc240ba2176269 --- .../platform/spacemit/camera/cam_sensor/cam_sensor.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/spacemit/camera/cam_sensor/cam_sensor.c b/drivers/media/platform/spacemit/camera/cam_sensor/cam_sensor.c index e91c7db5dd39..e9717b0e2f91 100644 --- a/drivers/media/platform/spacemit/camera/cam_sensor/cam_sensor.c +++ b/drivers/media/platform/spacemit/camera/cam_sensor/cam_sensor.c @@ -1385,25 +1385,25 @@ static int camsnr_of_parse(struct cam_sensor_device *sensor) } sensor->dphy_no = (u8) dphy_no; - sensor->afvdd = devm_regulator_get_exclusive(dev, "af_2v8"); + sensor->afvdd = devm_regulator_get(dev, "af_2v8"); if (IS_ERR(sensor->afvdd)) { cam_dbg("Failed to get regulator, guess sensor no need to control af_2v8\n"); sensor->afvdd = NULL; } - sensor->avdd = devm_regulator_get_exclusive(dev, "avdd_2v8"); + sensor->avdd = devm_regulator_get(dev, "avdd_2v8"); if (IS_ERR(sensor->avdd)) { cam_dbg("Failed to get regulator, guess sensor no need to control avdd_2v8\n"); sensor->avdd = NULL; } - sensor->dovdd = devm_regulator_get_exclusive(dev, "dovdd_1v8"); + sensor->dovdd = devm_regulator_get(dev, "dovdd_1v8"); if (IS_ERR(sensor->dovdd)) { cam_dbg("Failed to get regulator, guess sensor no need to control dovdd_1v8\n"); sensor->dovdd = NULL; } - sensor->dvdd = devm_regulator_get_exclusive(dev, "dvdd_1v2"); + sensor->dvdd = devm_regulator_get(dev, "dvdd_1v2"); if (IS_ERR(sensor->dvdd)) { cam_dbg("Failed to get regulator, guess sensor no need to control dvdd_1v2\n"); sensor->dvdd = NULL; From 14053d2d465aa0a44729b6a92433040335201a75 Mon Sep 17 00:00:00 2001 From: xuhaodong Date: Wed, 16 Jul 2025 11:32:12 +0800 Subject: [PATCH 7/9] k1: ZT_RVOH007: enbale camera sensor Change-Id: I1f4d44633ca5df18c31d5d7fb4cc4d0708e7c7f3 --- arch/riscv/boot/dts/spacemit/k1-x_ZT_RVOH007.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/riscv/boot/dts/spacemit/k1-x_ZT_RVOH007.dts b/arch/riscv/boot/dts/spacemit/k1-x_ZT_RVOH007.dts index 4583036be308..962599cf2a18 100644 --- a/arch/riscv/boot/dts/spacemit/k1-x_ZT_RVOH007.dts +++ b/arch/riscv/boot/dts/spacemit/k1-x_ZT_RVOH007.dts @@ -271,7 +271,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; spacemit,i2c-fast-mode; - status = "disabled"; + status = "okay"; }; &i2c2 { @@ -881,7 +881,7 @@ twsi-index = <0>; - status = "disabled"; + status = "okay"; }; /* MIPI CSI3 data line2,3 clk lane2 */ @@ -919,12 +919,12 @@ //pwm-enable; //pwms = <&pwm16 10000>; - status = "disabled"; + status = "okay"; }; &csiphy0 { - status = "disabled"; + status = "okay"; }; &csiphy1 { @@ -934,25 +934,25 @@ &csiphy2 { - status = "disabled"; + status = "okay"; }; &ccic0 { power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; - status = "disabled"; + status = "okay"; }; &ccic1 { power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; - status = "disabled"; + status = "okay"; }; &ccic2 { power-domains = <&power K1X_PMU_ISP_PWR_DOMAIN>; - status = "disabled"; + status = "okay"; }; &isp { From 71908afd8579c4957892abc870ec24a28bcc4cfa Mon Sep 17 00:00:00 2001 From: wanlong Date: Wed, 16 Jul 2025 11:19:37 +0800 Subject: [PATCH 8/9] mmc: sdhci-of-k1x: fix the bug of schedule on spacemit_sdhci_request() INFO: task kworker/3:1:81 blocked for more than 120 seconds. Not tainted 6.6.63 #20250714113129 "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. task:kworker/3:1 state:D stack:0 pid:81 ppid:2 flags:0x00000000 Workqueue: events_freezable mmc_rescan Call Trace: [] __schedule+0x32c/0xa86 [] schedule+0x4e/0xd8 [] spacemit_sdhci_request+0xbc/0xfc [] __mmc_start_request+0x56/0x16e [] mmc_start_request+0x78/0x92 [] mmc_wait_for_req+0x60/0xd0 [] mmc_wait_for_cmd+0x5e/0x88 [] mmc_io_rw_direct+0x7c/0x104 [] sdio_readb+0x2c/0x62 [] rtw_sdio_raw_read+0x19e/0x2c2 [8852bs] [] sdio_io+0xe4/0x2e4 [8852bs] [] rtw_sdio_read_cmd52+0x14/0x1c [8852bs] [] hal_mac_sdio_cmd52_r8+0x2e/0x84 [8852bs] [] w_indir_cmd53_sdio_8852b+0xc6/0x136 [8852bs] [] w8_indir_sdio+0x48/0x6c [8852bs] [] reg_write8_sdio+0x54/0x72 [8852bs] [] mac_pwr_switch+0x358/0x418 [8852bs] [] mac_hal_fast_init+0x4a/0x3a6 [8852bs] [] rtw_hal_mac_hal_fast_init+0xe4/0x2b8 [8852bs] [] hal_fast_start_8852b+0x10/0x18 [8852bs] [] hal_fast_start_8852bs+0x4e/0xae [8852bs] [] rtw_hal_preload+0x3c/0xca [8852bs] [] rtw_phl_preload+0x20/0x3e [8852bs] [] rtw_hw_init+0x128/0x294 [8852bs] [] rtw_dev_probe+0xd8/0x3be [8852bs] [] sdio_bus_probe+0xf4/0x110 [] really_probe+0x8c/0x326 [] __driver_probe_device+0x62/0x110 [] driver_probe_device+0x36/0xba [] __device_attach_driver+0x72/0xd0 [] bus_for_each_drv+0x5c/0xb2 [] __device_attach+0x84/0x158 [] device_initial_probe+0xe/0x16 [] bus_probe_device+0x86/0x88 [] device_add+0x534/0x6ec [] sdio_add_func+0x60/0x7a [] mmc_attach_sdio+0x178/0x34a [] mmc_rescan+0x274/0x334 [] process_one_work+0x116/0x314 [] worker_thread+0x2be/0x3ac [] kthread+0xda/0xf6 [] ret_from_fork+0xe/0x18 Change-Id: Id8fa5f7322455e1feeafafd083c615cbdcd49731 --- drivers/mmc/host/sdhci-of-k1x.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-of-k1x.c b/drivers/mmc/host/sdhci-of-k1x.c index 8b643df07f4a..4cfdb901a5b0 100644 --- a/drivers/mmc/host/sdhci-of-k1x.c +++ b/drivers/mmc/host/sdhci-of-k1x.c @@ -1424,8 +1424,10 @@ static void spacemit_sdhci_request_done(struct sdhci_host *host, mmc_request_done(host->mmc, mrq); - if (!(host->mmc->caps2 & MMC_CAP2_NO_SDIO)) + if (!(host->mmc->caps2 & MMC_CAP2_NO_SDIO)) { atomic_dec(&pdata->ref_count); + wake_up(&pdata->wait_queue); + } } static const struct sdhci_ops spacemit_sdhci_ops = { From 14d1b98300a5a6cb9db528ab0093bbc1bc1d4586 Mon Sep 17 00:00:00 2001 From: weijinmei Date: Wed, 16 Jul 2025 17:34:52 +0800 Subject: [PATCH 9/9] i2s: adjust the sysclk divider parameters The old parameters may cause jitter in sysclk. Change-Id: Ia64dda7e35ae56090a7d27ad8ab972d3f8ba8280 Signed-off-by: weijinmei --- sound/soc/spacemit/spacemit-snd-i2s.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/sound/soc/spacemit/spacemit-snd-i2s.c b/sound/soc/spacemit/spacemit-snd-i2s.c index fde0a077eee9..5b7b1b320a32 100644 --- a/sound/soc/spacemit/spacemit-snd-i2s.c +++ b/sound/soc/spacemit/spacemit-snd-i2s.c @@ -52,6 +52,8 @@ #define BITCLK_DIV_468 (0x0 << 27) #define FRAME_48K_I2S (0x4 << 15) +#define SYSCLK_PRE_CTRL 0x08 + /* * ssp:sspa audio private data */ @@ -299,16 +301,16 @@ static int i2s_sspa_hw_params(struct snd_pcm_substream *substream, sspa_priv->mclk_fs = sspa_priv->sysclk / (params_rate(params)); switch (sspa_priv->mclk_fs) { case 64: - target = SYSCLK_BASE_156M | 4 << 15 | 200; //64fs + target = SYSCLK_BASE_156M | 326 << 15 | 32600; //64fs break; case 128: - target = SYSCLK_BASE_156M | 8 << 15 | 200; //128fs + target = SYSCLK_BASE_156M | 652 << 15 | 32600; //128fs break; case 256: - target = SYSCLK_BASE_156M | 16 << 15 | 200; //256fs + target = SYSCLK_BASE_156M | 1304 << 15 | 32600; //256fs break; default: - target = SYSCLK_BASE_156M | 16 << 15 | 200; //256fs + target = SYSCLK_BASE_156M | 1304 << 15 | 32600; //256fs break; } @@ -333,6 +335,10 @@ static int i2s_sspa_hw_params(struct snd_pcm_substream *substream, val = __raw_readl(sspa->pmumain + ISCCR1); val = val & ~0x5FFFFFFF; __raw_writel(val | target, sspa->pmumain + ISCCR1); + + val = __raw_readl(sspa->pmumain + SYSCLK_PRE_CTRL); + val |= 1 << 29; + __raw_writel(val, sspa->pmumain + SYSCLK_PRE_CTRL); return 0; } @@ -479,22 +485,26 @@ static void i2s_sspa_init(struct sspa_priv *priv) switch (priv->mclk_fs) { case 64: - target = SYSCLK_BASE_156M | 0 << 27| 4 << 15 | 200; //64fs + target = SYSCLK_BASE_156M | 0 << 27 | 326 << 15 | 32600; //64fs break; case 128: - target = SYSCLK_BASE_156M | 1 << 27| 8 << 15 | 200; //128fs + target = SYSCLK_BASE_156M | 1 << 27 | 652 << 15 | 32600; //128fs break; case 256: - target = SYSCLK_BASE_156M | 3 << 27| 16 << 15 | 200; //256fs + target = SYSCLK_BASE_156M | 3 << 27 | 1304 << 15 | 32600; //256fs break; default: - target = SYSCLK_BASE_156M | 3 << 27| 16 << 15 | 200; //256fs + target = SYSCLK_BASE_156M | 3 << 27 | 1304 << 15 | 32600; //256fs break; } val = __raw_readl(sspa->pmumain + ISCCR1); val = val & ~0x5FFFFFFF; __raw_writel(val | target, sspa->pmumain + ISCCR1); + val = __raw_readl(sspa->pmumain + SYSCLK_PRE_CTRL); + val |= 1 << 29; + __raw_writel(val, sspa->pmumain + SYSCLK_PRE_CTRL); + } static int i2s_sspa_suspend(struct device *dev)