From b804bf3debf98e9420ee40f307fd6b95bcb8bde5 Mon Sep 17 00:00:00 2001 From: Dingli Zhang Date: Wed, 17 Sep 2025 11:17:05 +0800 Subject: [PATCH] RISC-V: Missing acquire in JNI_FastGetField::generate_fast_get_int_field0 --- src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp b/src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp index b08e520393a..12825bbfe2a 100644 --- a/src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp +++ b/src/hotspot/cpu/riscv/jniFastGetField_riscv.cpp @@ -76,6 +76,7 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) { ExternalAddress counter(SafepointSynchronize::safepoint_counter_addr()); __ la(rcounter_addr, counter); __ lwu(rcounter, Address(rcounter_addr)); + __ membar(MacroAssembler::LoadLoad | MacroAssembler::LoadStore); // An even value means there are no ongoing safepoint operations __ test_bit(t0, rcounter, 0); __ bnez(t0, slow); @@ -134,6 +135,7 @@ address JNI_FastGetField::generate_fast_get_int_field0(BasicType type) { __ membar(MacroAssembler::LoadLoad | MacroAssembler::LoadStore); __ lw(t0, Address(rcounter_addr)); + __ membar(MacroAssembler::LoadLoad | MacroAssembler::LoadStore); __ bne(rcounter, t0, slow); switch (type) {