forked from OERV-BSP/u-boot
e59cd9cb3d
The Rockchip RK3576 is a ARM-based SoC with quad-core Cortex-A72 and quad-core Cortex-A53 including 6TOPS NPU, Mali-G52 MC3, HDMI Out, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, UFS, USB OTG 3.0, Type-C, USB 2.0, PCIe 2.1, SATA 3, Ethernet, SDIO3.0, I2C, UART, SPI, GPIO and PWM. Add arch core support for it. Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com> [adapted for mainline u-boot] Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
42 lines
1.0 KiB
C
42 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2024 Rockchip Electronics Co., Ltd
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*/
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#ifndef __CONFIG_RK3576_COMMON_H
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#define __CONFIG_RK3576_COMMON_H
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#define CFG_CPUID_OFFSET 0xa
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#include "rockchip-common.h"
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#define CFG_IRAM_BASE 0x3ff80000
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#define CFG_SYS_SDRAM_BASE 0x40000000
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/* Used by board_get_usable_ram_top(), space below the 4G address boundary */
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#define SDRAM_MAX_SIZE (SZ_4G - CFG_SYS_SDRAM_BASE)
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#ifndef ROCKCHIP_DEVICE_SETTINGS
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#define ROCKCHIP_DEVICE_SETTINGS
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#endif
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x40c00000\0" \
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"script_offset_f=0xffe000\0" \
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"script_size_f=0x2000\0" \
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"pxefile_addr_r=0x40e00000\0" \
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"kernel_addr_r=0x42000000\0" \
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"kernel_comp_addr_r=0x4a000000\0" \
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"fdt_addr_r=0x52000000\0" \
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"fdtoverlay_addr_r=0x52100000\0" \
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"ramdisk_addr_r=0x52180000\0" \
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"kernel_comp_size=0x8000000\0"
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#define CFG_EXTRA_ENV_SETTINGS \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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ENV_MEM_LAYOUT_SETTINGS \
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ROCKCHIP_DEVICE_SETTINGS \
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"boot_targets=" BOOT_TARGETS "\0"
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#endif /* __CONFIG_RK3576_COMMON_H */
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