forked from OERV-BSP/u-boot
f655090901
The clk-pll.h is going to be included in multiple files soon. Add
missing header guard to prevent possible build errors in future.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 166097e877 ("clk: exynos: add clock driver for Exynos7420 Soc")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
14 lines
346 B
C
14 lines
346 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Exynos PLL helper functions for clock drivers.
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* Copyright (C) 2016 Samsung Electronics
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* Thomas Abraham <thomas.ab@samsung.com>
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*/
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#ifndef __EXYNOS_CLK_PLL_H
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#define __EXYNOS_CLK_PLL_H
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unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq);
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#endif /* __EXYNOS_CLK_PLL_H */
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