forked from OERV-BSP/u-boot
Header definitions of Synopsys DWC DDR2/1 Memory Controller. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
Header definitions of Synopsys DWC DDR2/1 Memory Controller. Signed-off-by: Macpaul Lin <macpaul@andestech.com>