Lei Wen 0caac5f415 pantheon: define CONFIG_SYS_CACHELINE_SIZE ...

By default, on Pantheon SoC DCache Lnd ICache line
lengths are 32 bytes long

Signed-off-by: Lei Wen <leiwen@marvell.com>

2011-11-03 22:56:22 +01:00

..

config.h

pantheon: define CONFIG_SYS_CACHELINE_SIZE

2011-11-03 22:56:22 +01:00

cpu.h

ARM: pantheon: add mmc definition

2011-10-27 21:56:37 +02:00

mfp.h

ARM: pantheon: add mmc definition

2011-10-27 21:56:37 +02:00

pantheon.h

ARM: pantheon: add mmc definition

2011-10-27 21:56:37 +02:00