forked from OERV-BSP/u-boot
Proper U-Boot for Lichee Pi 4A now runs in S mode instead of M mode, which means the extra firmware, OpenSBI, must be built and integrated in the image, and the vendor U-Boot cannot chainload the result image anymore as it runs in M mode. Remove redundant information about chainloading and update build steps to mention OpenSBI firmware. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
129 lines
3.5 KiB
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129 lines
3.5 KiB
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.. SPDX-License-Identifier: GPL-2.0+
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Sipeed's Lichee PI 4A based on T-HEAD TH1520 SoC
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================================================
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The LicheePi4A is a high-performance RISC-V SBC based on TH1520(4xC910@1.85GHz),
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comes with 4/8/16 GB RAM, and up to 128GB eMMC, and rich peripherals.
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- SoC T-HEAD TH1520 SoC
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- System Memory 4GB, 8GB, or 16GB LPDDR4X
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- Storage eMMC flash with 8/32/128 GB
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- external microSD slot
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- Networking 2x Gigabit Ethernet
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- WiFi+BT
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- Display HDMI2.0, 4-lane MIPI DSI
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- Camera 4-lane MIPI CSI + 2x2-lane MIPI CSI
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- Audio Onboard Speaker, 2xMEMS MIC, 3.5mm headphone jack
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- USB 4xUSB3.0 Type-A, 1xUSB2.0 Type-C
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- GPIO 2x10Pin breakout, UART/IIC/SPI
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- Power DC 12V/2A, POE 5V/2.4A, USB Type-C 5V/2A
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TH1520 RISC-V SoC
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-----------------
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The TH1520 SoC consist of quad-core RISC-V Xuantie C910 (RV64GCV) processor,
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Xuantie C906 audio DSP, low power Xuantie E902 core, it also integrate
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Imagination GPU for graphics, and 4 TOPS NPU for AI acceleration.
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Mainline support
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----------------
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The support for following drivers are already enabled:
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1. ns16550 UART Driver.
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2. eMMC and SD card
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Building
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~~~~~~~~
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1. Add the RISC-V toolchain to your PATH.
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2. Setup ARCH & cross compilation environment variable:
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.. code-block:: none
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export CROSS_COMPILE=<riscv64 toolchain prefix>
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3. Build DDR firmware
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DDR driver requires a firmware to function, to build it:
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.. code-block:: bash
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git clone --depth 1 https://github.com/ziyao233/th1520-firmware
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cd th1520-firmware
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lua5.4 ddr-generate.lua src/<CONFIGURATION_NAME>.lua th1520-ddr-firmware.bin
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4. Build OpenSBI Firmware
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TH1520 port of proper U-Boot runs in S mode, thus OpenSBI is required as
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SBI firmware to setup S-mode environment and provide SBI calls. It could
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be cloned and built for TH1520 as below,
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.. code-block:: bash
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git clone https://github.com/riscv-software-src/opensbi.git
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cd opensbi
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make PLATFORM=generic
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TH1520 support in OpenSBI requires v1.2 or a more recent version.
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More detailed description of steps required to build fw_dynamic firmware
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is beyond the scope of this document. Please refer to OpenSBI
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documenation.
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5. Build U-Boot images
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The DDR firmware should be copied to U-Boot source directory before
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building.
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.. code-block:: bash
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cd <U-Boot-dir>
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cp <path-to-ddr-firmware> th1520-ddr-firmware.bin
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make th1520_lpi4a_defconfig
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make OPENSBI=<opensbi_dir>/build/platform/generic/firmware/fw_dynamic.bin
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This will generate u-boot-with-spl.bin, which contains SPL, DDR firmware,
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OpenSBI firmware and proper U-Boot.
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Booting
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~~~~~~~
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u-boot-with-spl.bin should be loaded to SRAM through fastboot. Connect
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the board to computer with Type-C cable and run
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.. code-block:: bash
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fastboot flash ram u-boot-with-spl.bin
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fastboot reboot
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Sample boot log from Lichee PI 4A board via fastboot
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: none
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[APP][E] protocol_connect failed, exit.
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Starting download of 940681 bytes
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downloading of 940681 bytes finished
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U-Boot SPL 2025.07-rc3-00005-g3a0ef515b8bb (May 29 2025 - 10:42:46 +0000)
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Trying to boot from RAM
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U-Boot 2025.07-rc3-00005-g3a0ef515b8bb (May 29 2025 - 10:42:46 +0000)
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CPU: thead,c910
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Model: Sipeed Lichee Pi 4A
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DRAM: 8 GiB
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Core: 110 devices, 9 uclasses, devicetree: separate
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MMC: mmc@ffe7080000: 0, mmc@ffe7090000: 1
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Loading Environment from <NULL>... OK
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In: serial@ffe7014000
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Out: serial@ffe7014000
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Err: serial@ffe7014000
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Model: Sipeed Lichee Pi 4A
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LPI4A=>
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