forked from OERV-BSP/u-boot
d3c597f08a
Binman looks for __image_copy_start to determine the base address of an entry if elf-base-sym isn't specified, which is missing in RISC-V port. This causes binman skips RISC-V SPL entries without filling addresses into its .binman_sym_table section. This patch defines __image_copy_start in linkerscript of both SPL and proper U-Boot to ensure binman_sym functions correctly with the default binman.dtsi. The paired symbol, __image_copy_end, is introduced as well for completeness. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Simon Glass <sjg@chromium.org>
59 lines
1.1 KiB
Plaintext
59 lines
1.1 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Based on arch/riscv/cpu/u-boot.lds, which is
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* Copyright (C) 2017 Andes Technology Corporation
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* Rick Chen, Andes Technology Corporation <rick@andestech.com>
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*
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* and arch/mips/cpu/u-boot-spl.lds.
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*/
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MEMORY { .spl_mem : ORIGIN = IMAGE_TEXT_BASE, LENGTH = IMAGE_MAX_SIZE }
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MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
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LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
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OUTPUT_ARCH("riscv")
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ENTRY(_start)
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SECTIONS
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{
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. = ALIGN(4);
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__image_copy_start = ADDR(.text);
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.text : {
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arch/riscv/cpu/start.o (.text)
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*(.text*)
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} > .spl_mem
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. = ALIGN(4);
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.rodata : {
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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} > .spl_mem
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. = ALIGN(4);
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.data : {
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*(.data*)
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} > .spl_mem
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. = ALIGN(4);
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__u_boot_list : {
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KEEP(*(SORT(__u_boot_list*)));
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} > .spl_mem
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. = ALIGN(4);
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.binman_sym_table : {
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__binman_sym_start = .;
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KEEP(*(SORT(.binman_sym*)));
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__binman_sym_end = .;
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} > .spl_mem
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_end = .;
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_image_binary_end = .;
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__image_copy_end = .;
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.bss : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(8);
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__bss_end = .;
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} > .bss_mem
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}
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