forked from OERV-BSP/u-boot
05240d541a
This patch cleans the vendor code of DDR initialization up, converts the driver to fit in DM framework and use a firmware[1] packaged by binman to ship PHY configuration. Currently the driver is only capable of initializing the controller to work with dual-rank 3733MHz LPDDR4, which is shipped by 16GiB variants of LicheePi 4A boards and I could test with. Support for other configurations could be easily added later. Link: https://github.com/ziyao233/th1520-firmware # [1] Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
6 lines
167 B
Plaintext
6 lines
167 B
Plaintext
config SPL_THEAD_TH1520_DDR
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bool "T-Head TH1520 DDR driver in SPL"
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depends on SPL_RAM && THEAD_TH1520
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help
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This enables DDR support for T-Head TH1520 platforms.
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