forked from OERV-BSP/u-boot
8e25e76fff
This commit adds support for the brcp1, brsmarc2, brcp150 and brcp170 boards. This boards are based on the Xilinx Zynq SoC. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20250404072819.69642-5-bernhard.messerklinger@br-automation.com Signed-off-by: Michal Simek <michal.simek@amd.com>
110 lines
2.6 KiB
Bash
110 lines
2.6 KiB
Bash
autoload=0
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b_break=0
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fpgastatus=disabled
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/* Memory variable */
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scradr=0xC0000
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fdtbackaddr=0x4000000
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loadaddr=CONFIG_SYS_LOAD_ADDR
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/* PREBOOT */
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preboot=run setupaddr_spi; run brdefaultip; run cfgscr; setenv bootstart 1
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/* SPI layout variables */
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cfg_addr=
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fdt get value cfgaddr_spi /binman/blob-ext@0 offset &&
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fdt get value cfgsize_spi /binman/blob-ext@0 size
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fpga_addr=
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fdt get value fpgaaddr_spi /binman/blob-ext@1 offset &&
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fdt get value fpgasize_spi /binman/blob-ext@1 size
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os_addr=
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fdt get value osaddr_spi /binman/blob-ext@2 offset &&
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fdt get value ossize_spi /binman/blob-ext@2 size
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dtb_addr=
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fdt get value dtbaddr_spi /binman/blob-ext@3 offset &&
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fdt get value dtbsize_spi /binman/blob-ext@3 size
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setupaddr_spi=
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fdt addr ${fdtcontroladdr};
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run dtb_addr; run os_addr;
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run fpga_addr; run cfg_addr
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/* IP setup */
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brdefaultip=
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if test -r ${ipaddr}; then;
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else
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setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254;
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setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0;
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fi
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/* Boot orders */
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b_tgts_std=mmc0 mmc1 spi usb0 usb1 net
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b_tgts_rcy=spi usb0 usb1 net
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b_tgts_pme=net usb0 usb1 mmc spi
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/* Boot targets */
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b_mmc0=
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run fpga; mmc dev 0; load mmc 0 ${loadaddr} arimg.itb &&
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run vxargs && bootm ${loadaddr}
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b_mmc1=
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run fpga; mmc dev 0; load mmc 0 ${loadaddr} arimg &&
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run vxargs &&
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sf read ${fdtbackaddr} ${dtbaddr_spi} ${dtbsize_spi} &&
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fdt addr ${fdtbackaddr} &&
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bootm ${loadaddr} - ${fdtbackaddr}
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b_spi=
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run fpga; sf read ${loadaddr} ${osaddr_spi} ${ossize_spi} &&
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run vxargs && bootm ${loadaddr}
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b_net=run fpga; tftp ${scradr} netscript.img && source ${scradr}
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b_usb0=usb start && load usb 0 ${scradr} usbscript.img && source ${scradr}
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b_usb1=usb start && load usb 0 ${scradr} bootscr.img && source ${scradr}
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/* FPGA setup */
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fpga=
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setenv fpgastatus disabled;
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sf read ${loadaddr} ${fpgaaddr_spi} ${fpgasize_spi} &&
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fpga loadb 0 ${loadaddr} ${fpgasize_spi} &&
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setenv fpgastatus okay
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/* Configuration preboot*/
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cfgscr=
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sf probe &&
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sf read ${scradr} ${cfgaddr_spi} ${cfgsize_spi} &&
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source ${scradr}
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/* OS Boot */
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fdt_fixup=
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run cfgscr; run vxfdt
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vxargs=
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setenv bootargs gem(0,0)host:vxWorks h=${serverip}
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e=${ipaddr}:${netmask} g=${gatewayip} u=vxWorksFTP pw=vxWorks f=0x1
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vxfdt=
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fdt set /fpga/pci status ${fpgastatus};
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fdt set /fpga status ${fpgastatus}
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/* Boot code */
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b_default=
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run b_deftgts;
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for target in ${b_tgts}; do
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run b_${target};
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if test ${b_break} = 1; then;
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exit;
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fi;
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done
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b_deftgts=
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if test ${b_mode} = 12; then
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setenv b_tgts ${b_tgts_pme};
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elif test ${b_mode} = 0; then
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setenv b_tgts ${b_tgts_rcy};
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else
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setenv b_tgts ${b_tgts_std};
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fi
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