forked from OERV-BSP/u-boot
5fe9ced355
Introduce the SoC-specific code and corresponding Kconfig entries for TH1520 SoC. Following features are implemented for TH1520, - Cache enable/disable through customized CSR - Invalidation of customized PMP entries - DRAM driver probing for SPL Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
11 lines
222 B
C
11 lines
222 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (C) 2025 Yao Zi <ziyao@disroot.org>
|
|
*/
|
|
#ifndef _ASM_ARCH_TH1520_SPL_H_
|
|
#define _ASM_ARCH_TH1520_SPL_H_
|
|
|
|
void spl_dram_init(void);
|
|
|
|
#endif // _ASM_ARCH_TH1520_SPL_H_
|