forked from OERV-BSP/u-boot
7a5170a6fc
The cpu_sunxi_ncat2.h header file contains addresses of some peripherals that are needed for the SPL, for chips that belong to the "NCAT2" generation. The Allwinner A523 is a member of this group, but a few addresses differ, and we need a few more addresses, for playing with the core reset, for instance. Add the new addresses needed for the A523 and guard existing definitions that conflict with that new chip. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
60 lines
1.5 KiB
C
60 lines
1.5 KiB
C
/*
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* (C) Copyright 2022 Arm Limited
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SUNXI_CPU_SUNXI_NCAT2_H
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#define _SUNXI_CPU_SUNXI_NCAT2_H
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#define SUNXI_CCM_BASE 0x02001000
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#define SUNXI_TIMER_BASE 0x02050000
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#define SUNXI_TWI0_BASE 0x02502000
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#define SUNXI_TWI1_BASE 0x02502400
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#define SUNXI_TWI2_BASE 0x02502800
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#define SUNXI_TWI3_BASE 0x02502C00
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#define SUNXI_SRAMC_BASE 0x03000000
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/* SID address space starts at 0x03006000, but e-fuse is at offset 0x200 */
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#define SUNXI_SIDC_BASE 0x03006000
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#define SUNXI_SID_BASE 0x03006200
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#define SUNXI_GIC400_BASE 0x03020000
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#ifdef CONFIG_MACH_SUN55I_A523
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#define SUNXI_DRAM_COM_BASE 0x03120000
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#define SUNXI_DRAM_CTL0_BASE 0x03130000
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#define SUNXI_DRAM_PHY0_BASE 0x03140000
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#endif
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#define SUNXI_MMC0_BASE 0x04020000
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#define SUNXI_MMC1_BASE 0x04021000
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#define SUNXI_MMC2_BASE 0x04022000
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#ifndef CONFIG_MACH_SUN55I_A523
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#define SUNXI_R_CPUCFG_BASE 0x07000400
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#endif
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#define SUNXI_PRCM_BASE 0x07010000
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#define SUNXI_R_WDOG_BASE 0x07020400
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#ifdef CONFIG_MACH_SUN55I_A523
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#define SUNXI_R_CPUCFG_BASE 0x07050000
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#endif
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#define SUNXI_R_TWI_BASE 0x07081400
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#define SUNXI_RTC_BASE 0x07090000
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#ifdef CONFIG_MACH_SUN55I_A523
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#define SUNXI_CPUCFG_BASE 0x08815000
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#else
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#define SUNXI_CPUCFG_BASE 0x09010000
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#endif
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#define SUNXI_CPU_PLL_CFG_BASE 0x08817000
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#ifndef __ASSEMBLY__
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void sunxi_board_init(void);
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void sunxi_reset(void);
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int sunxi_get_sid(unsigned int *sid);
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#endif
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#endif /* _SUNXI_CPU_SUNXI_NCAT2_H */
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