forked from OERV-BSP/u-boot
5c8e1d0dda
Add a rk3528-u-boot.dtsi extending the basic dts/upstream rk3528.dtsi with bare minimum nodes to have a booting system from eMMC and SD-card. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
149 lines
2.0 KiB
Plaintext
149 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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};
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chosen {
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u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
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};
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dmc {
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compatible = "rockchip,rk3528-dmc";
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bootph-all;
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};
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soc {
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rng: rng@ffc50000 {
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compatible = "rockchip,rkrng";
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reg = <0x0 0xffc50000 0x0 0x200>;
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};
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otp: nvmem@ffce0000 {
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compatible = "rockchip,rk3528-otp";
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reg = <0x0 0xffce0000 0x0 0x4000>;
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};
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sdmmc: mmc@ffc30000 {
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compatible = "rockchip,rk3528-dw-mshc",
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"rockchip,rk3288-dw-mshc";
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reg = <0x0 0xffc30000 0x0 0x4000>;
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clocks = <&cru HCLK_SDMMC0>, <&cru CCLK_SRC_SDMMC0>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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max-frequency = <150000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>,
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<&sdmmc_det>;
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resets = <&cru SRST_H_SDMMC0>;
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reset-names = "reset";
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rockchip,default-sample-phase = <90>;
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status = "disabled";
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};
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};
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};
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&cru {
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bootph-all;
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};
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&emmc_bus8 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&emmc_clk {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&emmc_cmd {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&emmc_strb {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&gmac0_clk {
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bootph-all;
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};
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&ioc_grf {
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bootph-all;
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};
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&otp {
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bootph-some-ram;
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};
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&pcfg_pull_none {
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bootph-all;
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};
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&pcfg_pull_up {
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bootph-all;
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};
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&pcfg_pull_up_drv_level_2 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&pinctrl {
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bootph-all;
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};
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&sdhci {
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bootph-pre-ram;
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bootph-some-ram;
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u-boot,spl-fifo-mode;
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};
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&sdmmc {
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bootph-pre-ram;
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bootph-some-ram;
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u-boot,spl-fifo-mode;
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};
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&sdmmc_bus4 {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_clk {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_cmd {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&sdmmc_det {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&uart0 {
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bootph-all;
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clock-frequency = <24000000>;
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};
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&uart0m0_xfer {
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bootph-pre-sram;
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bootph-pre-ram;
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};
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&xin24m {
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bootph-all;
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};
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