forked from OERV-BSP/u-boot
612421af51
The commit e8a9521e64
("vf500/vf610: synchronise device trees with linux")
has synchronized U-Boot's DTS with v5.19 Linux kernel.
It turned out that in Linux's upstream iomuxc node description the
'fsl,mux_mask' was missing, so the U-Boot's pinctrl driver for NXP's
Vybrid SoC was not working properly.
As by default the mux mask was set to 0, for example the vf610 based
boards (like BK4) were bricked, due to misconfiguration of gpio at
early boot stage.
The fix for all NXP eligible boards is to define .mux_mask field for
soc specific *pinctrl_soc_info structure and use it directly in pinctrl
MMIO driver, without the need to read the "fsl,mux_mask" property from
device tree.
This change brings the NXP's pinctrl driver in U-Boot closer to Linux
upstream one.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com> #for i.MX8ULP
270 lines
5.8 KiB
Plaintext
270 lines
5.8 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2022
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* Author(s): Jesse Taube <Mr.Bossman075@gmail.com>
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* Giulio Benetti <giulio.benetti@benettiengineering.com>
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*/
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#include "armv7-m.dtsi"
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/imxrt1170-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/memory/imxrt-sdram.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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gpio4 = &gpio5;
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gpio5 = &gpio6;
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gpio6 = &gpio7;
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gpio7 = &gpio8;
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gpio8 = &gpio9;
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gpio9 = &gpio10;
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gpio10 = &gpio11;
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gpio11 = &gpio12;
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gpio12 = &gpio13;
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mmc0 = &usdhc1;
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serial0 = &lpuart1;
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};
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clocks {
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osc: osc {
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compatible = "fsl,imx-osc", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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};
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rcosc16M: rcosc16M {
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compatible = "fsl,imx-osc", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <16000000>;
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};
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osc32k: osc32k {
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compatible = "fsl,imx-osc", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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soc {
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semc: semc@400d4000 {
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compatible = "fsl,imxrt-semc";
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reg = <0x400d4000 0x4000>;
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interrupts = <132>;
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clocks = <&clks IMXRT1170_CLK_SEMC>;
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pinctrl-0 = <&pinctrl_semc>;
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pinctrl-names = "default";
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status = "okay";
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};
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lpuart1: serial@4007c000 {
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compatible = "fsl,imxrt-lpuart";
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reg = <0x4007c000 0x4000>;
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interrupts = <20>;
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clocks = <&clks IMXRT1170_CLK_LPUART1>;
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clock-names = "per";
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status = "disabled";
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};
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iomuxc: iomuxc@400e8000 {
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compatible = "fsl,imxrt-iomuxc";
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reg = <0x400e8000 0x4000>;
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};
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anatop: anatop@40c84000 {
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compatible = "fsl,imxrt-anatop";
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reg = <0x40c84000 0x4000>;
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};
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clks: ccm@40cc0000 {
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compatible = "fsl,imxrt1170-ccm";
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reg = <0x40cc0000 0x4000>;
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#clock-cells = <1>;
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};
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usdhc1: usdhc@40418000 {
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compatible = "fsl,imxrt-usdhc";
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reg = <0x40418000 0x10000>;
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interrupts = <133>;
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clocks = <&clks IMXRT1170_CLK_USDHC1>;
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clock-names = "per";
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bus-width = <4>;
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fsl,tuning-start-tap = <20>;
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fsl,tuning-step= <2>;
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status = "disabled";
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};
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gpio1: gpio@4012c000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x4012c000 0x4000>;
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interrupts = <100>,
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<101>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@40130000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40130000 0x4000>;
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interrupts = <102>,
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<103>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@40134000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40134000 0x4000>;
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interrupts = <104>,
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<105>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@40138000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40138000 0x4000>;
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interrupts = <106>,
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<107>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio5: gpio@4013c000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x4013c000 0x4000>;
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interrupts = <108>,
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<109>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio6: gpio@40140000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40140000 0x4000>;
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interrupts = <61>,
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<62>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio7: gpio@40c5c000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40c5c000 0x4000>;
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interrupts = <99>,
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<99>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio8: gpio@40c60000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40c60000 0x4000>;
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interrupts = <99>,
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<99>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio9: gpio@40c64000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40c64000 0x4000>;
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interrupts = <99>,
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<99>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio10: gpio@40c68000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40c68000 0x4000>;
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interrupts = <99>,
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<99>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio11: gpio@40c6c000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40c6c000 0x4000>;
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interrupts = <99>,
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<99>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio12: gpio@40c70000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40c70000 0x4000>;
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interrupts = <61>,
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<62>; // only cm4
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio13: gpio@40ca0000 {
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compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
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reg = <0x40ca0000 0x4000>;
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interrupts = <93>,
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<93>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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flexspi1: spi@400cc000 {
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compatible = "nxp,imxrt1170-fspi";
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reg = <0x400cc000 0x800>, <0x30000000 0x10000000>;
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reg-names = "fspi_base", "fspi_mmap";
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <130>;
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clocks = <&clks IMXRT1170_CLK_DUMMY>,
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<&clks IMXRT1170_CLK_FLEXSPI1>;
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clock-names = "fspi_en", "fspi";
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status = "disabled";
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};
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gpt1: gpt1@400ec000 {
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compatible = "fsl,imxrt-gpt";
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reg = <0x400ec000 0x4000>;
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interrupts = <119>;
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clocks = <&clks IMXRT1170_CLK_GPT1>;
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status = "disabled";
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};
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};
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};
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