forked from OERV-BSP/u-boot
ff6e20c32f
Describe the newly-supported clock controller of TH1520 in SoC devicetree, replace dummy clocks with the controller-supplied ones and add correct clocks for GPIO controllers. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
46 lines
674 B
Plaintext
46 lines
674 B
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
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*/
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/dts-v1/;
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#include "th1520.dtsi"
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/ {
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model = "Sipeed Lichee Module 4A";
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compatible = "sipeed,lichee-module-4a", "thead,th1520";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x00000000 0x2 0x00000000>;
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bootph-pre-ram;
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};
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};
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&osc {
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clock-frequency = <24000000>;
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};
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&osc_32k {
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clock-frequency = <32768>;
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};
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&emmc {
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bus-width = <8>;
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max-frequency = <198000000>;
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mmc-ddr-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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non-removable;
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no-sdio;
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no-sd;
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status = "okay";
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};
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&sdio0 {
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bus-width = <4>;
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max-frequency = <198000000>;
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status = "okay";
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};
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