Line 171 in README is describing that before relocation
no code should use global variable because global variables
are placed to BSS section which is initialized to 0 after
relocation.
On Versal platforms clock driver is initialized before
relocation (via using dm,bootph-all flag in DT) and global
variables are initialized which works if this is used only
before relocation. But the variables are used after
relocation too but values are zeroed which is ending up
incorrect behavior.
That's why place variables to data section to ensure that
values are not cleared which is for now the quickest
temporary solution. The correct way to do it is to move
all global variables to private data to avoid it.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
These two files were using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pin count wasn't updated when the special pins were added, as a
result it was never possible to configure the special pins on SM8250
boards.
Fix the pin count and allow the special pins to be configured. This
fixes sdcard support on the RB5.
Fixes: 58fa520424 ("pinctr: qcom: sm8250: add special pins pins configuration data")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Add a stub clock driver which can be used to bind clock controllers
which aren't required for the platform to boot, but which are needed for
U-Boot drivers to work.
In addition, add a NOP parent driver to allow for binding the parent
nodes of the clock.
Initially this driver supports a Qualcomm platform where the MMC driver
tries to fetch the RPM clock controller, which is not actually required
for the device to work.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51
section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT
should not be used to determine device size, and instead device size
should be calculated from C_SIZE and C_SIZE_MULT.
This is not exactly accurate, the 2 GiB limit is not a hard line,
there are eMMC devices which are smaller than 2 GiB and still
require device size to be determined from EXT_CSD SEC_COUNT. The
hard line is instead OCR HCS bit, which indicates whether the device
is byte or sector addressed, the former applies to most devices
below 2 GiB, and the later applies mostly to devices above 2 GiB.
However, there are a couple of devices which are smaller than 2 GiB
and still set the OCR HCS bit to indicate they are sector addressed,
and therefore the size calculation for those devices should also
use EXT_CSD SEC_COUNT . Use mmc->high_capacity flag to discern the
devices instead of arbitrary 2 GiB limit. The mmc->high_capacity flag
reflects the OCR HCS bit state.
Fixes: 639b7827d1 ("mmc: fix the condition for MMC version 4")
Signed-off-by: Marek Vasut <marex@denx.de>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.
Change to disable RX and/or TX delay and using zero as delay value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.
Change to disable RX and/or TX delay and using zero as delay value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width,
correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is
recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7
pinmux data to rk3328_mux_recalced_data as mux register offset for these
pins does not follow rockchip convention.
This matches changes in following Linux commits:
- e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins")
- 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins")
- 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As per TRM[0] Section 8.7.1 "TPS6594-Q1 Registers", LDOx_Vout
bit 6-1, define the NVM voltage settings.
Along side table 8-4 of above TRM, shows voltage to value mapping.
Driver wrongly using bits 5-1 to calculate voltage, and to convert
voltage to value driver was using buck's calculation.
So fix those calculation.
[0]: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf
Fixes: 5d7dbd22cf ("power: regulator: tps65941: use function callbacks for conversion ops")
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
The struct contains an iomem pointer that we later remap and update.
Remove const from the struct definition.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Pin detection on t20 depends on node name. With recent changes
in node naming, let's remove '_' to be safe about both '_' or
'-' use.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Bind SYSRESET child to parent node since it does not have
its own node in the device tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Bind GPIO and SYSRESET children to parent node since they
do not have their own nodes in the device tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Requesting of PMIC's GPIO child should be done by binding
GPIO driver to PMIC's node is GPIO driver does not have
its own node.
This reverts commit c03cd98d1a.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
u-boot-dfu-20250211:
CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24556
Android:
- Handle boot images with missing DTB
Usb gadget:
- Fix nullptr in g_dnl when serial# is unset
- Add missing schedule() in f_mass_storage gadget
- Add support for STih407 in dwc3-generic
- Fix usb clocks on STih407
- Migrate STih407 to DM_USB_GADGET
emul_rtc_probe() is not called from anywhere else that's why make it
static. Issue is reported by build with W=1.
Signed-off-by: Michal Simek <michal.simek@amd.com>
This patch add support to read register base address by name if
provided.
Also devfdt_get_addr_* is changed to dev_read_addr_* to support DT
live tree.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The reg-names in mt7988.dtsi have no _base suffix. Remove the suffix
will also make it match upstream linux format.
Fixes: 8c2cb748ef (pinctrl: mediatek: mt7988: rename reg-names to upstream linux format)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Heiko Schocher <hs@denx.de> says:
In linux we have the option to create the name of a led
optionally through the following properties:
- function
- color
- function-enumerator
This series adds support for parsing this properties if there
is no label property.
Link: https://lore.kernel.org/r/20250128135246.74838-1-hs@denx.de
[trini: Document name parameter in led.h]
in linux we have the option to create the name of a led
optionally through the following properties:
- function
- color
- function-enumerator
This patch adds support for parsing this properties if there
is no label property.
The led name is created in led_post_bind() and we need some
storage place for it. Currently this patch prevents to use
malloc() instead it stores the name in new member :
char name[LED_MAX_NAME_SIZE];
of struct led_uc_plat. While at it append led tests for the
new feature.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fixes annoying warnings of the following type when built with W=1 (for
each file including fpga.h):
CC drivers/fpga/fpga.o
In file included from /mnt/data/adahl/src/u-boot/include/xilinx.h:7,
from /mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:10:
/mnt/data/adahl/src/u-boot/include/fpga.h:61:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
61 | const fpga_desc *const fpga_get_desc(int devnum);
| ^~~~~
/mnt/data/adahl/src/u-boot/include/fpga.h:81:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
81 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:36:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
36 | const fpga_desc *const fpga_get_desc(int devnum)
| ^~~~~
/mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:53:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers]
53 | const fpga_desc *const fpga_validate(int devnum, const void *buf,
| ^~~~~
Do some type and cast cleanup on that fpga_desc type while at it.
Link: https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#index-Wignored-qualifiers
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20250121162213.1477506-1-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Update the debug() print, use __func__ to always print matching
function name, and also print bus name in case there are multiple
busses.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Explicitly flush icache on the CR52 core before jumping to the next
stage software to make sure it does not contain any invalid content.
Explicitly flash and invalidate dcache on the CA76 core both over the
trampoline buffer and over the CR52 firmware, and then trigger full
system synchronization, to make sure the data surely land in DRAM,
from where the CR52 can surely pick them up.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Christian Marangi <ansuelsmth@gmail.com> says:
This is the last batch of part to push actual support of
OF_UPSTREAM for the mediatek SoC.
The plan is to make the current downstream DTS on part with
upstream implementation so we can permit a gradual transition to
it while we don't cause any regression to any user.
This is to have the same node downstream and upstream.
Mediatek is working hard upstream to also push all the remaining
nodes.
All patch are the final changes after the pinctrl patch
merged previously.
All patch pass CI tests
Link: https://github.com/u-boot/u-boot/pull/731
Link: https://lore.kernel.org/r/20250127134046.26345-1-ansuelsmth@gmail.com
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
VPL may want to use driver model for MMC even if TPL does not. Update
the rule in this driver to support that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This patch fixed the following coding style suggested by checkpatch.pl:
1. Use tab instead of space
2. Use BIT() instead of <<
3. Use mdelay for long time delay
4. Remove useless parenthesises
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The SCSI specification originally required that the second
Command Data Byte contain the LUN value in its high-order bits,
but this field has been marked as reserved since the SCSI-3 spec
from 1996.
Some vendors uses this byte to pass vendor specific data,
and specifying the LUN can trigger strange behaviors.
For the record, this happened on an UFS device where LUN0 was
working perfectly and reading the other LUNs would get the last
buffer data that was read for LUN0, making this issue very very
hard to debug.
It's sane to assume U-Boot will probably never encounter
an SCSI-2 multi-LUN device, if somehow it happens the enquiry
command would need to get the SCSI level to handle this case.
The Linux fix was added in [1] to fix the exact same issue.
[1] https://lore.kernel.org/all/Pine.LNX.4.44L0.1409021108380.2308-100000@iolanthe.rowland.org/
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
- Fixes for stm32prog
- Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
- Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
- Clean env_get_location() for STM32MP1
- Fix board_get_usable_ram_top() to fix infinite loop in cache
management for STM32MP2.
- Fix ck_flexgen_08 frequency for STM32MP2
STM32 MCU:
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
If CONFIG_SYS_64BIT_LBA is enable, following compilation warning is
triggered:
CC drivers/fastboot/fb_mmc.o
../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_erase_mmc_hwpart':
../drivers/fastboot/fb_mmc.c:215:35: warning: format '%lu' expects
argument of type 'long unsigned int', but argument 2 has type
'long long unsigned int' [-Wformat=]
215 | printf("........ erased %lu bytes from mmc hwpart[%u]\n",
| ~~^
| |
| long unsigned int
| %llu
216 | dev_desc->lba * dev_desc->blksz, dev_desc->hwpart);
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| |
| long long unsigned int
../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_boot_ops':
../drivers/fastboot/fb_mmc.c:261:42: warning: format '%lu' expects
argument of type 'long unsigned int', but argument 2 has type
'long long unsigned int' [-Wformat=]
261 | printf("........ wrote %lu bytes to EMMC_BOOT%d\n",
| ~~^
| |
| long unsigned int
| %llu
262 | blkcnt * blksz, hwpart);
| ~~~~~~~~~~~~~~
| |
| long long unsigned int
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Some dt-binding headers mask the upstream ones which can lead to build
failures, or worse: super weird bugs, if they get out of sync.
Remove these headers so our devicetree and binding headers will both be
in sync with upstream.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The TI DP83822 does have support for configurable RGMII RX/TX clock
shift, add support for parsing DT properties which describe the RX/TX
clock shift configuration and configuration of the matching bits in
RCSR register.
The shift is only configurable on DP83822, the other PHYs supported
by this PHY driver, namely DP83825/DP83826 variants, do not implement
this functionality and the RCSR bits used to configure the clock shift
are missing from those PHYs.
The shift is configurable separately for RX and TX path. Each path can
either enable the shift or disable the shift using single bit. In case
the shift is disabled, a delay of 0ns is added to the path, otherwise
a delay of 3.5ns is added to the path.
Note that the two RCSR bits 11 and 12 have inverted logic, RCSR bit 12
enables RX internal shift when SET, while RCSR bit 11 enables TX shift
when UNSET.
Signed-off-by: Marek Vasut <marex@denx.de>
Weijie Gao <weijie.gao@mediatek.com> says:
This patch series add support for MediaTek MT7987 SoC with its reference
boards and related drivers.
This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for these
boards. The clock, pinctrl drivers and the SoC initializaton code are also
included.
Link: https://lore.kernel.org/r/cover.1737621362.git.weijie.gao@mediatek.com
