The Allwinner A100 SoC has been around for a while, mostly on cheap
tablets, but didn't generate much interest in the community so far.
There were some efforts by two Allwinner employees in 2020, which led
to basic upstream Linux support for that SoC, although this momentum
dried up pretty quickly, leaving a lot of peripherals unsupported.
The A100 was silently replaced with the seemingly identical Allwinner
A133, which is reportedly a better bin of the A100. So far we assume
that both are compatible from a software perspective. There are some
more devices with the A133 out there now, so people are working on
filling the gaps, and adding U-Boot (and TF-A) support.
Based on the just added pinctrl, clock and DRAM support, this adds the
missing bits, mostly addresses and values for the SPL.
The A133 seems to be an predecessor to the H6, so we can share a lot of
code with that (and the H616 code), and just need to adjust some details.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
On several RISC-V boards we have seen that 1 MiB is a insufficient value
for CONFIG_SPL_SYS_MALLOC_SIZE.
For instance qemu-riscv32_spl_defconfig fails booting because u-boot.itb
exceeds 1 MiB.
8 MiB is a reasonable value that allows adding FPGA blobs or splash images
to main U-boot.
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The formatting with %pa / %pap behaves like %x, which results in an
incorrect value being output. To improve this, a new fine-tuning
Kconfig SPL_USE_TINY_PRINTF_POINTER_SUPPORT for pointer formatting
has been added. If it is enabled, the output of %pa / %pap should
be correct, and if it is disabled, the pointer formatting is
completely unsupported. In addition to indicate unsupported formatting,
'?' will be output. This allows enabling pointer formatting only
when needed. For SPL_NET it is selected by default. Then it also
supports the formatting with %pm, %pM and %pI4.
In summery this level of %p support for tiny printf is possible now:
1) The standard tiny printf won't have support for pointer formatting.
So it doesn't print misleading values for %pa, instead '?' will be
output:
%p => ?
%pa => ?a
%pap => ?ap
2) If SPL_USE_TINY_PRINTF_POINTER_SUPPORT is enabled or DEBUG is defined
tiny printf supports formatting %p and %pa / %pap.
3) If SPL_NET is enabled the support of pointers is extended
for %pm, %pM and %pI4.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Commit 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options") breaks
the boot of the BSH SMM S2 board. As stated in the commit itself, "Some
boards use this value even though MMC is not enabled in SPL, for example
imx8mn_bsh_smm_s2".
Support load of the U-Boot image from raw NAND sector. This is equivalent
to load from MMC raw sector.
Fixes: 2a00d73d08 ("spl: mmc: Try to clean up raw-mode options")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Almost all Rockchip boards use the same Kconfig value for SPL_PAD_TO,
0x7f8000.
u-boot-rockchip.bin is typically written to offset 64S (32KiB) of MMC
media. u-boot.itb (or u-boot.img) is typically expected at offset 16384S
(8MiB) of MMC media (SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000).
SPL_PAD_TO is used as the offset for u-boot.itb (or u-boot.img) in the
generated simple-bin binman image, and can be calculated as:
SPL_PAD_TO = (16384S - 64S) * 512 = 0x7f8000
Add this value as a default value for ARCH_ROCKCHIP.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
When SPL loading image to secure region, for example, ATF and tee to
DDR secure region. Because the USDHC controller is non-secure master,
it can't access this region and will cause loading issue.
So use a trampoline buffer in non-secure region, then use CPU to copy the
image from trampoline buffer to destination secure region.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
SPL_TEXT_BASE is used as the load address for the main domain SPL on k3
platforms.
Since the config value is the same for every board, this patch sets the
value 0x80080000 as default for all 64-bit ARCH_K3, 0x43c00000 as
default for the R5 cores and deletes the instances of SPL_TEXT_BASE in
individual defconfigs.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. However, it also works as intended
because SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is the default option
within that choice statement. To guard against future regressions, make
the choice statement in common/spl/Kconfig have an explicit default if
MVEBU_SPL_BOOT_DEVICE_MMC.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
CFG_SYS_SPI_* are used in falcon boot to specify the offsets and size of
the respective payloads. This patch moves them to Kconfig keeping the
values consistent for each of the affected boards.
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reorder the Kconfig defaults for the maximum SPL size, to make the
Allwinner specific values more readable and extensible: many older SoCs
need to be limited to 32KB, so make this the last ARCH_SUNXI entry, used
as a fallback unless explicitly overridden before.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
At present there is a hex value SPL_STACK which both determines whether
SPL has its own initial stack and the hex value of that stack.
Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending
on that and only providing the latter.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync defconfig files]
Judith Mendez <jm@ti.com> says:
Some K3 devices like am62x and am64x have a M4 processor in the MCU
voltage domain. This patch series introduces remoteproc M4 driver which
will be used to load firmware into and start the M4 remote core.
This series also adds support for R5F cores on am64x SoCs in patch 2 and
sets up environment to load FW in remote cores in patch 3,4,5.
This patch series also enables remoteproc drivers by default as per what
remoteproc sybsystem is supported per SoC, thus all remoteproc options
are now deleted in configs/* since they are no longer required.
This patch series was tested on am64x EVM, am62x SK, am62ax SK,
am62px SK boards.
Any additional tested by's are welcome since I was not able to
test any additional boards.
Tested by running the following commands in u-boot prompt:
=> setenv dorprocboot 1
=> run boot_rprocs
Link: https://lore.kernel.org/r/20250210202944.1071931-1-jm@ti.com
If building for v7R and K3 architecture, enable SPL
remoteproc so that it does not have to be defined in each
board defconfig file.
Signed-off-by: Judith Mendez <jm@ti.com>
When one xPL phase wants to jump to the next, the next phase must be
loaded into its required address. This means that the TEXT_BASE for the
two phases must be different and there cannot be any memory overlap
between the code used by the two phases. It also can mean that phases
need to be moved around to accommodate any size growth.
Having two xPL phases in SRAM at the same time can be tricky if SRAM
is limited, which it often is. It would be better if the second phase
could be loaded somewhere else, then decompressed into place over the
top of the first phase.
Introduce a relocating jump for xPL to support this. This selects a
suitable place to load the (typically compressed) next phase, copies
some decompression code out of the first phase, then jumps to this code
to decompress and start the next phase.
This feature makes it much easier to support Verified Boot for Embedded
(VBE) on RK3399 boards, which have 192KB of SRAM.
Signed-off-by: Simon Glass <sjg@chromium.org>
The FIT name in RISC-V Falcon mode should be different from that in
normal boot mode; it is called linux.itb. If the setting is missing
in common/spl, the normal boot file name will be used.
Signed-off-by: Randolph <randolph@andestech.com>
If BIOSEMU is compiled for RISC-V (SiFive Unmatched board) and the function
dm_pci_run_vga_bios() is executed, U-Boot stops with error message saying
that the SPL malloc pool is too small. So increase the default pool size
when both BIOSEMU and RISCV parameters are set.
Signed-off-by: Yuri Zaporozhets <yuriz@qrv-systems.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Move i.MX7 TEXT_BASE/SPL_TEXT_BASE to Kconfig and common/spl/Kconfig
which is the best practice.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Select default U-Boot and SPL text base for the i.MX6 SoC. The U-Boot
and SPL text base is picked as the one used by various i.MX6 boards.
Update all the boards.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Prepare the introduction of the lwIP (lightweight IP) TCP/IP stack by
adding a new net/lwip/ directory and the NET_LWIP symbol. Network
support is either NO_NET, NET (legacy stack) or NET_LWIP. Subsequent
commits will introduce the lwIP code, re-work the NETDEVICE integration
and port some of the NET commands and features to lwIP.
SPL_NET cannot be enabled when NET_LWIP=y. SPL_NET pulls some symbols
that are part of NET (such as arp_init(), arp_timeout_check(),
arp_receive(), net_arp_wait_packet_ip()). lwIP support in SPL may be
added later.
Similarly, DFU_TFTP and FASTBOOT are not compatible with NET_LWIP
because of dependencies on net_loop(), tftp_timeout_ms,
tftp_timeout_count_max and other NET things. Let's add a dependency on
!NET_LWIP for now.
SANDBOX can select NET_LWIP but doing so will currently disable the eth
dm tests as well as the wget tests which have strong dependencies on the
NET code.
Other adjustments to Kconfig files are made to fix "unmet direct
dependencies detected" for USB_FUNCTION_SDP and CMD_FASTBOOT when
the default networking stack is set to NET_LWIP ("default NET_LWIP"
instead of "default NET" in Kconfig).
The networking stack is now a choice between NO_NET,
NET and NET_LWIP. Therefore '# CONFIG_NET is not set' should be
'CONFIG_NO_NET=y'. Adjust the defconfigs accordingly.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Oliver Gaskell <Oliver.Gaskell@analog.com> says:
ADSP-SC5xx is a series of ARM-based DSPs.
This comprises the armv7 based SC57x, SC58x and SC594 series, and the
armv8 based SC598.
This patch series includes configurations, init code, and minimal DTs
to enable Analog Devices' evaluation boards for these SoCs to boot
through SPL and into U-Boot Proper, as well as devicetree schemas for
the added DTs.
This patch series depends on ("arm: Add Analog Devices SC5xx Machine
Type") (https://lists.denx.de/pipermail/u-boot/2024-April/552043.html)
Adds support for Analog Devices' SC594-SOM-EZLITE board. Includes:
- Board specific configs in mach-sc5xx/Kconfig
- Board-specific Kconfig and environment in board/adi/
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
The primary upstream URL for tf-a has moved, in some cases
things like tags are not always pushed to the old URL so
update the URLs to the primary upstream project URL.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Make SPL_RAM_SUPPORT a hidden Kconfig symbol, automatically selected
by SPL_RAM_DEVICE or SPL_DFU. Avoids the situation where SPL_RAM_SUPPORT
may be enabled without the other two being enabled, which results in the
following build warning:
common/spl/spl_ram.c:19:14: warning: ‘spl_ram_load_read’ defined but not used [-Wunused-function]
19 | static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector,
| ^~~~~~~~~~~~~~~~~
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Make the raw-mode options depend on SPL_SYS_MMCSD_RAW_MODE in a more
direct way. This makes it easier to understand the options with
'make menuconfig'.
There are three different ways of specifying the offset:
- sector offset
- partition number
- partition type
So make these a choice, so it is more obvious what is going on.
Update existing boards to enable SPL_SYS_MMCSD_RAW_MODE where needed.
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
This is extending commit da96f93cda ("spl: binman: Disable u_boot_any
symbols for i.MX93 boards") to i.MX 8ULP boards.
Signed-off-by: Gary Bisson <bisson.gary@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The maximum SPL size was defined to the same value in each OMAP3
board defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
The SPL text base was defined to the same value in each OMAP3 board
defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
AMD/Xilinx changes for v2024.10-rc1
common:
- spl: Introduce SoC specific init function
xilinx:
- Enable FF-A and NVMEM
- Rename spl_board_init() to spl_soc_init()
zynqmp:
- DT alignments
- Enable reset from SPL
- Enable USB3 for KD240
- Align multiboot register on Kria for proper reboot
- Allow multiboot environment write even in saved environment
- Move zynqmp commands from board/ to arch/
- Clean up xilinx_zynqmp.h
versal:
- Do not prioritize boot device if driver is not enabled
versal-net:
- Setup location for redundant variables in SPI
versal2:
- Add support for new SOC
mmc:
- Fix tap delay for SD on Versal NET
spi:
- Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part
gpio:
- Cover MODEPIN firmware dependency
As this is an SPL related driver, and in SPL enabling SPL_BLK is
optional, make this depend on the correct symbol.
Signed-off-by: Tom Rini <trini@konsulko.com>
All ARCH_K3 platforms need about of 2MB of malloc space post
reallocation. Since, this space is allocated from SDRAM, provide a
generous 2MB space by default.
Platforms requiring more than 2MB can override in defconfig as needed.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
In Falcon Boot mode, the fdt blob should be move to the RAM from
kernel BSS section. To avoid being cleared by BSS initialisation.
SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies.
Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Now that 32-bit SoCs can load U-Boot proper (and possibly other firmware)
from a FIT, people can use that by enabling CONFIG_SPL_LOAD_FIT.
However SPL_FIT_IMAGE_TINY is required to stay within the 24 or 32 KiB
SPL size limit on early SoCs; for consistency, enable it everywhere.
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: drop unconditional FIT image enablement for all SoCs]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Starting with H6, Allwinner removed the artificial 32 KiB SPL size limit
from the boot ROM. Now SPL size is only limited by the available SRAM.
This limit ranges from 152 KiB on H6 to a whopping 2052 KiB on R329. To
take advantage of this additional space, we must increase SPL_MAX_SIZE.
Since we do not want to unnecessarily pad SPL out to these giant sizes,
we must set SPL_PAD_TO to zero. This causes no problems because binman
already takes care of appending the SPL payload at the right offset.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
This is extending commit 6516c9b349 ("spl: binman: Disable u_boot_any
symbols for i.MX8M boards") to i.MX93 boards.
Signed-off-by: Mathieu Othacehe <m.othacehe@gmail.com>
When using the USB OTG FEL mode on the Allwinner H616, the BootROM
stores some data at the end of SRAM C. This is also the location where
we place the initial SPL stack, so it will overwrite this data.
We still need the BROM code after running the SPL, so should leave that
area alone.
Interestingly this does not seem to have an adverse effect, I guess on
the "way out" (when we return to FEL after the SPL has run), this data
is not needed by the BROM, for just the trailing end of the USB operation.
However this is still wrong, and we should not clobber BROM data.
Lower the SPL stack address to be situated right below the swap buffers
we use in sunxi-fel: that should be out of the way of everyone else.
This obsoletes a previous commit (eb53e7743c) with the same name:
that one was changing the address in an *unused* macro in sunxi_common.h,
so the previous patch didn't have any effect at all.
Fixes: eb53e7743c ("sunxi: h616: lower SPL stack address to avoid BROM data")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
If we don't DMA-align buffers we pass to FAT, it will align them itself.
This behaviour likely should be deprecated in favor of
CONFIG_BOUNCE_BUFFER, but that's a task for another series. For the
meantime, don't bother aligning the buffer unless we had been doing so in
the past.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the mmc loader to spl_load. Legacy images are handled by
spl_load (via spl_parse_image_header), so mmc_load_legacy can be
omitted. To accurately determine whether mmc_load_image_raw_sector is used
(which might not be the case if SYS_MMCSD_FS_BOOT is enabled), we introduce
a helper config SYS_MMCSD_RAW_MODE. This ensures we can inline spl_load
correctly when a board only boots from filesystems. We still need to check
for SPL_MMC, since some boards enable configure raw mode even without MMC
support.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Aligning addresses and sizes causes overhead which is unnecessary when we
are not loading from block devices. Remove bl_len when it is not needed.
For example, on iot2050 we save 144 bytes with this patch (once the rest of
this series is applied):
add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-144 (-144)
Function old new delta
spl_load_simple_fit 920 904 -16
load_simple_fit 496 444 -52
spl_spi_load_image 384 308 -76
Total: Before=87431, After=87287, chg -0.16%
We use panic() instead of BUILD_BUG_ON in spl_set_bl_len because we still
need to be able to compile it for things like mmc_load_image_raw_sector,
even if that function will not be used.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
