3 Commits

Author	SHA1	Message	Date
Paul Barker	b378c400e0	pinctrl: renesas: Add RZ/G2L PFC driver ... This driver adds support for the pinctrl features of the GPIO/PFC module in the Renesas RZ/G2L (R9A07G044) SoC. A multi-function `rzg2l-pfc` driver is defined for UCLASS_NOP, which binds the `rzg2l-pfc-pinctrl` UCLASS_PINCTRL driver dynamically. We also define common macros and functions for the PFC in <renesas/rzg2l-pfc.h>. This makes it easy to add an additional UCLASS_GPIO driver for the GPIO functionality of this module in a follow-up patch. This patch is based on the corresponding Linux v6.5 driver (commit 52e12027d50affbf60c6c9c64db8017391b0c22e). Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>	2023-10-16 15:46:18 +02:00
Ralph Siemsen	e87c869db3	board: schneider: add RZN1 board support ... Add support for Schneider Electric RZ/N1D and RZ/N1S boards, which are based on the Reneasas RZ/N1 SoC devices. The intention is to support both boards using a single defconfig, and to handle the differences at runtime. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>	2023-05-13 04:01:30 +02:00
Ralph Siemsen	2d67a095dc	ram: cadence: add driver for Cadence EDAC ... Driver for Cadence EDAC DDR controller, as found in the Renesas RZ/N1. Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>	2023-05-13 04:01:30 +02:00