Commit Graph

25696 Commits

Author SHA1 Message Date
Siddharth Vadapalli
17da9795c1 usb: gadget: cdns3: Fix missing cache operations for non-zero Endpoints
Transfer initiation and completion for the non-zero Endpoints are
handled by cdns3_ep_run_transfer() and cdns3_transfer_completed()
respectively.

Failing to flush the cache associated with the TRB Pool within
cdns3_ep_run_transfer() results in the transfers never being initiated.
Similarly, failing to invalidate the cache associated with the TRB pool
within cdns3_transfer_completed() results in the transfers never being
completed.

Fix this.

Fixes: 7e91f6ccdc ("usb: Add Cadence USB3 host and gadget driver")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2024-09-30 09:08:07 -06:00
Jonas Karlman
7210de40a2 regulator: rk8xx: Use buck variable consistently
The buck variable is zero based, i.e. buck=0 match BUCK1 in datasheet.

Remove any buck + 1 calculation to be more consistent in usage of the
buck variable across the different RK8xx variants in the driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-09-27 18:20:49 +08:00
Jonas Karlman
5964651381 regulator: rk8xx: Fix buck get and set enabled state on RK806
Wrong POWER_EN reg is used to get and set enabled state for the RK806
buck 4 and 8 regulators, also wrong POWER_SLP_EN0 bit is used for
suspend state for the RK806 buck 1-8 regulators.

Fix this by not adding one to the zero based buck variable.

Fixes: f172575d92 ("power: rk8xx: add support for RK806")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-09-27 18:20:49 +08:00
Jonas Karlman
4386ab9118 power: regulator: Consistently return -ENOSYS when ops is unimplemented
dev_get_driver_ops() may return NULL when the udevice is invalid.

Move the ops check to top of functions to consistently return -ENOSYS
when ops is unimplemented and prevent trying to access uclass plat data,
also add missing NULL checks to suspend ops.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2024-09-25 08:54:03 -06:00
Jonas Karlman
f417c14d88 power: regulator: Do not call set_suspend_value with -ENODATA
On some boards a PMIC regulator is flagged with regulator-on-in-suspend
and does not define any suspend or max microvolt, e.g. on Radxa ROCK 3A:

  vcc_ddr: DCDC_REG3 {
	regulator-name = "vcc_ddr";
	regulator-always-on;
	regulator-boot-on;
	regulator-initial-mode = <0x2>;

	regulator-state-mem {
		regulator-on-in-suspend;
	};
  };

This result in suspend_uV having the value -ENODATA after probe.

This negative voltage, -ENODATA, gets missinterpreted and result in an
unexpected voltage being set by autoset.

E.g. on Radxa ROCK 3A the vcc_ddr regulator by default have a normal and
suspend voltage value of 0.5v. However, due to this missinterpretation
the suspend voltage end up beind set to 0.5625v instead.

Fix this by skip calling regulator_set_suspend_value() in autoset and
also protect calling set value ops when input value is -ENODATA.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2024-09-25 08:54:03 -06:00
Tom Rini
49e3b574ed Merge tag 'u-boot-imx-next-20240925' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22406

- i.MX93 FEC fixes.
- Always name the generated fitImage u-boot.itb to keep compatibility
  with pr-buildman behavior.
-----------------------
2024-09-25 08:21:40 -06:00
Ye Li
99abeaa648 net: fec_mxc: Skip recv packet process when fec is halted
After FEC is halted by calling fec_halt callback, we should not continue
receiving packet. Otherwise it will process previous pending interrupts
on EIR register and uses wrong rbd index as this has been reset to 0.

The GRA interrupt which is triggered by issuing graceful stop command to
FEC transmitter in fec_halt is processed in this case. It causes wrong
receive buffer descriptors be used by FEC in next time.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-24 16:55:14 -03:00
Peng Fan
94d02f13db net: fec_mxc: Fix clk_ref rate on iMX93
i.MX93 FEC ENET port supports two mode: RGMII and RMII. For RGMII,
there is an internal /2 divider, so the freq needs to set with (*2),
otherwise the speed will not reach 1G and cause communication error
in some network environments. For RMII, the clk path is
ccm -> enet tx_clk pin -> pad loop back to enet, no /2 divider.

So fix for RGMII mode with freq multiplied by 2.

Fixes: 09de565f76 ("net: fec_mxc: support i.MX93")
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-24 16:55:14 -03:00
Tom Rini
2add54d496 Merge patch series "Miscellaneous fixes"
Jerome Forissier <jerome.forissier@linaro.org> says:

Miscellaneous fixes made when developing the lwIP series [1]. They are
posted separately since they make sense on their own. Subsequent
versions of the lwIP series will contain a squashed version of this one.

[1] http://patchwork.ozlabs.org/project/uboot/list/?series=420712&state=%2A&archive=both
2024-09-24 13:41:21 -06:00
Jerome Forissier
104e890fc0 net: fec_mxc_init(): do not ignore return status of fec_open()
The fec_mxc_init() function currently always returns 0. This does not
allow the callers to detect when for instance the PHY initialization
failed due to the port being unconnected. Fix that by returning the
status of fec_open().

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-09-24 13:41:21 -06:00
Jerome Forissier
620c02eee1 net: ftgmac100: depend on NET
FTGMAC100 enables drivers/net/ftgmac100.c which uses
PHY_INTERFACE_MODE_NCSI, which is defined only when PHY_NCSI is enabled.
Therefore FTGMAC100 depends on PHY_NCSI. However adding such a
dependency causes a "recursive dependency detected!" message, so
add a dependency on NET instead (PHY_NCSI depends on NET).
All in all, either the stack is NET and FTGMAC100 can be enabled,
or it is NET_LWIP (or NO_NET) and it cannot.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-24 13:41:21 -06:00
Jerome Forissier
ec571cd4e2 net: phy: ncsi: depend on NET
PHY_NCSI enables drivers/net/phy/ncsi.c which calls net_loop() and
net_set_timeout_handler(). That's the legacy NET stack (as opposed to
NET_LWIP). Therefore add the dependency to Kconfig.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-09-24 13:41:21 -06:00
Jerome Forissier
fd23e80165 net: fm: call dtsec_init_phy() only when it is defined
dtsec_init_phy() is defined only with MII so add the proper conditional
in the caller code.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-24 13:41:21 -06:00
Jerome Forissier
9aa7e531f6 flash: prefix error codes with FL_
Prefix the flash status codes (ERR_*) with FL_ in order to avoid clashes
with third-party libraries. Case in point: including the lwIP library
header file <lwip/err.h> which defines err_enum_t as an enum with values
being ERR_*.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2024-09-24 13:41:20 -06:00
Jerome Forissier
ab50741121 spl: ram: hide SPL_RAM_SUPPORT
Make SPL_RAM_SUPPORT a hidden Kconfig symbol, automatically selected
by SPL_RAM_DEVICE or SPL_DFU. Avoids the situation where SPL_RAM_SUPPORT
may be enabled without the other two being enabled, which results in the
following build warning:

common/spl/spl_ram.c:19:14: warning: ‘spl_ram_load_read’ defined but not used [-Wunused-function]
   19 | static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector,
      |              ^~~~~~~~~~~~~~~~~

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-09-24 10:07:36 -06:00
Udit Kumar
541d21cf08 ram: k3-ddrss: Handle error properly in lpddr4_start
In lpddr4_start function error returned by lpddr4_enablepiinitiator
may go undetected due to overwrite of return code.
Add support to handle error in above case.

Reported-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2024-09-24 08:17:54 -06:00
Tom Rini
0aea8264f6 Merge tag 'xilinx-for-v2025.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx changes for v2025.01-rc1

kbuild:
- Add rules for automatically applying DT overlays

Microblaze:
- Enable bootscript location via DT

AMD/Xilinx
- Enable SIMPLE_PM_BUS by default

ZynqMP:
- DT updates and alignments with dt-schema
- Call fdtoverlay via make directly
- Enable non-invasive CCI-400 PMU debug
- Disable secure access for boot devices
- Add new zynqmp reboot command

Versal NET:
- Cleanup spi_get_env_dev()

Kria:
- Add bootmenu support

sdhci:
- Do not call device_is_compatible everywhere

net:
- Remove is-internal-pcspma DT flag
2024-09-23 08:11:01 -06:00
Marek Vasut
90cc07fd78 mmc: Poll CD in case cyclic framework is enabled
In case the cyclic framework is enabled, poll the card detect of already
initialized cards and deinitialize them in case they are removed. Since
the card initialization is a longer process and card initialization is
done on first access to an uninitialized card anyway, avoid initializing
newly detected uninitialized cards in the cyclic callback.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-09-21 11:49:20 -06:00
Roger Quadros
28a4e43149 phy: cadence: sierra: Don't spam console
use dev_dbg() instead of dev_info() for debug related
prints.

Get's rid of below print from console.

"cdns,sierra serdes@5030000: sierra probed"

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-09-20 09:09:42 -06:00
Roger Quadros
8e7a7ffec6 mux: mmio: Support "reg-mux" compatible
With "reg-mux" compatible the driver no longer expects the parent
device to be a syscon type. It uses it's own regmux.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-09-20 09:09:42 -06:00
Padmarao Begari
bde2e728ce mmc: zynq_sdhci: Remove device_is_compatible() function
There are lot of device_is_compatible() present in the driver.
Remove them and replace with a variables "SDHCI_COMPATIBLE_SDHCI_89A"
and "SDHCI_COMPATIBLE_VERSAL_NET_EMMC" with match data.
This change saves the space and reduce the execution time.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20240913093157.2343476-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-09-20 15:31:19 +02:00
Michal Simek
6161eaf057 net: gem: Remove undocumented is-internal-pcspma dt flag
Generic understanding/consideration is that phy-mode as sgmi means that the
internal PCS(Physical Coding Sublayer) should be enabled by default.
Xilinx GEM implementation allows configuration GEM (gmii mode) + PL PCS PMA
(sgmii mode, Physical Medum Attachment) but in this case phy-mode should be
setup as gmii.
The reason for this assumption is that phy-mode should be described based
on GEM configuration not based on mode coming out of PHY.

Also Linux kernel automatically setting up PCSSEL bit when phy mode is
sgmii without a need to specified additional DT propety.
All our DTSes with sgmii phy mode have this flag enabled that's why there
is no need/reason to just duplicate information.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2ecdbcc4ce692e2f8b3e7054a2abab35f6c03a69.1726213052.git.michal.simek@amd.com
2024-09-20 15:31:19 +02:00
Venkatesh Yadav Abbarapu
948616894c mtd: spi-nor: scale up timeout for full-chip erase
This patch fixes timeout issues seen on large NOR flash.
For full-chip erase, where we use the SPINOR_OP_CHIP_ERASE (0xc7)
opcode. Use a different timeout for full-chip erase than for other
commands.

 [Ported from Linux kernel commit
                09b6a377687b ("mtd: spi-nor: scale up timeout for
                               full-chip erase") ]

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
2024-09-19 16:42:31 -06:00
Ye Li
5ee773e60b imx93: Add Low performance parts 9302/9301 support
Add support for iMX93 low performance parts 9302 and 9301 which
restrict to low drive voltage only.
The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU
and A55 core1 (9301) disabled.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19 00:12:41 -03:00
Ye Li
1b631589d4 imx9: Add 233Mhz DDR PLL frequency
To support 1.866GTS LPDDR4x timing script, need to add 233Mhz freq
to DDR PLL for second mission point at 933MTS. Otherwise DDR training
will fail.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19 00:12:41 -03:00
Tom Rini
c17805e19b Merge patch series "Fix various bugs"
Simon Glass <sjg@chromium.org> says:

This series includes the patches needed to make make the EFI 'boot' test
work. That test has now been split off into a separate series along with
the EFI patches.

This series fixes these problems:
- sandbox memory-mapping conflict with PCI
- the fix for that causes the mbr test to crash as it sets up pointers
  instead of addresses for its 'mmc' commands
- the mmc and read commands which cast addresses to pointers
- a tricky bug to do with USB keyboard and stdio
- a few other minor things
2024-09-18 13:07:19 -06:00
Simon Glass
4048219957 usb: Drop old non-DM code
The driver model deadline for USB was in 2019, so drop the old USB
keyboard code, to avoid needing to deal with the extra code path.

Drop the unnecessary #ifdef around USB_KBD_BOOT_REPORT_SIZE while we
are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-09-18 13:00:59 -06:00
Simon Glass
ec811ab654 nvmxip: Avoid probing on boot
Devices should be probed when they are used, not before. Drop this
boot-time probing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-09-18 13:00:59 -06:00
Simon Glass
48fef88f94 nvmxip: Drop the message on probe
We should not need to announce this device. Drop the message.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-09-18 13:00:59 -06:00
Tom Rini
773f138632 Merge patch series "Arm: npcm: modify npcm8xx boot setting"
Jim Liu <jim.t90615@gmail.com> says:

Modify npcm8xx new boot design.
Correct memory setting and set gpio default value.
2024-09-16 16:43:53 -06:00
Stanley Chu
3aa2eac4f0 pinctrl: npcm8xx: clear all gpio events
Clear all gpio events to avoid unexpected interrupts
during kernel booting.

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
2024-09-16 16:43:35 -06:00
Chia-Wei Wang
fca70d6181 drivers/crypto: aspeed: Add Caliptra SHA ACC support
Aspeed AST27xx SoCs integrate the CPTRA 1.0 secure IP, which
export a SHA accelerator interface for SoC to use.

Note that CPTRA 1.0 supports only SHA384 and SHA512 and this
patch is verified by the 'hash test sha384/sha512' commands.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2024-09-16 16:37:17 -06:00
Tom Rini
19dbc09405 Merge tag 'v2024.10-rc5' into next
Prepare v2024.10-rc5
2024-09-16 14:48:13 -06:00
Jerome Forissier
2f9c472dd7 dfu: fix Kconfig dependencies
Fix link errors caused by missing Kconfig dependencies:

1. DFU_OVER_USB compiles common/dfu.c which calls g_dnl_clear_detach()
which is implemented in drivers/usb/gadget/g_dnl.c which needs
USB_GADGET_DOWNLOAD. Test case:

 $ printf "CONFIG_USB_GADGET_DOWNLOAD=n\nCONFIG_USB_FUNCTION_FASTBOOT=n" \
       >>configs/am62px_evm_a53_defconfig
 $ make am62px_evm_a53_defconfig
 $ make CROSS_COMPILE=aarch64-linux-gnu-
 [...]
 common/dfu.c:34:(.text.run_usb_dnl_gadget+0x68): undefined reference to `g_dnl_clear_detach
 [...]

2. With the above fixed, the same build causes:

 common/spl/spl_dfu.c:29:(.text.spl_dfu_cmd+0xb0): undefined reference to `run_usb_dnl_gadget'

This is because SPL_DFU compiles common/spl/spl_dfu.c which calls
run_usb_dnl_gadget() which is implemented in common/dfu.c which needs
DFU_OVER_USB.

Therefore add these dependencies to Kconfig.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20240910102751.3182982-1-jerome.forissier@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2024-09-13 17:41:18 +02:00
Tom Rini
35394e1ea7 Merge tag 'efi-next-20241024' of https://source.denx.de/u-boot/custodians/u-boot-efi into next
Pull request efi-next-20241024

UEFI:

* Use generated UUIDs in UEFI capsules:
  - efi: define struct efi_guid
  - lib: uuid: add UUID v5 support
  - efi: add a helper to generate dynamic UUIDs
  - doc: uefi: document dynamic UUID generation
  - sandbox: switch to dynamic UUIDs
  - lib: uuid: supporting building as part of host tools
  - include: export uuid.h
  - tools: mkeficapsule: use u-boot UUID library
  - tools: mkeficapsule: support generating dynamic GUIDs
  - test: lib/uuid: add unit tests for dynamic UUIDs
  - test: lib/uuid: add tests for UUID version/variant bits

* Minor code clean-up
  - shorten efi_bootmgr_release_uridp_resource()
  - rename efi_bootmgr_image_return_notify
  - return the correct error in efi_bootmgr_release_uridp()
  - Kconfig: clean up the efi configuration status
  - Use puts() in cout so that console recording works
  - Put back copyright message in helloworld.c
2024-09-13 08:20:25 -06:00
Tom Rini
7387be522e bootcount: Update to point to current documentation
The current documentation for the bootcount API is on our website and
not the old wiki, update the link in two places.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-09-12 18:14:49 +02:00
Caleb Connolly
58d825fb18 include: export uuid.h
Move this header to include/u-boot/ so that it can be used by external
tools.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-12 17:35:37 +02:00
Tom Rini
9eb0d731d8 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI result shows no issue:
https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/22315
----------------------------------------------------------------
- Aspeed: Add AST2700 board (Ibex RISC-V core) support
        - Add timer, dram controller, network support
- Sophgo: Add clock controller support for Milk-V Duo
2024-09-12 09:03:40 -06:00
Miquel Raynal
5748aa1e37 pwm: imx: Don't drop the enable bit once set
Changing the duty-cycle should not blindly override (and clear) the
enable (EN) bit if it has already been set. For instance, a PWM
backlight can be enabled and set to a specific intensity using two
operations. The order of these operations should not matter.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-09-11 17:02:36 -03:00
Chia-Wei Wang
a1ad11ce52 ram: ast2700: Add DRAM controller initialization
Add driver for AST2700 to initialize DRAM in SPL.

This patch also refactors the Kconfig dependency of
Aspeed DRAM drivers as some of them are shared among
the file structures of RV and ARM ISAs.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Chia-Wei Wang
4b0129e810 timer: Add AST2700 IBEX timer support
Add the driver for the AST2700 Ibex timer, which uses CPU
cycles as the timer count running at 200MHz.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:35:03 +08:00
Jacky Chou
db378b0f18 driver: net: Add Aspeed AST2700 MDIO support
The AST2700 is the 7th generation SoC from Aspeed.
And use the driver to support clause 22 access.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:48 +08:00
Jacky Chou
c724f3ed74 net: ftgmac100: Add Aspeed AST2700 support
Add support of Aspeed AST2700 SoC.  AST2700 is based on ARM64 so modify
the DMA address related code to fit both ARM and ARM64.  Besides, the
RMII/RGMII mode control register is moved from SCU500 to MAC50 so
initialize the register in ftgmac100_start correspondingly.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:43 +08:00
Jacky Chou
40c45a5797 net: ftgmac100: Modify desc. size to cache line
The TX/RX descriptor size is 16 byte.
When the cache line size is larger than 16 bytes, descriptors
flushed to RAM will flush more than one descriptor.
It is possible that it may mistakenly flush to other descriptor
that has been updated by MAC in RAM.

To avoid this issue, align the descriptors to cache line size.
Only one desc will be flushed or invalidated at a time.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:39 +08:00
Jacky Chou
a0f4e43c59 net: ftgmac100: Fixed NC-SI PHY device cannot get
The NC-SI interface does not need the MDIO bus and the
NC-SI PHY device cannot get from dm_eth_phy_connect.
Therefore, use phy_connect directly here.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:35 +08:00
Jacky Chou
21d5d5e55b net: ftgmac100: Fixed the cache coherency issues of rx memory
When executing TFTP, the ARP will be replied to after receiving
the ARP. U-boot's ARP routine modifies the data in the receive
packet in response to the ARP packet and then copies it
into the transmit packet.
At this point, the received packet cache is inconsistent.
It is possible that the cache will perform a writeback action to
affect the MAC receiving packets.

Avoid the same problem that occurs in other networking protocols.
In the free_pkt function, ensure cache and memory consistency.

Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:34:31 +08:00
Kongyang Liu
5f364e072e clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC
Add clock controller driver for sophgo cv1800b SoC

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-11 20:32:06 +08:00
Tom Rini
2def0df217 arm: Remove ethernut5 board
As per the maintainers at egnite GmbH, they are no longer interested in
supporting this board. Go and remove the platform here. Furthermore,
this is the only AT91SAM9XE platform in-tree so remove supporting code
for that as well.

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-09-10 13:12:32 -06:00
Heinrich Schuchardt
5896ac5766 clk: sifive: avoid declaring static variables in includes
The existing code is unnecessarily convoluted:

Arrays __prci_init_clocks_fu[5|7]40  are initialized with data.
In separate includes fu[5|7]40-prci.h the size of the arrays is provided as
constants.

By moving the structures prci_clk_fu[5|7]40 to the respective code modules
we can directly use ARRAY_SIZE() to access the size of the data used for
initialization.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-09-10 10:10:43 +08:00
Heinrich Schuchardt
f7fead8914 clk: sifive: append missing \n to messages
If multiple messages are written, line-feeds improve the readability.

Fixes: c40b6df87f ("clk: Add SiFive FU540 PRCI clock driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2024-09-10 10:10:43 +08:00