Enable CONFIG_OF_BOARD_SETUP and other dependencies to allow the use of
the ft_board_setup() function to replace fdt set in boot scripts for
Microchip's MPFS Icicle kit.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The commit d92fdb6067 ("binman: Add option for pointing to separate
description") added support for separating binman description to own file
not the be the part of DT for OS.
The main reason is that binman is not passing dt schema validation that's
why want to keep it separated.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Increase Icicle's SYS_BOOTM_LEN to 0x4000000 which is the new default
value.
Done on Conor Dooley's request.
Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Remove CONFIG_SYS_BOOTM_LEN from all riscv defconfigs where the new
default value is used.
Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Acked-by: Michal Simek <michal.simek@amd.com> # xilinx_mbv
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
For all riscv defconfigs that use the current default value.
This is done in provision of changing the default value to the most
common used value of 0x4000000.
Signed-off-by: Martin Herren <sputnik@on-the-web.ch>
Acked-by: Michal Simek <michal.simek@amd.com> # xilinx_mbv
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
58e9502e6 "arm: sunxi: Enable SPL/SPI boot for Olinuxino Lime2-eMMC
boards" enabled SPI boot for the eMMC variant. Olimex offers the
"s16MB" variant with SPI flash populated but without eMMC populated.
Tested on board rev L.
Signed-off-by: Eric Anderson <ejona86@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The pinecube has an ethernet connector which uses the EMAC and internal
PHY of the chip. Enable it in the config.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
The first of the two Ethernet controllers in the Allwinner A527/T527 is
compatible to the MAC from the previous SoCs. Consequently the recent DT
update brought use the MAC node, using the A64 compatible string as the
fallback, which works out of the box.
Enable the sun8i-emac Ethernet driver in the defconfig for the Radxa and
the Avaota boards, so that kernels and other data can be loaded via
TFTP. Please note that only one of the Ethernet sockets will work, the
second MAC is not compatible, and needs a new U-Boot driver. The
X96QPro+ TV box unfortunately uses only this second EMAC, so Ethernet
cannot be used there at the moment.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The V3s (using co-packaged DRAM) runs at 360 MHz, which is specified in
the common platform Kconfig file. However the value for MACH_SUN8I will
be picked up instead due to ordering.
Re-order the defaults to have MACH_SUN8I_V3S before MACH_SUN8I and let
it select the correct default. Also update the LicheePi Zero Dock
defconfig to remove the value, which is now correctly selected.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
There is nothing special for u-boot in the V3/V3s device-tree files,
they are just copies of the upstream ones.
Remove the copies and switch to OF_UPSTREAM for supported boards.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
This pull request introduces initial U-Boot support for Agilex7 M-series, along
with several enhancements and cleanups across existing Agilex platforms. Key
changes include new board support, DDR driver additions, updated device trees,
and broader SoCFPGA SPL improvements.
Highlights:
- Agilex7 M-series bring-up:
- Basic DT support and board initialization for Agilex7 M-series SoC and
SoCDK.
- New sdram_agilex7m DDR driver with UIBSSM mailbox support and HBM support.
- Clock driver support for Agilex7 M-series.
- New defconfig: socfpga_agilex7m_defconfig.
- Agilex and Agilex5 enhancements:
- Improved SPL support: ASYNC interrupt enabling, system manager init
refactor, and cold scratch register usage.
- Updated firewall probing and watchdog support in SPL.
- Cleaned up DDR code, added secure region support for ATF, and improved warm
reset handling.
- Device Tree and config updates:
- Migration to upstream Linux DT layout for Agilex platforms.
- Consolidated socfpga_agilex_defconfig and removed deprecated configs.
- Platform-specific environment variables for Distro Boot added.
- Driver fixes and cleanups:
- dwc_eth_xgmac and clk-agilex cleanup and improvements.
- Several coverity and style fixes.
Contributions in this PR are from Alif Zakuan Yuslaimi, Tingting Meng, and
Andrew Goodbody. This patch set has been tested on Agilex 5 devkit, Agilex
devkit and Agilex7m devkit.
Passing all pipeline tests at SoCFPGA U-boot custodian
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27318
Migrate the legacy Agilex platform to use the upstream Linux device tree
configuration. This helps reduce maintenance overhead and aligns U-Boot
with the Linux kernel's DTS hierarchy and naming conventions.
This change improves consistency between U-Boot and Linux by removing
custom/legacy DTS handling and instead relying on the standardized
definitions provided by the upstream Linux DTS.
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Combine all MMC, NAND and QSPI configs into single defconfig which is named
as "socfpga_agilex_defconfig". This will be the default defconfig to use.
It supports booting from all three flashes using ARM Trusted Firmware (ATF)
as the secure runtime monitor.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Various fixes for smatch warnings, the i2c one might be also coming in
via Heiko / I2C tree, let me know if there is conflict.
There is also W77Q51NW SPI NOR ID support, with the DT portion omitted
for now.
Enable support for Winbond SPI NOR on Retronix R-Car V4H Sparrow Hawk board,
this is required to support W77Q51NW on new board revision EVTB1 operational.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The Galaxy R (GT-I9103) and Captivate Glide (SGH-i927) are both Tegra 2
based Samsung smartphones released in 2011. They both feature 1 GB of RAM
and 8 GB of expandable flash memory. The key difference is that the
Captivate Glide has an OLED panel (contrary to LCD in Galaxy R) and a
QWERTY keyboard in form factor of a slider.
Signed-off-by: Ion Agorria <ion@agorria.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The Pegatron Chagall (originally built by Pegatron, but later rebranded by
other vendors under names Fujitsu Stylistic M532, Olivetti Olipad 3,
Siragon 4N, Realpad Bunaken, DNS AirTab P110w / P110g etc) is a mostly
business-oriented tablet sold in 2012 in different variants, mostly in
Europe, with slight differences in storage size (16GB/32GB) and presence
of built-in cellular modem.
Tested-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/27236
- Add support for STM32 TIMERS and STM32 PWM on STM32MP25
- Add STM32MP13xx SPL and OpTee-OS start support
- Fix header misuse in stm32 reset drivers
- Fix STMicroelectronics spelling
- Fix clk-stm32h7 wrong macros used in register read
- Fix PRE_CON_BUF_ADDR on STM32MP13
- Fix clock identifier passed to struct scmi_clk_parent_set_in
- Fix stm32 reset for STM32F4/F7 and H7
- Enable OF_UPSTREAM_BUILD_VENDOR for stm32mp13_defconfig
- Add STM32MP23 SoC and stm32mp235f-dk board support
This pull request includes updates for the SoCFPGA platform intended for the 2025.10 release
cycle. The highlights focus on enabling the Power Manager for Agilex5, NAND boot support
enhancements, and various bug fixes and cleanups across SoCFPGA components.
CI:
* https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27221
Summary of changes:
Agilex5 Power Manager:
* Initial driver support and DT bindings are added for the Agilex5 Power Manager, enabling
better power domain control.
NAND Boot Support for Agilex5:
* SPL support for NAND boot is enabled.
* UBI/UBIFS support is configured in defconfigs.
* Memory layout updates (malloc and BSS relocation) ensure proper boot behavior.
Code Quality Improvements:
* Coverity and runtime bug fixes (e.g., jtag_usercode check, sub-device conditionals).
* Several cleanup patches addressing formatting, logic, and initialization issues.
General Maintenance:
* SPDX license tags and header include fixes.
* Device tree updates to limit SPI clock frequency and other minor adjustments.
These contributions come from Alif Zakuan Yuslaimi, Andrew Goodbody, Dinesh Maniyam, Naresh
Kumar Ravulapalli, and Tingting Meng.
This patch set has been tested on Agilex 5 devkit.
Quentin Schulz <foss+uboot@0leil.net> says:
Due to updates to the Device Tree (migrating to onboard USB hub nodes
instead of (badly) hacking things with a gpio regulator that doesn't
actually work properly), we now need to enable the onboard USB hub
driver in U-Boot.
This anticipates upcoming breakage when 6.16 DT will be merged into
U-Boot's dts/upstream.
The series can be applied as is before v6.16 DT is merged or only the
defconfig changes after 6.16 DT has been merged.
The last two patches are simply to avoid probing devices that aren't
actually routed on RK3399 Puma, which is nice to have but doesn't fix
anything.
Note that this depends on the following series:
https://lore.kernel.org/u-boot/20250722-usb_onboard_hub_cypress_hx3-v4-0-91c3ee958c0e@thaumatec.com/
Link: https://lore.kernel.org/r/20250730-puma-usb-cypress-v1-0-b1c203c733f9@cherry.de
Quentin Schulz <foss+uboot@0leil.net> says:
v6.16-rc1 will bring an incompatible change to the Device Tree of PX30
Ringneck which will break Ethernet support.
Unfortunately, the designware net driver's logic doesn't seem to allow
having the old Device Tree (without MDIO bus and Ethernet PHY nodes)
with DM_MDIO and DM_ETH_PHY enabled so there cannot be a smooth
transition.
Since this is going to bite me in a few months time, let's just break
and fix it now in a couple of commits so I don't have to think about it
later :)
This can be cleanly applied on master or next, I have absolutely zero
preference on the branch this should be merged in (my opinion is that
it's too late in the 2024.07 cycle to bring this in :) ).
Link: https://lore.kernel.org/r/20250611-ringneck-mdio-v1-0-529a40a0f966@cherry.de
Due to updates to the Device Tree (migrating from snps,reset-*
properties to a PHY node on the MDIO bus) in previous commits and the
inability of the designware net driver to support the old Device Tree
(without the MDIO bus and PHY nodes) with DM_MDIO and DM_ETH_PHY
enabled, support for Ethernet on Ringneck PX30 is currently broken.
Now that the transition was made, we can simply enable DM_MDIO and
DM_ETH_PHY to fix Ethernet support on that board. Ideally, we could
squash this commit with the one migrating the Device Tree, but we want
to keep having upstream changes to the Device Trees made by
tools/update-subtree.sh tool without manual intervention.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
With Inline ECC enabled, the bottom 1/8 of DDR is reserved
for ECC parity bits and must not be used for general data address
allocation. Previously, the SPL bss and malloc addresses were allocated
inside this ECC parity region if the DDR size is 1GB.
This caused ECC hardware to detect stale or invalid parity bits,
leading to data correction attempts and DMA polling hangs or failures.
Fix this by relocating the malloc and bss to the usable 7/8 region of DDR
and is fully ECC-safe.
This change ensures reliable ddr address operation and
prevents unintended memory corruption.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Agilex5 FSBL is required to disable the power of unused peripheral SRAM
blocks to reduce power consumption.
Introducing a new power manager driver for Agilex5 which will be called
as part of Agilex5 SPL initialization process.
This driver will read the peripheral handoff data obtained from the
bitstream and will power off the specified peripheral's SRAM from the
handoff data values.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
On STM32MP reference boards, the watchdog is started by a previous
boot stage (e.g. bootrom or secure OS), so the config flag
WATCHDOG_AUTOSTART is not required.
It's preferable to rely on the DT properties "u-boot,autostart" or
"u-boot,noautostart", if needed.
For backward compatibility on defconfigs that are based on SPL,
thus cannot rely on a previous boot stage for starting the
watchdog, enable WATCHDOG_AUTOSTART in their respective defconfig.
The change in stm32mp15_dhsom.config is propagated to:
- configs/stm32mp15_dhcom_basic.config
- configs/stm32mp15_dhcor_basic.config
and then to:
- stm32mp15_dhcom_basic_defconfig
- stm32mp15_dhcom_drc02_basic_defconfig
- stm32mp15_dhcom_pdk2_basic_defconfig
- stm32mp15_dhcom_picoitx_basic_defconfig
- stm32mp15_dhcor_avenger96_basic_defconfig
- stm32mp15_dhcor_basic_defconfig
- stm32mp15_dhcor_drc_compact_basic_defconfig
- stm32mp15_dhcor_testbench_basic_defconfig
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Update defconfig to make use of U-Boot SPL to initialize DH STM32MP13xx
DHCOM DHSBC SoM and board. This is largely a move of SPL enablement from
DH STM32MP15xx DHSOM defconfigs into generic DH STM32MP1xx defconfig .
Support for SPI NOR chips which are not used on STM32MP13xx DHCOR are
moved into STM32MP15xx DHSOM defconfigs. Changes to STM32MP13xx DHCOR
defconfig then enable SPL support, CCF in SPL to configure clock, pin
configuration support in SPL, and OpTee OS start support in U-Boot.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Enable the following configs:
- CONFIG_MFD_STM32_TIMERS: enables support for the STM32 multifunction
timer
- CONFIG_DM_PWM: enables support for pulse-width modulation devices
- CONFIG_CMD_PWM: enables 'pwm' command to control PWM channels
- CONFIG_PWM_STM32: enables support for the STM32 PWM devices
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Second set of u-boot-at91 features for the 2025.10 cycle:
This feature set includes the addition of new sama7d65 SoC and a new
board named sama7d65-curiosity.
Enable bootstd.
Update defconfigs to the latest u-boot requirements.
Enable SYS_THUMB_BUILD and LTO and to reduce binary size.
Enable NET_RANDOM_ETHADDR.
Disable JFFS2 support.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
So far developers seem to use three popular boards:
- Avaota A1: dev board with USB 3.0, dual Ethernet, small display
- X96QPro+: TV box with Gigabit Ethernet, USB 3.0, eMMC
- Radxa A5E: small dev board with USB3/M.2 2230 (muxed), dual Ethernet
Add the defconfig files for those boards, containing the DRAM parameters
and the usual Kconfig options.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The generic name 'EFI' would be more useful for common EFI features. At
present it just refers to the EFI app and stub, which is confusing.
Rename it to EFI_CLIENT
Signed-off-by: Simon Glass <sjg@chromium.org>
Make it possible to update E850-96 firmware binaries using EFI Capsule
Update mechanism. For example, to update the U-Boot binary, the capsule
file can be generated like this:
$ ./tools/mkeficapsule --index 4 \
--guid 629578c3-ffb3-4a89-ac0c-611840727779 \
u-boot.bin capsule4.bin
The resulting 'capsule4.bin' should be copied to ESP partition (in
/boot/efi/EFI/UpdateCapsule/ directory). Then after reboot U-Boot will
update the 'bootloader' area in eMMC Boot Partition A (boot0) and remove
the capsule file, by EFI boot manager executed as a part of Standard
Boot:
Applying capsule capsule4.bin succeeded.
Reboot after firmware update.
The kernel will also expose the ESRT table information via SysFS in
/sys/firmware/efi/esrt/entries.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Now that USB phy and dwc3 glue layer was added for Exynos850, USB gadget
is functional on E850-96 board. Enable next features to make it useful:
- Exynos850 USB PHY driver (needed for all USB functions)
- dwc3 generic driver
- USB gadget
- CONFIG_DM_USB_GADGET: needed for DWC3 glue layer to instantiate the
peripheral driver, i.e. dwc3_generic_peripheral_probe()
- USB VID and PID
- DFU
- Fastboot (including flashing to eMMC boot partitions)
As all Exynos firmware binaries (including U-Boot) are contained in eMMC
boot partition A (mmc0boot0), because that's where Boot ROM code jumps,
it might be useful to be able to flash that area with fastboot. Other
more fine grained choices for updating the firmware would be DFU and EFI
Capsule Update mechanism.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
"fastboot flash" tries to malloc 8 MiB buffer after receiving data over
USB and trying to write it to eMMC. Right now only 8.12 MiB malloc is
available for E850-96 overall, which leads to this issue:
Malloc failed for: CHUNK_TYPE_RAW
Fix it by increasing malloc pool size from 8.12 MiB up to 32 MiB, like
it's done in many other boards using fastboot.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27149
- Add support for the NXP imx93 frdm board.
- imx93_evk and phycore-imx93 cleanups.
- Convert imx6dl-sielaff to OF_UPSTREAM and fix serial download mode boot.
- Fix crash in imx power-domain.
- Migrate Phytec imx8mm boards to standard boot.
- Fix smatch warnings.
Commit 86acdce2ba ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.
This cleanup was made semi-automatically using these scripts: [1].
No functional change, but the binary size for the modified boards is
reduced a bit.
[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Tested-by: Bryan Brattlof <bb@ti.com>
Acked-by: Peng Fan <peng.fan@nxp.com> #NXP boards
AMD/Xilinx/FPGA changes for v2025.10-rc1 v2
zynqmp:
- Generate fit-dtb.blob all the time
- Simplify power-domain driver bind
zynqmp_mini:
- Remove PSCI_RESET
fpga:
- Improve user feedback in case of FPGA bitstream load failure
misc:
- Fix kernel-doc in gpio zynq and axi_mrmac
spi:
- Revert fix in STIG mode
[trini: Remove CONFIG_FPGA_VERSALPL=y from sandbox due to
sandbox+clang+asan test problem]
Signed-off-by: Tom Rini <trini@konsulko.com>
