3 Commits

Author	SHA1	Message	Date
Patrick Delaunay	31e45a1a9e	stpmic1: add NVM update support in fuse command ... Add functions to read/update the non volatile memory of STPMIC1 (8 bytes-register at 0xF8 address) and allow access with fuse command (bank=1, word > 0xF8). For example: STM32MP> fuse read 1 0xf8 8 Reading bank 1: Word 0x000000f8: 000000ee 00000092 000000c0 00000002 Word 0x000000fc: 000000f2 00000080 00000002 00000033 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>	2019-04-12 16:09:13 +02:00
Simon Glass	8729b1ae2c	misc: Update read() and write() methods to return bytes xfered ... At present these functions return 0 on success. For some devices we want to know how many bytes were transferred. It seems useful to adjust the API to be more like the POSIX read() and write() functions. Update these two methods, a test and all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>	2018-11-20 19:14:22 -07:00
Patrick Delaunay	c3600e1f92	stm32mp1: add FUSE command support ... Add support of fuse command (read/write/program/sense) on bank 0 to access to BSEC SAFMEM (4096 OTP bits). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>	2018-05-26 18:19:18 -04:00