3 Commits

Author	SHA1	Message	Date
Xingyu Wu	9adf1cf609	clk: starfive: jh7110: Add of_xlate ops and macros for clock id conversion ... Modify the drivers to add of_xlate ops and transform clock id. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Torsten Duwe <duwe@suse.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>	2023-07-24 13:21:16 +08:00
Xingyu Wu	2d7a578791	clk: starfive: jh7110: Separate the PLL driver ... Drop the PLL part in SYSCRG driver and separate to be a single PLL driver of which the compatible is "starfive,jh7110-pll". Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Torsten Duwe <duwe@suse.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>	2023-07-24 13:20:44 +08:00
Yanhong Wang	c13fe7c034	clk: starfive: Add StarFive JH7110 clock driver ... Add a DM clock driver for StarFive JH7110 SoC. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Tested-by: Conor Dooley <conor.dooley@microchip.com>	2023-04-20 16:08:44 +08:00