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3 Commits

Author SHA1 Message Date
Simon Glass
51de94dfe4 x86: coral: Allow init of debug UART in U-Boot proper 
At present the debug UART is only set up in SPL, on the assumption that
the boot flow will always pass through there. When booting from coreboot,
SPL is not used, so the debug UART is not available.

Move the code into a common place so that it can be used in U-Boot proper
also. Add the required init to start_from_spl.S as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2021-03-27 15:04:30 +13:00
Simon Glass
6571d87315 x86: apl: Add core init for the SoC 
Set up MSRs required for Apollo Lake. This enables Linux to use the
timers correctly. Also write the fixed MSRs for this platform.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
 2020-11-05 14:58:45 +08:00
Simon Glass
6a4c237af9 x86: apl: Add a CPU driver 
Add a bare-bones CPU driver so that CPUs can be probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
 2019-12-15 11:44:29 +08:00