forked from OERV-BSP/u-boot
MSCC: add support for Ocelot SoCs
This family of SoCs are found in the Microsemi Switches solution and have already a support in the linux kernel. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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committed by
Daniel Schwierzeck
parent
464b96bb80
commit
dd1033e4e0
21
arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
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21
arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
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/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
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#define _MSCC_OCELOT_DEVCPU_GCB_H_
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#define PERF_SOFT_RST 0x8
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#define PERF_SOFT_RST_SOFT_NON_CFG_RST BIT(2)
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#define PERF_SOFT_RST_SOFT_SWC_RST BIT(1)
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#define PERF_SOFT_RST_SOFT_CHIP_RST BIT(0)
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#define PERF_GPIO_OUT_SET 0x34
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#define PERF_GPIO_OUT_CLR 0x38
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#define PERF_GPIO_OE 0x44
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#endif
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