forked from OERV-BSP/u-boot
Merge tag 'xilinx-for-v2023.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.07-rc1 cmd: - Print results in hex instead of dec in smc command firmware: - Cover missing ZYNQMP_FIRMWARE dependencies fpga: - fix loads for unencrypted use case relocation - Add support for BE systems spi: - Fix xilinx_spi init reset sequence arasan nand: - Remove hardcoded bbt option - Set ofnode value xilinx: - Enable SMC command - Fix some sparse issues zynqmp: - Remove cdns,zynq-gem compatible string - Add optee node - Some DT cleanups zynq: - Some DT cleanups microblaze - Remove MANUAL_RELOC option
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@@ -185,7 +185,7 @@ config CLK_VERSACLOCK
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config CLK_VERSAL
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bool "Enable clock driver support for Versal"
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depends on (ARCH_VERSAL || ARCH_VERSAL_NET)
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select ZYNQMP_FIRMWARE
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imply ZYNQMP_FIRMWARE
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help
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This clock driver adds support for clock realted settings for
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Versal platform.
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@@ -219,7 +219,7 @@ config CLK_ZYNQ
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config CLK_ZYNQMP
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bool "Enable clock driver support for ZynqMP"
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depends on ARCH_ZYNQMP
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select ZYNQMP_FIRMWARE
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imply ZYNQMP_FIRMWARE
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help
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This clock driver adds support for clock realted settings for
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ZynqMP platform.
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